74LVC540AT20-13 [DIODES]

Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, 6.40 X 6.50 MM, 1.20 MM HEIGHT, 0.65 MM PITCH, GREEN, TSSOP-20;
74LVC540AT20-13
型号: 74LVC540AT20-13
厂家: DIODES INCORPORATED    DIODES INCORPORATED
描述:

Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, 6.40 X 6.50 MM, 1.20 MM HEIGHT, 0.65 MM PITCH, GREEN, TSSOP-20

驱动 光电二极管 逻辑集成电路
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74LVC540A  
OCTAL BUFFER/ LINE DRIVER WITH 3 STATE OUTPUTS  
Description  
Pin Assignments  
The 74LVC540A is an octal inverting buffer/driver is designed for  
driving bus lines or buffer memory address registers. The 3-state  
control gate is a 2-input AND gate with active-low inputs so that, if  
either output enable (OE1 or OE2) input is high, all eight outputs are in  
the high-impedance state..These devices feature inputs and outputs  
on opposite sides of the package that facilitate printed circuit board  
layout.  
The device is designed for operation with a power supply range of  
1.65V to 3.6V.  
The inputs are tolerant to 5.5V allowing this device to be used in a  
mixed voltage environment. The device is fully specified for partial  
power down applications using IOFF. The IOFF circuitry disables the  
output preventing damaging current backflow when the device is  
powered down.  
Features  
Applications  
Supply Voltage Range from 1.65V to 3.6V  
Sinks or Sources 24mA at VCC = 3V  
CMOS Low Power Consumption  
General Purpose Logic  
Bus Driving  
Power Down Signal Isolation  
Wide array of products such as:  
I
OFF Supports Partial Power Down Operation  
Inputs or Outputs Accept Up to 5.5V  
ƒ
PCs, Notebooks, Netbooks, Ultrabooks  
Networking Computer Peripherals, Hard Drives, CD/DVD  
ROM  
Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage  
Applications  
ƒ
ƒ
Schmitt Trigger Action at All Inputs  
TV, DVD, DVR, Set Top Box  
Typical VOLP (Quiet Output Ground Bounce) Less Than 0.8V with  
VCC = 3.3V and TA = +25°C  
Typical VOHV (Quiet Output dynamic VOH) Greater than 2.0V with  
VCC = 3.3V and TA = +25°C  
ESD Protection Tested per JESD 22  
ƒ
ƒ
ƒ
Exceeds 200-V Machine Model (A115)  
Exceeds 2000-V Human Body Model (A114)  
Exceeds 1000-V Charged Device Model (C101)  
Latch-Up Exceeds 250mA per JESD 78, Class I  
All devices are:  
ƒ
ƒ
Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2)  
Halogen and Antimony Free. “Green” Device (Note 3)  
Notes:  
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.  
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,  
"Green" and Lead-Free.  
3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and  
<1000ppm antimony compounds.  
1 of 10  
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July 2014  
© Diodes Incorporated  
74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Ordering Information  
74 LVC 540A xxx -13  
Logic Device  
Function  
Package  
Packing  
74 : Logic Prefix  
540 :  
Octal  
T20 : TSSOP-20  
Q20 : QFN-20  
-13 : 13” Tape & Reel  
Buffer/Line  
Driver with 3  
State Outputs  
Package  
Size  
13” Tape and Reel  
Package  
(Note 4 & 5)  
Package  
Part Number  
Code  
Quantity  
Part Number Suffix  
6.4mm X 6.5mm X 1.2mm  
0.65 mm lead pitch  
74LVC540AT20-13  
74LVC540AQ20-13  
T20  
Q20  
TSSOP-20  
2500/Tape & Reel  
2500/Tape & Reel  
-13  
2.5mm X 4.5mm X 0.95mm  
0.50 mm lead pitch  
V-QFN4525-20  
-13  
Notes:  
4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at  
http://www.diodes.com/datasheets/ap02001.pdf.  
5. V-QFN4525-20 is a JEDEC recognized naming convention that specifies the package thickness category as V and the number 4525 describes the  
package as 4.5mm X 2.5mm.  
Pin Descriptions  
Logic Diagram  
Function Table  
Pin  
Number  
Pin  
Name  
INPUTS  
OUTPUT  
Q
Description  
A
OE1 OE2  
1
Output Enable 1  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
B8  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
L
L
H
X
L
L
X
H
L
H
X
X
H
L
Z
Z
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
Data Input  
Data Input  
Data Input  
Data Input  
Data Input  
Data Input  
Data Input  
Data Input  
Ground  
Data Output  
Data Output  
Data Output  
Data Output  
Data Output  
Data Output  
Data Output  
Data Output  
19  
20  
Output Enable 2  
Supply Voltage  
OE2  
VCC  
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July 2014  
© Diodes Incorporated  
74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Absolute Maximum Ratings (Notes 6 & 7)  
Symbol  
ESD HBM  
ESD CDM  
ESD MM  
VCC  
Description  
Rating  
Unit  
kV  
kV  
V
Human Body Model ESD Protection  
Charged Device Model ESD Protection  
Machine Model ESD Protection  
Supply Voltage Range  
2
1
200  
-0.5 to +7.0  
-0.5 to +7.0  
-20  
V
Input Voltage Range  
V
VI  
mA  
IIK  
Input Clamp Current  
Output Clamp Current  
VI< 0V  
VO< 0V  
-50  
±50  
mA  
mA  
mA  
mA  
°C  
IOK  
IO  
Continuous Output Current -0.5V < VO VCC +0.5V  
Continuous Current Through VCC  
Continuous Current Through GND  
Operating Junction Temperature  
Storage Temperature  
100  
ICC  
-100  
IGND  
-40 to +150  
-65 to +150  
500  
TJ  
°C  
TSTG  
PTOT  
Total Power Dissipation  
mW  
Notes:  
6. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be  
within recommend values.  
7. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could  
cause a condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range.  
Recommended Operating Conditions (Note 8)  
Symbol  
Parameter  
Conditions  
Min  
1.65  
1.5  
0
Max  
3.6  
Unit  
V
Operating  
Data Retention Only  
VCC  
Supply Voltage  
V
VI  
Input Voltage  
5.5  
VCC  
-4  
V
VO  
Output Voltage  
0
V
VCC = 1.65V  
VCC = 2.3V  
VCC = 2.7V  
VCC = 3.0V  
-8  
IOH  
High-Level Output Current  
mA  
mA  
-12  
-24  
4
V
CC = 1.65V  
VCC = 2.3V  
VCC = 2.7V  
VCC = 3.0V  
8
IOL  
Low-Level Output Current  
12  
24  
t/V  
Input Transition Rise or Fall Rate  
10  
ns/V  
ºC  
TA  
Operating Free-Air Temperature  
-40  
+125  
Note:  
8. Unused inputs should be held at VCC or ground.  
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74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Electrical Characteristics  
TA = -40°C to +85°C  
TA = +85°C to +125°C  
Symbol  
Parameter  
Test Conditions  
Unit  
VCC  
Min  
1.65V to 1.95V VCC X 0.65  
Max  
Min  
VCC X 0.65  
1.7  
Max  
High-Level Input  
Voltage  
VIH  
2.3V to 2.7V  
3.0V to 3.6V  
1.65V to 1.95V  
2.3V to 2.7V  
3.0V to 3.6V  
1.65V to 3.6V  
1.65V  
1.7  
2
V
2
V
CC X 0.35  
0.7  
VCC X 0.35  
0.7  
VIL  
Low-Level Input voltage  
V
0.8  
0.8  
IOH = -50μA  
VCC -0.2  
1.2  
1.7  
2.2  
2.4  
2.3  
VCC -0.3  
1.05  
1.65  
2.05  
2.48  
2.0  
IOH = -4mA  
IOH = -8mA  
2.3V  
High-Level Output  
Voltage  
VOH  
2.7V  
IOH = -12mA  
V
V
3.0V  
IOH = -24mA  
3.0V  
I
OL = 100μA  
1.65V to 3.6V  
1.65V  
0.2  
0.3  
IOL = 4mA  
IOL = 8mA  
IOL = 12mA  
IOL = 24mA  
0.45  
0.60  
0.40  
0.55  
0.65  
0.80  
0.60  
0.80  
Low-Level Output  
Voltage  
VOL  
2.3V  
2.7V  
3.0V  
Power Down Leakage  
Current  
IOFF  
II  
VI or VO = 0 or 5.5V  
VI =GND or 5.5V  
0V  
±10  
±5  
±20  
±20  
μA  
μA  
Input Current  
Control Pins  
0 to 3.6V  
Z-state Current  
Including Input Current  
I/O Pins  
VI =GND or 5.5V  
VO = 0 to 5.5V  
IOZ  
3.6V  
±5  
±20  
μA  
ICC  
Supply Current  
VI = GND or VCC, IO = 0  
3.6V  
10  
40  
μA  
μA  
One input at VCC -0.6V  
Io = 0A  
Additional Supply  
Current  
ICC  
2.7V to 3.6V  
500  
5000  
Control  
Pins  
4.0 typical  
5.5 typical  
4.0 typical  
Ci  
Input Capacitance  
VI = GND or VCC  
0V to 3.6V  
pF  
I/O Pins  
5.5 typical  
Switching Characteristics  
-40°C to +85°C  
+85°C to +125°C  
TA = +25°C  
Typ  
Test  
Conditions  
Symbol  
Parameter  
Unit  
VCC  
Min  
1
Max  
12.2  
7.6  
Min  
1
Max  
16.4  
8.6  
Min  
1
Max  
17.9  
9.7  
1.8V ± 0.15V  
2.5V ± 0.3V  
2.7V  
6.0  
3.9  
4.2  
3.8  
7
Propagation  
Delay AN to YN  
1
1
1
Figure 1  
tPD  
ns  
1
7.2  
1
7.8  
1
8.9  
3.3V ± 0.3V  
1.8V ± 0.15V  
2.5V ± 0.3V  
2.7V  
1.5  
1
6.5  
1.5  
1
6.9  
1.5  
1
7.8  
14.8  
10  
16.5  
10.5  
9.0  
18.5  
12.4  
11.5  
8.0  
Enable Time  
OE to YN  
1
4.5  
5.4  
4.4  
7.8  
5
1
1
Figure 1  
Figure 1  
tEN  
ns  
1
8.3  
1
1
3.3V ± 0.3V  
1.8V ± 0.15V  
2.5 V ± 0.3V  
2.7V  
1.5  
1
6.4  
1.5  
1
6.6  
1.5  
1
15.5  
8.7  
16.4  
9.0  
18.2  
9.6  
Disable Time  
OE to YN  
1
1
1
tDIS  
ns  
ns  
1
4.4  
4.1  
8.0  
1
8.2  
1
10.0  
9.0  
3.3V ± 0.3V  
1.7  
7.1  
1.7  
7.4  
1.7  
Output Skew  
Time  
tsk(0)  
3.3V ± 0.3V  
1.0  
1.5  
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July 2014  
© Diodes Incorporated  
74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Operating Characteristics  
TA = +25°C  
Symbol  
Parameter  
Test Conditions  
VCC  
Typ  
9.9  
Unit  
1.8V ± 0.15V  
2.5V ± 0.3V  
3.3V ± 0.3V  
F= 10 MHz  
Outputs Enabled  
Power dissipation  
capacitance per gate  
Cpd  
10.2  
10.6  
pF  
Package Characteristics  
Symbol  
Parameter  
Package  
Test Conditions  
Min  
Typ  
Max  
Unit  
Thermal Resistance  
Junction-to-Ambient  
TSSOP-20  
TSSOP-20  
(Note 9)  
74  
°C/W  
θJA  
Thermal Resistance  
Junction-to-Case  
(Note 9)  
(Note 9)  
(Note 9)  
15  
67  
20  
°C/W  
°C/W  
°C/W  
θJC  
θJA  
θJC  
Thermal Resistance  
Junction-to-Ambient  
V-QFN4525-20  
V-QFN4525-20  
Thermal Resistance  
Junction-to-Case  
Note:  
9. Test conditions for TSSOP-20 and V-QFN4525-20: Devices mounted on 4 layer FR-4 substrate PC board, 2oz copper, with minimum recommended  
pad layout per JESD 51-7.  
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© Diodes Incorporated  
74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Parameter Measurement Information  
TEST  
tPLH/tPHL  
tPLZ/tPZL  
tPHZ/tPZH  
S1  
Open  
Vload  
GND  
Inputs  
VCC  
VM  
VLOAD  
CL  
RL  
V  
VI  
tr/tf  
1.8V ± 0.15V  
2.5V ± 0.2V  
2.7V  
VCC  
2ns  
VCC/2  
VCC/2  
1.5V  
1.5V  
2 x VCC  
2 x VCC  
6V  
30pF  
1KΩ  
500Ω  
500Ω  
500Ω  
0.15V  
0.15V  
0.3V  
VCC  
2ns  
30pF  
50pF  
50pF  
2.7V  
2.7V  
2.5ns  
2.5ns  
3.3V ± 0.3V  
6V  
0.3V  
Voltage Waveform Pulse Duration  
Voltage Waveform Enable and Disable Times  
Low and High Level Enabling  
Voltage Waveform Propagation Delay Times  
Inverting and Non Inverting Outputs  
Notes:  
A. Includes test lead and test apparatus capacitance.  
B. All pulses are supplied at pulse repetition rate 10 MHz.  
C. Inputs are measured separately one transition per measurement.  
D. tPLZ and tPHZ are the same as tdis.  
E. tPZL and tPZH are the same as tEN0  
F. tPLH and tPHL are the same as tPD.  
Figure 1 Load Circuit and Voltage Waveforms  
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© Diodes Incorporated  
74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Marking Information  
(1)  
TSSOP20  
74LVC540A  
Part Number  
Package  
74LVC540AT20  
TSSOP-20  
(2)  
QFN-20 (V-QFN4525-20)  
( Top View )  
YY : Year : 08, 09,10~  
Logo  
WW : Week : 01~52; 52  
Part Number  
74LVC540A  
YY WW X X  
represents 52 and 53 week  
:
XX Internal Codes  
terminal 1  
index area  
Part Number  
74LVC540AQ20  
Package  
V-QFN4525-20  
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© Diodes Incorporated  
74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Package Outline Dimensions (All Dimensions in mm)  
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.  
(1) TSSOP-20  
D
TSSOP-20  
Dim  
A
A1  
A2  
b
c
D
E
E1  
e
Min  
-
Max  
1.20  
0.15  
1.05  
0.30  
0.20  
6.60  
6.60  
4.50  
Typ  
-
-
-
-
-
6.50  
6.40  
4.40  
0.05  
0.80  
0.19  
0.09  
6.40  
6.20  
4.30  
θ2  
E1  
E
0.25  
Gauge Plane  
θ3  
PIN 1  
ID MARK  
0.65 BSC  
0.75  
Seating Plane  
L
0.45  
0.60  
θ1  
e
L
L1  
θ1  
θ2  
θ3  
1.0 REF  
8°  
DETAIL  
0°  
10°  
10°  
-
L1  
14°  
14°  
12°  
12°  
A2  
A
All Dimensions in mm  
b
A1  
(2) QFN-20 (V-QFN4525-20)  
A1  
A3  
A
V-QFN4525-20  
Seati ng Pl ane  
Dim  
A
A1  
A3  
b
D
D2  
E
E2  
e
L
Z
Z1  
Min  
0.75  
0.00  
-
0.18  
4.45  
2.85  
2.45  
0.85  
Max  
0.85  
0.05  
-
0.30  
4.55  
3.15  
2.55  
1.15  
0.50BSC  
0.50  
-
Typ  
0.80  
0.02  
0.15  
0.23  
4.50  
3.00  
2.50  
1.00  
Pi n #1I D  
D
e
Z1 4x  
E
E2  
0.30  
-
-
0.40  
0.385  
0.885  
D2  
-
L
20x  
All Dimensions in mm  
b
20x  
Z
4x  
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74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
Suggested Pad Layout  
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.  
(1) TSSOP-20  
X (20x)  
C
Dimensions  
Value (in mm)  
0.650  
C
X
0.420  
X1  
Y
6.270  
1.789  
Y1  
Y2  
Y1  
Y2  
4.160  
7.720  
Y (20x)  
X1  
(2) QFN-20 (V-QFN4525-20)  
X4  
X3  
Dimensions  
Value (in mm)  
0.500  
C
X
0.330  
X1  
X2  
X3  
X4  
Y
0.600  
3.200  
3.830  
4.800  
X1  
X2  
Y3  
Y1  
0.600  
Y1  
Y2  
Y3  
1.200  
0.830  
2.800  
Y2  
Y
X
C
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74LVC540A  
Document number: DS35890 Rev. 1 - 2  
74LVC540A  
IMPORTANT NOTICE  
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,  
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE  
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).  
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes  
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the  
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or  
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume  
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated  
website, harmless against all damages.  
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.  
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and  
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or  
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.  
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings  
noted herein may also be covered by one or more United States, international or foreign trademarks.  
This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the  
final and determinative format released by Diodes Incorporated.  
LIFE SUPPORT  
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express  
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:  
A. Life support devices or systems are devices or systems which:  
1. are intended to implant into the body, or  
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the  
labeling can be reasonably expected to result in significant injury to the user.  
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the  
failure of the life support device or to affect its safety or effectiveness.  
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and  
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any  
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related  
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its  
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.  
Copyright © 2014, Diodes Incorporated  
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Document number: DS35890 Rev. 1 - 2  

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ONSEMI

74LVC540D

IC LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver
NXP

74LVC540D-T

IC LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver
NXP

74LVC540DB

IC LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver
NXP

74LVC540PW

IC LVC/LCX/Z SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, Bus Driver/Transceiver
NXP

74LVC541A

Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-State
NXP

74LVC541A

Low-Voltage CMOS Octal Buffer Flow Through Pinout
ONSEMI

74LVC541A

Octal Buffer/Line Driver with 5V Tolerant Inputs/Outputs
SGMICRO

74LVC541A-Q100

Octal buffer/line driver with 5 V tolerant inputs/outputs;3-state
NEXPERIA

74LVC541ABQ

Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-stateProduction
NEXPERIA

74LVC541ABQ-Q100

Octal buffer/line driver with 5 V tolerant inputs/outputs;3-state
NEXPERIA

74LVC541AD

Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-State
NXP