74LVCE1G86FZ4_技术文档

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Description

Pin Assignments

(Top View)

The 74LVCE1G86 is a single 2-input positive EXCLUSIVE

OR gate with a standard totem pole output. The device is

designed for operation with a power supply range of 1.4V to

5.5V. The inputs are tolerant to 5.5V allowing this device to

be used in a mixed voltage environment. The device is fully

specified for partial power down applications using I_OFF. The

I_OFFcircuitry disables the output preventing damaging current

backflow when the device is powered down.

Vcc

Y

1

2

3

5

4

A

B

GND

SOT25 / SOT353

The gate performs the positive Boolean function:

Y = A ⊕ B or Y = AB + AB

(Top View)

Features

6

1

2

3

A

B

Vcc

•

Extended Supply Voltage Range from 1.4 to 5.5V

Switching speed characterized for operation at 1.5V

Offers 30% speed improvement over LVC at 1.8V.

± 24mA Output Drive at 3.3V

5

4

NC

Y

GND

CMOS low power consumption

DFN1410 (Note 2)

IOFF Supports Partial-Power-Down Mode Operation

Inputs accept up to 5.5V

Applications

ESD Protection Tested per JESD 22

Exceeds 200-V Machine Model (A115-A)

Exceeds 2000-V Human Body Model (A114-A)

Latch-Up Exceeds 100mA per JESD 78, Class II

Range of Package Options

•

Voltage Level Shifting

Bus Driver / Repeater

Parity Bit Generation

Selectable signal Inverter

Power Down Signal Isolation

General Purpose Logic

Wide array of products such as.

•

Direct Interface with TTL Levels

SOT25, SOT353 and DFN1410: Assembled with “Green”

Molding Compound (no Br, Sb)

o

PCs, networking, notebooks, netbooks, PDAs

Computer peripherals, hard drives, CD/DVD ROM

TV, DVD, DVR, set top box

Cell Phones, Personal Navigation / GPS

MP3 players ,Cameras, Video Recorders

•

Lead Free Finish/ RoHS Compliant (Note 1)

Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at

http://www.diodes.com/products/lead_free.html.

2. Pin 2 and pin 5 of the DFN1410 package are internally connected.

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Pin Descriptions

Pin Name

Description

A

B

Data Input

Ground

GND

Y

Data Output

Supply Voltage

Vcc

Logic Diagram

1

4

A

Y

2

B

Function Table

Inputs

Output

A

H

L

B

H

L

Y

L

H

L

H

L

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Absolute Maximum Ratings (Note 3)

Symbol

Description

Rating

2

Unit

KV

V

ESD HBM

Human Body Model ESD Protection

Machine Model ESD Protection

Supply Voltage Range

ESD MM

200

V_CC

V_I

-0.5 to 6.5

-0.3 to V_CC+0.5

-50

V

Input Voltage Range

V

V_o

I_IK

Voltage applied to output in high impedance or I_OFFstate

Voltage applied to output in high or low state

Input Clamp Current V_I<0

V

mA

°C

I_OK

I_O

Output Clamp Current

-50

Continuous output current

±50

Continuous current through Vdd or GND

Operating Junction Temperature

Storage Temperature

±100

T_J

-40 to 150

-65 to 150

T_STG

Note: 3. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device

operation should be within recommend values.

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Recommended Operating Conditions (Note 4)

Symbol

Parameter

Min

1.4

Max

Unit

V

Operating

5.5

V_CC

Operating Voltage

Data retention only

1.2

V

_CC= 1.4 V to 1.95 V

0.65 X V_CC

1.7

V_CC= 2.3 V to 2.7 V

V_CC= 3 V to 3.6 V

V_CC= 4.5 V to 5.5 V

V_IH

High-level Input Voltage

V

2

0.7 X V_CC

V

_CC= 1.4 V to 1.95 V

0.35 X V_CC

V_CC= 2.3 V to 2.7 V

V_CC= 3 V to 3.6 V

V_CC= 4.5 V to 5.5 V

0.7

0.8

0.3 X V_CC

5.5

V_CC

-3

V_IL

Low-level input voltage

V_I

Input Voltage

0

V

V_O

Output Voltage

Vcc=1.4 V

V_CC= 1.65 V

V_CC= 2.3 V

-4

-8

I_OH

High-level output current

Low-level output current

mA

-16

-24

-32

3

V_CC= 3 V

V_CC= 4.5 V

Vcc=1.4 V

V_CC= 1.65 V

V_CC= 2.3 V

4

8

I_OL

16

V_CC= 3 V

24

V_CC= 4.5 V

32

V

_CC= 1.4 to 3V

20

Input transition rise or fall

rate

Δt/ΔV

ns/V

ºC

V_CC= 3.3 V ± 0.3 V

V_CC= 5 V ± 0.5 V

10

5

Operating free-air

temperature

T_A

-40

85

Note: 4. Unused inputs should be held at Vcc or Ground.

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Electrical Characteristics (All typical values are at Vcc = 3.3V, T_A= 25°C)

Over recommended free-air temperature range (unless otherwise noted)

Symbol

Parameter

Test Conditions

I_OH= -100μA

I_OH= -3mA

I_OH= -4mA

I_OH= -8mA

I_OH= -16mA

I_OH= -24mA

I_OH= -32mA

I_OL= 100μA

I_OL= 3mA

Vcc

1.4 V to 5.5V

1.4 V

Min

V_CC– 0.1

1.05

1.2

Typ.

Max

Unit

1.65 V

High Level Output

Voltage

V_OH

2.3V

1.9

V

2.4

3 V

2.3

4.5 V

1.4 V to 5.5V

1.4 V

3.8

0.1

.4

I_OL= 4mA

1.65 V

0.45

0.3

V_OL

High-level Input Voltage I_OL= 8mA

I_OL= 16mA

2.3V

V

0.4

3 V

I_OL= 24mA

0.55

± 5

I_OL= 32mA

4.5

I_I

Input Current

V_I= 5.5 V or GND

0 to 5.5 V

μA

Power Down Leakage

Current

V_Ior V_O= 5.5V

I_OFF

0

± 10

10

V_I= 5.5V of GND

I_O=0

I_CC

Supply Current

1.4 V to 5.5V

μA

One input at V_CC

0.6 V Other inputs

at V_CCor GND

–

Additional Supply

Current

ΔI_CC

3 V to 5.5V

500

μA

C_i

Input Capacitance

V_i= V_CC– or GND

SOT25

3.3

3.5

204

371

430

52

pF

(Note 5)

Thermal Resistance

Junction-to-Ambient

θ_JA

^oC/W

SOT353

DFN1410

SOT25

Thermal Resistance

Junction-to-Case

θ_JC

^oC/W

SOT353

143

190

DFN1410

Note: 5. Test condition for SOT25, SOT353, and DFN1410: Device mounted on FR-4 substrate PC board, 2oz copper, with minimum

recommended pad layout.

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Switching Characteristics

Over recommended free-air temperature range, CL = 15pF (see Figure 1)

Vcc = 1.5 V Vcc = 1.8 V Vcc = 2.5 V Vcc = 3.3 V Vcc = 5 V

± 0.1V ± 0.15V ± 0.2V ± 0.3V ± 0.5V

Min Max Min Max Min Max Min Max Min Max

From

(Input) (OUTPUT)

TO

Parameter

Unit

t_pd

A or B

Y

2.1 9.1 1.4 6.3 0.8 3.6 0.6 3.2 0.7 2.9

ns

Over recommended free-air temperature range, CL = 30 or 50pF as noted (see Figure 2)

Vcc = 1.5 V Vcc = 1.8 V Vcc = 2.5 V Vcc = 3.3 V Vcc = 5 V

± 0.1V ± 0.15V ± 0.2V ± 0.3V ± 0.5V

Min Max Min Max Min Max Min Max Min Max

From

(Input) (OUTPUT)

TO

Parameter

Unit

t_pd

A or B

Y

3.5 9.9 2.4 6.9 1.4 4.4 4.1 0.9 3.6

1

ns

Operating Characteristics

T_A= 25 ºC

Vcc = 1.5 V Vcc = 1.8 V Vcc = 2.5 V Vcc = 3.3 V Vcc = 5 V Unit

Test

Parameter

Conditions

TYP

Power

C_pd

dissipation

f = 10 MHz

22

24

pF

capacitance

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Parameter Measurement Information

Inputs

Vcc

V_M

C_L

R_L

V_I

t_r/t_f

1.5V±0.1V

1.8V±0.15V

2.5V±0.2V

3.3V±0.3V

5V±0.5V

V_CC

3V

≤2ns

V_CC/2

1.5V

15pF

1MΩ

≤2ns

≤2.5ns

V_CC

V_CC/2

Voltage Waveform

Pulse Duration

Voltage Waveform

Propagation Delay Times

Inverting and Non Inverting Outputs

Notes: A. Includes test lead and test apparatus capacitance.

B. All pulses are supplied at pulse repetition rate ≤ 10 MHz.

C. Inputs are measured separately one transition per measurement.

D. t_PLHand t_PHLare the same as t_PD.

Figure 1. Load Circuit and Voltage Waveforms

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Parameter Measurement Information (Continued)

Inputs

Vcc

V_M

C_L

R_L

V_I

t_r/t_f

1.5V±0.15

1.8V±0.15V

2.5V±0.2V

3.3V±0.3V

5V±0.5V

V_CC

3V

≤2ns

V_CC/2

1.5V

30pF

50pF

1KΩ

≤2ns

500Ω

≤2.5ns

V_CC

V_CC/2

Voltage Waveform

Pulse Duration

Voltage Waveform

Propagation Delay Times

Inverting and Non Inverting Outputs

Notes: A. Includes test lead and test apparatus capacitance.

B. All pulses are supplied at pulse repetition rate ≤ 10 MHz.

C. Inputs are measured separately one transition per measurement.

D. t_PLHand t_PHLare the same as t_PD.

Figure 2. Load Circuit and Voltage Waveforms

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Ordering Information

7” Tape and Reel

Package

Code

Packaging

(Note 5)

SOT25

SOT353

DFN1410

Device

Quantity

Part Number Suffix

74LVCE1G86W5-7

74LVCE1G86SE-7

74LVCE1G86FZ4-7

W6

SE

FZ4

3000/Tape & Reel

5000/Tape & Reel

-7

Note: 6. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at

http://www.diodes.com/datasheets/ap02001.pdf.

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Marking Information

(1) SOT25 and SOT353

(Top View)

5

1

4

XX : Identification code

Y : Year 0~9

W : Week : A~Z : 1~26 week;

a~z : 27~52 week; z represents

52 and 53 week

W X

XX Y

X : A~Z : Internal code

2

3

Part Number

Package

Identification Code

74LVCE1G86W5

74LVCE1G86SE

SOT25

SOT353

PX

(2) DFN1410

(Top View)

XX : Identification Code

Y : Year : 0~9

XX

W : Week : A~Z : 1~26 week;

a~z : 27~52 week; z represents

52 and 53 week

Y W X

X : A~Z : Internal code

Part Number

74LVCE1G86FZ4

Package

Identification Code

DFN1410

PX

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Package Outline Dimensions (All Dimensions in mm)

(1) Package Type: SOT25

(2) Package Type: SOT353

6x-0.42

C

L

0.10/0.30

C

L

1.3

C

L

2x-0.65

C

L

Gauge Plane

PIN 1

Land Pattern Recommendation

(unit:mm)

Top View

0.40/0.45

0.65Bsc.

C

L

0.25/0.40

Detail"A"

"A"

1.8/2.2

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Package Outline Dimensions (All Dimensions in mm)

(3) Package Type: DFN1410

0.10 C

6x-

Seating Plane

6x-0.25

0.08 C

C

Side View

1.35/1.45

0.50Typ.

A

B

4x-0.50Typ.

Land Pattern Recommendation

(mm)

(Pin #1 ID)

Top View

2X-

0.25 B

0.10(4x)

6x-0.15/0.25

0.10

C A B

Bottom View

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

Taping Orientation (Note 7)

For DFN1410

Note: 7. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2

74LVCE1G86

SINGLE 2 INPUT EXCLUSIVE OR GATE

IMPORTANT NOTICE

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS

DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A

PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other

changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability

arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any

license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described

herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies

whose products are represented on Diodes Incorporated website, harmless against all damages.

Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized

sales channel.

Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall

indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees

arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.

Products described herein may be covered by one or more United States, international or foreign patents pending. Product names

and markings noted herein may also be covered by one or more United States, international or foreign trademarks.

LIFE SUPPORT

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without

the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided

in the labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected

to cause the failure of the life support device or to affect its safety or effectiveness.

Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or

systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements

concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems,

notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further,

Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes

Incorporated products in such safety-critical, life support devices or systems.

www.diodes.com

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December 2010

74LVCE1G86

Document number: DS32215 Rev. 2 - 2


型号：	74LVCE1G86FZ4
厂家：	DIODES INCORPORATED
描述：	SINGLE 2 INPUT EXCLUSIVE OR GATE 单路2输入异或门输入元件
文件：	总14页 (文件大小：266K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74LVCE1G86FZ4 [DIODES]

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