AP393SMG-13 [DIODES]
Comparator, 2 Func, 12000uV Offset-Max, 300ns Response Time, PDSO8, GREEN, SOP-8;型号: | AP393SMG-13 |
厂家: | DIODES INCORPORATED |
描述: | Comparator, 2 Func, 12000uV Offset-Max, 300ns Response Time, PDSO8, GREEN, SOP-8 光电二极管 |
文件: | 总14页 (文件大小:315K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Features
General Description
The AP393 consists of two independent precision voltage
comparators with an offset voltage specification as low as 2.0
mV max for two comparators which were designed specifically to
operate from a single power supply over a wide range of
voltages. Operation from split power supplies is also possible
and the low power supply current drain is independent of the
magnitude of the power supply voltage. These comparators also
have a unique characteristic in that the input common-mode
voltage range includes ground, even though operated from a
single power supply voltage.
•
Wide supply
- Voltage range: 2.0V to 36V
- Single or dual supplies: ±1.0V to ±18V
Very low supply current drain (0.4 mA) – independent
of supply voltage
Low input biasing current: 25 nA
Low input offset current: ±5 nA
Maximum offset voltage: ±3 mV
•
•
•
•
•
•
Input common-mode voltage range includes ground
Differential input voltage range equal to the power
supply voltage
Application areas include limit comparators, simple analog to
digital converters; pulse, squarewave and time delay generators;
wide range VCO; MOS clock timers; multivibrators and high
voltage digital logic gates. The AP393 is designed to directly
interface with TTL and CMOS. When operated from both plus
and minus power supplies, the AP393 will directly interface with
MOS logic where their low power drain is a distinct advantage
over standard comparators.
•
•
Low output saturation voltage: 250 mV at 4 mA
Output voltage compatible with TTL, DTL, ECL, MOS
and CMOS logic systems
Packages: 8-pin SOP-8L and DFN (Under
Development) Green packages
•
Advantages
•
•
•
•
•
•
High precision comparators
Reduced VOS drift over temperature
Eliminates need for dual supplies
Allows sensing near ground
Compatible with all forms of logic
Power drain suitable for battery operation
Pin Assignment
(Top View)
1
2
3
4
8
7
6
5
V+
OUTPUT 1
INVERTING INPUT 1
NON-INVERTING INPUT 1
GND
OUTPUT 2
AP393
INVERTING INPUT 2
NON-INVERTING INPUT 2
SOP-8L/DFN-8L
Pin Descriptions
Pin
Pin Name
No.
Pin
No.
Description
Pin Name
Description
OUTPUT 1
INVERTING
INPUT 1
1
Channel 1 Output
NON-INVERTING
INPUT 2
5
Channel 2 Positive Input
Channel 2 Negative Input
2
Channel 1 Negative Input
INVERTING
INPUT 2
6
NON-INVERTING
INPUT 1
3
4
Channel 1 Positive Input
Ground
OUTPUT 2
7
8
Channel 2 Output
Vcc
GND
V+
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Ordering Information (Note 1)
A P 3 9 3 X X X
Package
Packing
Lead-Free
Blank : Lead-Free Blank : Tube or bulk
SM : SOP-8L
FE : DFN
-7/-13 : Taping
G : Green
7” Tape and Reel
13” Tape and Reel
Package
Code
Device
Packaging
Quantity
Part Number
Suffix
Quantity
Part Number
Suffix
10,000/Tape &
Reel
10,000/Tape &
Reel
AP393SM
AP393FE
SM
SOP-8L
DFN
3000/Tape & Reel
3000/Tape & Reel
-7
-7
-13
FE
-13
Block Diagram
1
8
7
+
OUTPUT 1
INVERTING INPUT 1
NON-INVERTING INPUT 1
GND
V
2
3
4
OUTPUT 2
A
B
-
+
+
-
6
5
INVERTING INPUT 2
NON-INVERTING INPUT 2
V+
3.5µA
100µA
3.5µA
100µA
Q2
Q3
+INPUT
-INPUT
Q1
Q4
OUTPUT
Q5
Q6
Q8
Q7
Note 1: For Packaging Details, go to our website at http://www.diodes.com/datasheets/ap02007.pdf.
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Absolute Maximum Ratings (Note 11)
Symbol
Parameter
Rating
36
Unit
V
V
V
mA
VCC
VIN
VIN
ICC
Supply Voltage
Differential Input Voltage (Note 9)
Input Voltage
Input Current (VIN-0.3V) (Note 4)
36
-0.3 to +36
50
SOP-8L (SM)
DFN (FE)
600
250
PD
Power Dissipation (Note 2)
mW
Output Short-Circuit to Ground (Note 3)
Operating Temperature Range
Storage Temperature Range
Lead Temperature Range (Soldering, 10 sec)
DFN
Continuous
0 to +70
-65 to +150
+260
TOP
TST
TLead
oC
oC
oC
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
+260
+215
+220
1300
Soldering Information
oC
V
SOP-8L
ESD rating (1.5kΩ in with 100pF)
Electrical Characteristics (VCC=5V, TA=25oC, unless otherwise stated)
Symbol
Parameter
Conditions
Min.
Typ. Max. Unit
VOFFSET Input Offset Voltage
IBIAS Input Bias Current
IOFFSET Input Offset Current
Input Common Mode Voltage Range
Supply Current
(Note 10)
-
7.0
12.0
mV
IIN(+) or IIN(-) with Output In Linear
Range, VCM=0V (Note 6)
IIN(+) - IIN(-) VCM=0V
-
25
250
nA
-
0
-
5.0
-
0.4
1
50
V+ -1.5
1
nA
V
V+ =30V (Note 7)
V+ =5V
ICC
RL=∞
mA
V+ =36V
-
2.5
RL > 15kΩ, V+ =15V
VO=1V to 11V
Voltage Gain
50
200
-
V/mV
VIN=TTL Logic Swing,
VREF=1.4V, VRL=5V, RL=5.1kΩ
VRL=5V, RL=5.1kΩ (Note 8)
Large Signal Response Time
Response Time
-
-
300
1.3
-
-
ns
µs
IO(Sink)
VSAT
IO(Leak)
Output Sink Current
Saturation Voltage
Output Leakage Current
VIN(-)=1V, VIN(+)=0, VO <1.5V
VIN(-)=1V, VIN(+)=0, ISINK < 4mA
VIN(-)=0, VIN(+)=1V, VO=5V
6.0
-
-
16
250
0.1
-
400
-
mA
mV
nA
Electrical Characteristics (VCC=5V) (Note 5)
Symbol
Parameter
Conditions
Min.
-
-
Typ. Max. Unit
VOFFSET Input Offset Voltage
IOFFSET Input Offset Current
(Note 10)
-
-
12
mV
nA
IIN(+) -IIN(-), VCM=0V
150
IIN(+) or IIN(-) with Output In Linear
Range, VCM=0V (Note 6)
V+ =30V (Note 7)
VIN(-)=1V, VIN(+)=0, ISINK < 4mA
VIN(-)=0, VIN(+)=1V, VO=30V
Keep All VIN’s > 0V (or V-, if Used),
(Note 9)
IBIAS
Input Bias Current
-
-
400
nA
Input Common Mode Voltage Range
Saturation Voltage
Output Leakage Current
0
-
-
-
-
-
V+ -2.0
700
V
mV
µA
VSAT
IO(Leak)
1.0
Differential Input Voltage
-
-
36
V
DS30737 Rev. 2 - 2
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AP393
© Diodes Incorporated
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Note 2: For operating at high temperatures, the AP393 must be derated based on a 125°C maximum junction temperature and a
thermal resistance of 170°C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient.
The AP393 must be derated based on a 150°C maximum junction temperature. The low bias dissipation and the “ON-OFF”
characteristic of the outputs keeps the chip dissipation very small (PD <100 mW), provided the output transistors are allowed
to saturate.
Note 3: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to
ground, the maximum output current is approximately 20 mA independent of the magnitude of V+.
Note 4: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base
junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this
diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output
voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input
is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which is negative,
again returns to a value greater than -0.3V.
Note 5: The AP393 temperature specifications are limited to 0°C < TA < +70°C.
Note 6: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent
of the state of the output so no loading change exists on the reference or input lines.
Note 7: The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
upper end of the common-mode voltage range is V+-1.5V at 25°C, but either or both inputs can go to 36V without damage,
independent of the magnitude of V+.
Note 8: The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be
obtained, see typical performance characteristics section.
Note 9: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than
-0.3V (or 0.3V below the magnitude of the negative power supply, if used).
Note 10: At output switch point, VO ~ 1.4V, RS=0Ω with V+ from 5V to 30V; and over the full input common-mode range (0V to V+-1.5V),
at 25°C.
Note 11: Refer to RETS193AX for AP393 military specifications.
Typical Circuit (VCC =5.0VDC)
+5.0VDC
V+
3.0K
+VIN
+
100K
+
VO
DP393
DP393
-
+VREF
-
1/4 MM54CXX
Driving CMOS
Basic Comparator
V+
+5VDC
4.3K
100K
V+
0
75 pF
100K
-
1:100kHz
10K
+
VO
1/2 AP393
AP393
+
1/4 DM54XX
100K
-
V+
100K
Squarewave Oscillator
Driving TTL
DS30737 Rev. 2 - 2
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AP393
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (VCC =5.0VDC)
V+
V+
R1
1M
D1
*
15K
1N914
200K
2.0K
100K
R2
D2
100K 1N914
V+
0
-V+
0
-
80 pF
1M
6µs
60µs
tOt1
0.1uF
-
t2
VO
1/2 AP393
VO
1/2 AP393
+
+
+15VDC
1M
200K
CRYSTAL
f=100KHz
1M
*For large ratios of R1/R2, D1 can
be omitted
Pulse Generator
Crystal Controlled Oscillator
V+
V+
100K
100K
500pF
1/2 AP393
-
3.0K
5.1K
3.0K
10
+
+VC
0.1µF
0.01µF
OUTPUT1
FREQUENCY
CONTROL
VOLTAGE
INPUT
+
1/2 AP393
V+/2
-
20K
50K
20K
OUTPUT2
V+/2
-
1/2 AP393
+
Two-Decade High Frequency VCO
V*=+30VDC
+250mVDC < VC < +50VDC
700Hz < fO < 100KHz
V+
V+
3K
-
+VREF
3.0K
+VIN
+
VO
1/2 AP393
1/2 AP393
VO
10K
+
+VIN
-
+VREF
10M
Non-Inverting Comparator with
Hysteresis
Basic Comparator
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (VCC =5.0VDC)
V+
V+
3K
6.2K
+VIN
-
-
1/2 AP393
1/2 AP393
VO
VO
1M
V+
STROBE
INPUT
+
+
*
1M
1M
* OR LOGIC GATE WITHOUT PULL-UP
RESISTOR
Inverting Comparator with
Hysteresis
Output Strobing
V+
V+
200K
3K
39K
3K
+0.075V
-
+0.375V
-
1K
1K
100K
f
1/2 AP393
100K
f
1/2 AP393
A
B
C
A
B
C
100K
100K
100K
100K
+
+
1K
1K
V+
0
"0" "1"
V+
0
"0" "1"
Or Gate
AND Gate
V+ (12VDC
)
V+
2RS
+VREF HI
R4
3K
+
100K
10K
10K
D1
-
1/2 AP393
100K
LAMP
12 ESB
VOUT
1/2 AP393
-
V+
0
"0" "1"
+
RS
A
B
D2
D3
+VIN
+
C
D
D4
2N2222
1/2 AP393
2RS
ALL DIODES 1N914
-
+VREF LOW
Large Fan-in AND Gate
Limit Comparator
DS30737 Rev. 2 - 2
6 of 14
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (VCC =5.0VDC)
V+
+
3.0K
VO
1/2 AP393
2N2222
100K
+VIN1
-
5.1K
-
100K
-VIN2
1/2 AP393
+
+
1/2 AP393
-
Comparing Input Voltages of
Opposite Polarity
ORing the Outputs
V+
V+
+
100K
5.1K 5.1K
100K
-
0
5.1K
t0
1M
10K
100pF
1N914
VIN
-
1N914
1M
1/2 AP393
VO
1/2 AP393
VO
+
+
V+
20M
1ms
PW
t0
0.001µF
1N914
0
t1
1M
10K
Zero Crossing Detector
(Single Power Supply)
One-Shot Multivibrator
V+
15K
51K
100K
100K
V+
0
S
+15V
S
R
+
0
R
V+
0
1/2 AP393
VO
100K
-
Bi-Stable Multivibrator
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Circuit (Continued) (VCC =5.0VDC)
V+
1M
1M
15K
10M
560K
-
100K
-
+VIN
V+
0
40µs
100K
1/2 AP393
t0
t1
+4V
1µs
0
+
100pF
1/2 AP393
VO
+
10M
240K
62K
One-Shot Multivibrator with Input Lock Out
V+
3.0K
10M
10K
15K
200K
10K
+
V+
VO3
1/2 AP393
V+
V3
0
-
t0
t3
3.0K
10M
51K
10K
-
V+
0
VC1
10K
+VIN
+
1/2 AP393
C1
0.001µF
t0
t4
V+
0
1/2 AP393
VO2
+
V+
V2
INPUT GATING SIGNAL
t0 t2
-
3.0K
10M
51K
10K
V+
0
V+
V3
+
t0 t1
V2
V1
VC1
1/2 AP393
VO1
V1
-
0
t0 t1 t2 t3 t4
t
51K
Time Delay Generator
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Split-Supply Applications (V+=+15VDC and V- =-15 VDC)
V+
51K
+
2K 3.9K
10K
51K
2.4K
2.4K
-
φ A
1/2 AP393
+
1/2 AP393
1/2 AP393
8.2K
2K
-
φ B
+
5.1K
1/2 AP393
-
50pF
6.8K
V-
MOS Clock Driver
V+
V+
+
+
5.1K
VO
5.1K
VO
+
VIN
+
VIN
1/2 AP393
1/2 AP393
-5 VDC
-
-
V-
V
Comparator With a
Negative Reference
Zero Crossing Detector
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Typical Characteristics
Supply Current
Input Current
Output Saturation Voltage
Response Time for Various Input
Overdrives—Negative Transition
Response Time for Various Input
Overdrives—Positive Transition
DS30737 Rev. 2 - 2
10 of 14
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Application Information
The AP393 are high gain, wide bandwidth devices which, like
most comparators, can easily oscillate if the output lead is
inadvertently allowed to capacitively couple to the inputs via
stray capacitance. This shows up only during the output voltage
transition intervals as the comparator change states. Power
supply bypassing is not required to solve this problem. Standard
PC board layout is helpful as it reduces stray input-output
coupling. Reducing the input resistors to < 10kΩ reduces the
feedback signal levels and finally, adding even a small amount
(1.0 to 10 mV) of positive feedback (hysteresis) causes such a
rapid transition that oscillations due to stray feedback are not
possible. Simply socketing the IC and attaching resistors to the
pins will cause input-output oscillations during the small
transition intervals unless hysteresis is used. If the input signal is
a pulse waveform, with relatively fast rise and fall times,
hysteresis is not required. All input pins of any unused
comparators should be tied to the negative supply.
prevent the input voltages from going negative more than -0.3
VDC (at 25°C). An input clamp diode can be used as shown in the
applications section.
The output of the AP393 is the uncommitted collector of a
grounded-emitter NPN output transistor. Many collectors can be
tied together to provide an output OR’ing function. An output
pull-up resistor can be connected to any available power supply
voltage within the permitted supply voltage range and there is no
restriction on this voltage due to the magnitude of the voltage
which is applied to the V+ terminal of the AP393 package. The
output can also be used as a simple SPST switch to ground
(when a pull-up resistor is not used). The amount of current
which the output device can sink is limited by the drive available
(which is independent of V+) and the β of this device. When the
maximum current limit is reached (approximately 16mA), the
output transistor will come out of saturation and the output
voltage will rise very rapidly. The output saturation voltage is
limited by the approximately 60Ω rSAT of the output transistor.
The low offset voltage of the output transistor (1.0 mV) allows
the output to clamp essentially to ground level for small load
currents.
The bias network of the AP393 establishes a drain current which
is independent of the magnitude of the power supply voltage
over the range of from 2.0 VDC to 30 VDC. It is usually
unnecessary to use a bypass capacitor across the power supply
line.
The differential input voltage may be larger than V+ without
damaging the device (Note 8). Protection should be provided to
DS30737 Rev. 2 - 2
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Marking Information
(1) SOP-8L
(Top view)
Logo
AP393
Y WW
Part Number
Blank : Lead Free
G : Green
X
WW: Nth week
Y: Year
(2) DFN
(Top view )
Marking Code : D6
D6
Blank : Lead Free
Green : Underlined First code
Marking Code Table
Device
AP393SM
AP393FE
Package
SOP-8L
DFN
Marking Code
Date Code
AP393
D6
YWW
-
Date Code Key
Year
2006
2007
2008
2009
2010
Code
T
U
V
W
X
Month
Code
Jan
Feb March Apr
May
Jun
Jul
Aug Sep
Oct
Nov
Dec
1
2
3
4
5
6
7
8
9
O
N
D
DS30737 Rev. 2 - 2
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AP393
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
Package Information (All Dimensions in mm)
(1) DFN2116-8
2.05/2.175
Typ 2.10
1.60/1.80 Typ 1.70
0.275/0.375
Typ 0.325
Typ 0.50 0.20/0.30
Typ 0.25
(2) SOP-8L
8X .02
8X 2.2
8
1
5
4
.20
5.90/6.10
Typ 6.00
6X 1.27
RECOMMENDED LAND PATTERN
0.30/0.50
Typ 0.40
3.80/3.90
Typ 3.85
0.60/0.70
Typ 0.65
0.35
7°
0.15/0.25
Typ 0.20
1.40/1.50
Typ 1.45
0.08/0.25
Typ 0.15
3.85/3.95
Typ 3.90
1.27
4.85/4.95
Typ 4.90
DS30737 Rev. 2 - 2
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AP393
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AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2
14 of 14
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AP393
© Diodes Incorporated
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