PT7A7515P [DIODES]
Power Management Circuit, PDIP8,;
| 型号： | PT7A7515P |
| 厂家： | 
DIODES INCORPORATED |
| 描述： | Power Management Circuit, PDIP8, 光电二极管 |
| 文件： | 总14页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Features
Discription
• Precision supply-voltage monitor
- 4.63V (PT7A7511, 7521, 7531)
- 4.38V (PT7A7512, 7522, 7532)
- 3.08V (PT7A7513, 7523, 7533)
- 2.93V (PT7A7514, 7524, 7534)
- 2.63V (PT7A7515, 7525, 7535)
The PT7A751X/752X/753X family microprocessor (µP)
supervisory circuits are targeted to improve reliability and
accuracy of power-supply circuitry in µP’s systems.
These devices reduce the complexity and number of
components required to monitor power-supply and battery
functions.
• 200ms reset pulse width
The main functions are:
• Debounced TTL/CMOS-compatible manual-
reset input
1. Asserting reset output during power-up, power-down
and brownout conditions for µP system;
2. Detecting power failure or low-battery conditions with
a 1.25V threshold detector;
• Independent watchdog timer 1.6sec time-out (not
available for PT7A7531 - 7535)
• Reset output signal:
3. Watchdog functions (not for PT7A753x).
- Active-low only (PT7A7511 - 7515)
- Active-high only (PT7A7521 - 7525)
- Active-high and active-low (PT7A7531 - 7535)
• Voltage monitor for power-fail or low battery warning
• Guaranteed RESET/RESET valid at VCC = 1.2V
Applications
• Power-supply circuitry in µP systems
PT0082L(03/06)
Ver:4
1
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Ordering Information
Part No.
Package
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
Part No.
Package
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
Part No.
Package
Die Form
Die Form
Die Form
Die Form
Die Form
Die Form
PT7A7511P
PT7A7521P
PT7A7531P
PT7A7512P
PT7A7522P
PT7A7532P
PT7A7511W
PT7A7521W
PT7A7531W
PT7A7512W
PT7A7522W
PT7A7532W
PT7A7511DE
PT7A7521DE
PT7A7531DE
PT7A7512DE
PT7A7522DE
PT7A7532DE
PT7A7513P
PT7A7523P
PT7A7533P
PT7A7514P
PT7A7524P
PT7A7534P
PT7A7515P
PT7A7525P
PT7A7535P
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PDIP-8
PT7A7513W
PT7A7523W
PT7A7533W
PT7A7514W
PT7A7524W
PT7A7534W
PT7A7515W
PT7A7525W
PT7A7535W
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
PT7A7513DE
PT7A7523DE
PT7A7533DE
PT7A7514DE
PT7A7524DE
PT7A7534DE
PT7A7515DE
PT7A7525DE
PT7A7535DE
Die Form
Die Form
Die Form
Die Form
Die Form
Die Form
Die Form
Die Form
Die Form
Note: Lead free package is available by add E after each part no. For example: PT7A7511PE for PDIP-8 lead free.
Function Comparison
Function Table of PT7A75xx Family
Nom. Reset Time Nom. Watch dog
Reset
Th re s h o l d
Reset Active Low
or High
Manu al Re se t
Input
Part No.
Power Fail Comp.
(ms), tRS
Time (sec), tWD
PT7A7511
PT7A7521
PT7A7531
PT7A7512
PT7A7522
PT7A7532
PT7A7513
PT7A7523
PT7A7533
PT7A7514
PT7A7524
PT7A7534
PT7A7515
PT7A7525
PT7A7535
4.63V
4.63V
4.63V
4.38V
4.38V
4.38V
3.08V
3.08V
3.08V
2.93V
2.93V
2.93V
2.63V
2.63V
2.63V
LOW
HIGH
200
200
200
200
200
200
200
200
200
200
200
200
200
200
200
1.6
1.6
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
1.25V detector
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
LOW, HIGH
LOW
unavailable
1.6
HIGH
1.6
LOW, HIGH
LOW
unavailable
1.6
HIGH
1.6
LOW, HIGH
LOW
unavailable
1.6
HIGH
1.6
LOW, HIGH
LOW
unavailable
1.6
HIGH
1.6
LOW, HIGH
unavailable
PT0082L(03/06)
Ver:4
2
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Block Diagram
Block Diagram of PT7A7511-7515/7521-7525
Watchdog
Transition Detector
Watchdog Timer
WDI
WDO
V
cc
Timebase for Reset
& Watchdog
250uA
MR
Vcc
RESET
Reset Generator
(RESET)
VRST
PFI
PFO
1.25V
Block Diagram of PT7A7531-7535
Vcc
250uA
RESET
RESET
MR
Vcc
Reset Generator
VRST
PFI
PFO
1.25V
PT0082L(03/06)
Ver:4
3
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Pin Information
Pin Configuration
PT7A7511P-7515P
PT7A7511W-7515W
8-Pin PDIP/8-Pin SOIC
PT7A7521P-7525P
PT7A7521W-7525W
8-Pin PDIP/8-Pin SOIC
PT7A7531P-7535P
PT7A7531W-7535W
8-Pin PDIP/8-Pin SOIC
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
WDO
RESET
WDI
WDO
RESET
WDI
RESET
RESET
NC
MR
V CC
GND
PFI
MR
V CC
GND
PFI
MR
V CC
GND
PFI
PFO
PFO
PFO
Top View
Pin Description
Pin Name
Type
Description
Manual-Reset: triggers a reset pulse when pulled below 0.8V, active low. It has an internal 250µA
pull-up current and be driven from a TTL or CMOS logic line as well as shorted to ground with a
switch.
MR
I
Vcc
Power
Power Supply
GND
Ground
Ground Reference for all signals
Power-Fail Voltage Monitor Input: When PFI is less than 1.25V, PFO goes low. Connect PFI to
GND or Vcc when not used.
PFI
I
Power-Fail Output: it gets low and sinks current when PFI is less than 1.25V; otherwise PFO stays
high.
PFO
O
Watchdog Input: If WDI remains high or low for 1.6sec, the internal watchdog timer runs out and
WDO goes low. Floating WDI or connecting WDI to a high-impedance three-state buffer disables
the watchdog feature. The internal watchdog timer clears whenever reset is asserted. WDI is three-
stated, or WDI sees a rising or falling edge.
WDI
I
NC
No Connect
Reset Output pulses: low for 200ms when triggered, and stays low whenever Vcc is below the reset
threshold. It remains low for 200ms after Vcc rises above the reset threshold or MR goes from low
to high. A watchdog timeout will not trigger RESET unless WDO is connected to MR.
RESET
O
Watchdog Output: pulls low when the internal watchdog timer finishes its 1.6sec count and does
not go high again until the watchdog is cleared. WDO also goes low during low-line conditions.
Whenever Vcc is below the reset threshold, WDO stays low; however, unlike RESET, WDO does
not have minimum pulse width. As soon as Vcc rises above the reset threshold, WDO goes high
with no delay.
WDO
O
O
RESET
The inverse of RESET: active high. Whenever RESET is high, RESET is low.
PT0082L(03/06)
Ver:4
4
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Pad Identification
PT7A7511, PT7A7513, PT7A7514, PT7A7515,
No.
Symbol
MR
Location (X,Y)
(229.25, 815.60)
(130.25, 815.60)
(88.00, 626.80)
(383.75, 151.05)
(482.95, 151.05)
(581.95, 151.05)
(526.65, 815.60)
(328.45, 815.60)
(427.45, 815.60)
2
1
8
9
7
1
2
3
4
5
6
7
8
9
Vcc
GND
PFI
PFO
3
WDI
RESET
WDO
NC
4
5
6
(0,0)
Note:
1)Wafer Size: 6 inch
2)Wafer Thickness: 675um
3)Chip Size: 810um*1060um (include scribe line width 100um*100um)
4)PAD Location: Refer above diagram and table. PAD size75um*75um
5)PAD discription refer to Pin discription
PT7A7512
No.
Symbol
MR
Location (X,Y)
(323.20, 973.00)
(158.00, 1047.10)
(158.00, 947.00)
(123.60, 313.4)
(123.60, 213.4)
(577.50, 149.90)
(733.50, 149.9)
(893.80, 785.90)
(893.80, 941.90)
(479.20, 973.00)
(605.20, 973.00)
2
1
8
9
1
2
7
6
2
Vcc
GND
3
4
5
6
7
8
9
PFI
PFO
WDI
RESET
WDO
3
3
4
5
NC
(0,0)
Note:
1)Wafer Size: 6 inch
2)WaferThickness: 350um
3)Chip Size: 1190um*1210um (include scribe line width 150um*90um)
4)PAD Location: Refer above diagram and table. PAD size85um*85um
5)PAD discription refer to Pin discription
PT0082L(03/06)
Ver:4
5
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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PT7A7521, PT7A7523, PT7A7524, PT7A7525
No.
Symbol
MR
Location (X,Y)
(229.25, 815.60)
(130.25, 815.60)
(88.00, 626.80)
(383.75, 151.05)
(482.95, 151.05)
(581.95, 151.05)
(526.65, 815.60)
(328.45, 815.60)
(427.45, 815.60)
2
1
8
9
7
1
2
3
4
5
6
7
8
9
Vcc
GND
PFI
PFO
3
WDI
RESET
WDO
NC
4
5
6
(0,0)
Note:
1)Wafer Size: 6 inch
2)Wafer Thickness: 675um
3)Chip Size: 810um*1060um (include scribe line width 100um*100um)
4)PAD Location: Refer above diagram and table. PAD size75um*75um
5)PAD discription refer to Pin discription
PT7A7522
No.
Symbol
MR
Location (X,Y)
(323.20, 973.00)
(158.00, 1047.10)
(158.00, 947.00)
(123.60, 313.4)
(123.60, 213.4)
(577.50, 149.90)
(733.50, 149.9)
(893.80, 785.90)
(893.80, 941.90)
(479.20, 973.00)
(605.20, 973.00)
2
1
8
9
1
2
7
6
2
Vcc
GND
3
4
5
6
7
8
9
PFI
PFO
WDI
RESET
WDO
NC
3
3
4
5
(0,0)
Note:
1)Wafer Size: 6 inch
2)WaferThickness: 350um
3)Chip Size: 1190um*1210um (include scribe line width 150um*90um)
4)PAD Location: Refer above diagram and table. PAD size85um*85um
5)PAD discription refer to Pin discription
PT0082L(03/06)
Ver:4
6
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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PT7A7531, PT7A7534
No.
Symbol
MR
Location (X,Y)
(229.25, 815.60)
(130.25, 815.60)
(88.00, 626.80)
(383.75, 151.05)
(482.95, 151.05)
(581.95, 151.05)
(526.65, 815.60)
(328.45, 815.60)
(427.45, 815.60)
2
1
8
9
7
1
2
3
4
5
6
7
8
9
Vcc
GND
PFI
PFO
3
NC
RESET
RESET
NC
4
5
6
(0,0)
Note:
1)Wafer Size: 6 inch
2)WaferThickness: 675um
3)Chip Size: 810um*1060um (include scribe line width 100um*100um)
4)PAD Location: Refer above diagram and table. PAD size75um*75um
5)PAD discription refer to Pin discription
PT7A7532, PT7A7533, PT7A7535
No.
Symbol
MR
Location (X,Y)
(323.20, 973.00)
(158.00, 1047.10)
(158.00, 947.00)
(123.60, 313.4)
(123.60, 213.4)
(577.50, 149.90)
(733.50, 149.9)
(893.80, 785.90)
(893.80, 941.90)
(479.20, 973.00)
(605.20, 973.00)
2
1
9
8
1
2
7
6
2
Vcc
GND
3
4
5
6
7
8
9
PFI
PFO
NC
RESET
RESET
NC
3
3
4
5
(0,0)
Note:
1)Wafer Size: 6 inch
2)Wafer Thickness: 350um
3)Chip Size: 1190um*1210um (include scribe line width 150um*90um)
4)PAD Location: Refer above diagram and table. PAD size85um*85um
5)PAD discription refer to Pin discription
PT0082L(03/06)
Ver:4
7
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Functional Description
WatchdogTimer
The PT75xx family can assert reset output during power-up,
The watchdog circuit monitors the µP activity. If the µP does
power-down and brownout conditions for µP system, detect
not toggle the watchdog input (WDI) within 1.6sec and WDI is
power failure or low-battery conditions with a 1.25V threshold
not in high impedance, WDO goes low. As long as RESET is
detector and have watchdog functions. Refer to Function Table
asserted or the WDI input is in high impedance, the watchdog
of PT7A75xx Family for their individual features. The typical
timer will stay cleared and will not count. As soon as reset is
application see Figure 4.
released and WDI is driven high or low, the timer will start
counting. Pulses as short as 50ns can be detected.
Reset Output
Typically, WDO will be connected to the non-maskable interrupt
The supervisory circuits can assert reset for a microprocessor
input (NMI) of a µP. When VCC drops below the reset threshold,
during power-up, power-down and brownout to prevent code
WDO will go low whether or not the watchdog timer has timed
execution errors.
out yet. Normally this would trigger an NMI interrupt, but RESET
goes low simultaneously, and thus overrides the NMI interrupt.
On power-up, once VCC reaches about 1.2V, RESET is a
If WDI is left unconnected, WDO can be used as a low-line
guaranteed logic low of 0.4V or less.As VCC rises, RESET stays
output. Since floating WDI disables the internal timer, WDO
low. WhenVCC rises above the reset threshold, an internal timer
goes low only when VCC falls below the reset threshold, thus
releases RESET after about 200ms. RESET pulses low whenever
functioning as a low-line output.
VCC drops below the reset threshold (brownout condition). If
brownout occurs in the middle of a previously initiated reset
pulse, the pulse continues for at least another 140ms.
Manual Reset
The manual-reset input (MR) allows reset to be triggered by a
On power-down, once VCC falls below the reset threshold, RESET
push-button switch. The switch is effectively debounced by
stays low and is guaranteed to be 0.4V or less until Vcc drops
the 140ms minimum reset pulse width. MR is TTL/CMOS logic
below 1V.
compatible, so it can be driven by any logic reset output.
The PT7A752x and PT7A753x active-high RESET output is
Power-Fail Comparator
simply the complement of the RESET output, and is guaranteed
to be valid with VCC down to 1.2V. Some µPs, such as Intel’s
80C51, require an active-high reset pulse.
The power-fail comparator will send out a Low signal once
detects a voltage lowered than 1.25V. It can be used for various
purposes because its output and non-inverting input are not
internally connected. The inverting input is internally connected
to a 1.25V reference.
TypicalApplication Circuit
DC Linear
Regulator
IN
µP
OUT
Vcc
RESET
Vcc
RESET
P
Supervisory
µ
I/O Line
NMI
Interrupt
Circuit
PFI
MR
WDI
WDO
PFO
PT0082L(03/06)
Ver:4
8
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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Detailed Specifications
Absolute Maximum Ratings
Note:
Storage Temperature ......................................................... -65oCto+150oC
Stresses greater than those listed under MAXI-
Ambient Temperature with PowerApplied ...........................-40oCto+85oC
MUM RATINGS may cause permanent damage to
Supply Voltage to Ground Potential (Vcc to GND) ............... -0.3Vto+7.0V
the device. This is a stress rating only and func-
DC Input Voltage (All inputs exceptVcc and GND) ......... -0.3VtoVCC+0.3V tional operation of the device at these or any other
conditions above those indicated in the operational
sections of this specification is not implied. Expo-
sure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
DC Output Current (All outputs) ..................................................... 20mA
Power Dissipation ......................................................................... 500mW
(Depend on package)
Recommended Operation Condition
DC Electrical Characteristics
Sym
Description
Test Conditions
Min
4.5
Typ
5.0
3.3
3.0
2.4
Max
5.5
Unit
V
Supply Voltage for 75x1, 75x2
Supply Voltage for 75x3, 75x4
Supply Voltage for 75x5,
VCC
3.0
5.5
V
2.7
5.5
V
VCC > 4.0V
2.0
V
VIH1
VIH2
VIL1
MR Input High Voltage
WDI Input High Voltage
MR Input Low Voltage
VCC ≤ 4.0V
0.7VCC
0.7VCC
V
V
VCC > 4.0V
0.8
0.2VCC
0.3VCC
85
V
VCC ≤ 4.0V
V
VIL2
TA
WDI Input Low Voltage
Operating Temperature
V
-40
OC
PT0082L(03/06)
Ver:4
9
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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DC Electrical Characteristics
DC Electrical Characteristics
Sym
Description
Test Conditions
Min
Typ
30
Max
200
Unit
T7A75x1/75x2 VCC = 5V
PT7A75x3/75x4 VCC = 3.3V
PT7A75x5 VCC = 3.0V
Left WDI un-connected (No
output load)
ICC
Operational Power Supply Current
µΑ
TA=25oC
PT7A75x1
VRN
VRN+1.5%
4.699
4.446
3.126
2.974
2.669
VRN-1.5%
4.560
4.314
3.034
2.886
2.590
4.630
4.380
3.080
2.930
2.630
70
PT7A75x2
VRST
Reset Threshold Voltage *
V
PT7A75x3
PT7A75x4
PT7A75x5
VRTH
Reset Threshold Hysteresis *
Output HIGH Voltage
VCC varies between VRN - 5%
mV
V
Vcc > 4.5V Isource=800µA VCC-1.5
VOH
Vcc > 2.7V Isource=500µA
Vcc >1.8V Isource=150µA
Vcc > 4.5V Isink=3.2mA
Vcc > 2.7V Isink=1.2mA
Vcc > 1.2V Isink=100µA
0.8VCC
0.8VCC
0.4
0.3
0.3
VOL
Output LOW Voltage
V
VPFI varies from1.0V to 1.5V
(TA = 25oC)
1.23
1.20
1.25
1.25
1.27
V
V
VPFT
PFI Input Threshold
PFI Input Current
V
PFI varies from1.0V to 1.5V
PFI connected to VCC
PFI connected to GND
WDI connected to VCC
WDI connected to GND
MR = 0, VCC= 5V
1.30
2.00
IPFI
µA
-2.00
30
-30
100
IWDI
Average WDI Input Current**
MR Input Current
µA
µA
-100
-600
IMR
-250
-100
* Valid for both RESET and RESET. VRST is voltage threshold when Vcc falls from high to low. VRN is nominal reset threshold
voltage.
** WDI is internally serviced within the watchdog period if WDI is left unconnected.
PT0082L(03/06)
Ver:4
10
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
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AC Electrical Characteristics
AC Electrical Characteristics
Sym
tRS
Description
Test Conditions
Min
140
Typ
200
Max
280
Units
ms
Reset Pulse Width
MR from low to High
WDI and MR tied to VCC,
VCC > VRN + 5%
tWD
Watchdog Timeout Period
1.0
1.6
2.25
s
tMR
tMD
tWP
MR Pulse Width
MR to RESET Delay
WDI Pulse Width
150
ns
ns
ns
VCC = 5.0V
250
50
Watchdog Timing Diagram
tWP
tWD
tWD
tWD
5V
0V
WDI
5V
0V
WDO
5V
0V
Externally
Triggered by MR
RESET
tRS
5V
0V
RESET
WatchdogTiming Diagram
V
VRT
RT
5V
0V
VCC
tRS
tRS
5V
0V
RESET
MR
5V
0V
tMD
tMR
5V
0V
WDO
PT0082L(03/06)
Ver:4
11
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Mechanical Information
P/PE (8-Pin PDIP)
8
.240
.280
6.09
7.11
1
.355
7.62
8.25
.400
9.01
.300
10.16
.325
.210
Max
5.33
0O
15o
.008
.014
SEATING
PLANE
0.20
0.35
.430
Max
.015 Min 0.381
.356
10.92
.115
.150
.100
typical
.014
.022
2.921
3.81
X.XX
X.XX
.558
DENOTES DIMENSIONS
IN MILLIMETERS
2.54
Note:
1) Controlling dimensions in inches.
2) Ref: JEDEC MS-001 BA
PT0082L(03/06)
Ver:4
12
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
W/WE (8-Pin SOIC)
8
.149
.157
3.78
3.99
.0099
.0196
0.25
0.50
x 45o
1
.189
4.80
.196
5.00
0.19
0.25
.0075
.0098
0-8o
0.40
1.27
.016
.050
.016
.026
1.35
1.75
.053
.068
.2284
0.406
0.660
.2440
5.80
6.20
SEATING PLANE
REF
.050
BSC
.0040
.0098
0.10
0.25
X.XX
X.XX
1.27
DENOTES DIMENSIONS
IN MILLIMETERS
.013
.020
0.330
0.508
Note:
1) Controlling dimensions in millimeters.
2) Ref: JEDEC MS-012 AA
PT0082L(03/06)
Ver:4
13
Data Sheet
PT7A7511-7515/7521-7525/7531-7535
µP Supervisor Circuits
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Notes
Pericom Technology Inc.
Email: support@pti.com.cn
Web-Site: www.pti.com.cn, www.pti-ic.com
China:
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576 Fax: (86)-21-6485 2181
Asia Pacific: Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660 Fax: (852)- 2243 3667
U.S.A.:
2380 Bering Drive, San Jose, California 95131, USA
Tel: (1)-408-435 0800 Fax: (1)-408-435 1100
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to
improve design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any
circuitry described other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry
described herein is free from patent infringement or other rights, of Pericom Technology Incorporation.
PT0082L(03/06)
Ver:4
14
相关型号：
PT7A7515WEX
Power Supply Management Circuit, Fixed, 1 Channel, PDSO8, 0.150 INCH WIDTH, GREEN, MS-012AA, SOIC-8
PERICOM
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