S1300AAAAS-28.6363(T)
更新时间:2024-09-19 01:45:47
品牌:DIODES
描述:Oscillator, 1.5MHz Min, 28.6363MHz Max, 28.6363MHz Nom, Hybrid,
S1300AAAAS-28.6363(T) 概述
Oscillator, 1.5MHz Min, 28.6363MHz Max, 28.6363MHz Nom, Hybrid,
S1300AAAAS-28.6363(T) 数据手册
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Voltage Controlled Crystal Oscillator
3.3V, LVCMOS
S1300 / S1309 / ST1300 / ST1309 Series
Technical Data
Frequency Range:
1.5 MHz to 28.6363 MHz
Frequency Stability:
2ꢀ, 25 or 5ꢀppm over all conditionsꢁ operating
temperature, voltage change, load change, calibration
tolerance, shock and vibration, with V = 1.65V
C
Aging @ 25°C:
3ppm max per year, 1ꢀppm max for 1ꢀ years
Temperature Range:
Operatingꢁ
Storageꢁ
ꢀ to +7ꢀ°C or -4ꢀ to +85°C
-55 to +125°C
Supply Voltage:
Recommended Operatingꢁ
3.3V 1ꢀ0
1ꢀmA typ, 15mA max
Supply Current:
Output Drive:
ACTUAL SIZE
Description
Symmetryꢁ
Rise & Fall Timesꢁ
Logic ꢀꢁ
45/550 max @ 5ꢀ0 V
DD
9ns max 2ꢀ0 to 8ꢀ0 V
DD
A 3.3V, voltage controlled crystal oscil-
lator with output logic levels compatible
with LVCMOS and LVTTL logic fami-
lies. The series is designed with excellent
Jitter characteristics which makes it ideal
for use in Telecom and Datacom applica-
tions. True SMD DIL versions for IR
reflow are available, select option "S" in
part number builder. See separate data
sheet for SMD package dimensions.
1ꢀ0 V
9ꢀ0 V
3ꢀpF
max
min
DD
DD
Logic 1ꢁ
Loadꢁ
Jitterꢁ
3.5ps max RMS period jitter
Pull Characteristics:
Input Impedance (pin 1)ꢁ
Frequency Response (-3dB)ꢁ
Pullabilityꢁ
5ꢀKΩ min
1ꢀ kHz min
5ꢀ, 7ꢀ, 1ꢀꢀppm APRꢂ min
ꢀ.3 to 3.ꢀV
Frequency Increases when Control Voltage Increases
5 or 1ꢀ0 max
1.65V
Control Voltageꢁ
Transfer Functionꢁ
Linearityꢁ
Applications & Features
Center Control Voltageꢁ
•
Phase-Locked Loop (PLL) Clock and
DataRecovery, FrequencyTransaltion,
Frequency Synthesis apps in Video,
Video Compression, Telephony, and
LAN/WAN Data Communication
3.3 Volt operations
LVCMOS / LVTTL compatible
3.5ps max RMS period jitter
Wide range of performance optionsꢁ
5ꢀ to 1ꢀꢀ ppm APRꢂ
Mechanical:
Shockꢁ
Solderabilityꢁ
MIL-STD-883, Method 2ꢀꢀ2, Condition B
MIL-STD-883, Method 2ꢀꢀ3
MIL-STD-883, Method 2ꢀꢀ4, Condition B2
MIL-STD-883, Method 2ꢀꢀ7, Condition A
MIL-STD-2ꢀ2, Method 215
Terminal Strengthꢁ
Vibrationꢁ
Solvent Resistanceꢁ
Resistance to Soldering Heatꢁ
•
•
•
•
MIL-STD-2ꢀ2, Method 21ꢀ, Conditions A, B or C
( I or J for Gull Wing)
Environmental:
Gross Leak Testꢁ
Fine Leak Testꢁ
Thermal Shockꢁ
MIL-STD-883C, Method 1ꢀ14, Condition C
MIL-STD-883C, Method 1ꢀ14, Condition A2
MIL-STD-883C, Method 1ꢀ11, Condition A
MIL-STD-883C, Method 1ꢀꢀ4
2ꢀ to 5ꢀ ppm Frequency Stability
Tri-State option
True SMD for IR reflow available
•
•
Moisture Resistanceꢁ
Output Waveform
CMOS
T
r
T
f
Logic 1
80%V
50%V
20%V
DD
DD
DD
ꢂ
APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability)
NOTE: APR is inclusive of 10 Years Aging
Logic 0
SYMMETRY
DS-126 REV E
SaRonix
www.pericom.com/saronix
SaRonix
Voltage Controlled Crystal Oscillator
3.3V, LVCMOS
S1300 / S1309 / ST1300 / ST1309 Series
Technical Data
Package Details
Part Numbering Guide
S T 130 9 A A A J - 19.4400 (T)
ꢃ.2ꢅ
.±22
±1.2
pax
pax
2.91
.ꢅ±ꢃ
SaRonix
Packing Method
.2ꢆ6
pax
(T) = Ta0e & Reel ftr SMD ꢇersitnsm
full reel increpenꢀs tnly (±220cs)
Blank = Bulk
Blank = Ntn TriꢄSꢀaꢀe
T = TriꢄSꢀaꢀe (6 0ins)
6.ꢆꢃ±2.ꢃ1
2.±ꢃ±2.2±
ꢆ.9-±.±ꢃ
.1ꢃꢃ±.212
.-6±.2ꢅ
.21ꢅ±.22ꢆ
Supply Voltage
1ꢆ2 = ꢆ.ꢆV
1ꢃ.±-±.1ꢆ
.622±.22ꢃ
Frequency (MHz)
Pin 3
Pin 1
Pin 7
Package Size
2 = Full Size
9 = 1/± Size
Lead/Package Types
Blank = ThruꢄHtle
S = True SMD Ada0ꢀtr ftr DIL1-
J = Gull Wing
1ꢆ.2
.ꢃ12
pax
+.+ꢃ
pax
.ꢆ2ꢃ
Stability Tolerance
AA = ±±200pm 2 ꢀt ꢁ+2ꢂ°
Linearity
A = ±±ꢃ00pm 2 ꢀt ꢁ+2ꢂ°
B = ±ꢃ200pm 2 ꢀt ꢁ+2ꢂ°
E = ±ꢃ200pm ꢄ-2 ꢀt ꢁꢅꢃꢂ°
A = ꢃ%
B = 12%
Pullability (Minipup APR)**
A = ±ꢃ2 00p
M = ±+2 00p
B = ±122 00pm ntꢀ aꢇailable aꢀ all frequencies
Pin 12
Pin 14
Pin 8
(-) Glass Insulaꢀtrs
Pin Function:
Pin ꢅ: OUTPUT
Pin 1: °tnꢀrtl Vtlꢀage
Pin 1±: N/° (t0ꢀitnal)
Pin 1-: ꢁꢆ.ꢆVD° (V
Pin ꢆ: TriꢄSꢀaꢀe ctnꢀrtl (t0ꢀitnal)
)
Pin +: GND/°ase (V
)
DD
SS
** APR = (V°XO Pull relaꢀiꢇe ꢀt s0ecified Ouꢀ0uꢀ Frequency) – (V°XO Frequency Sꢀabiliꢀy)
NOTE: APR is inclusiꢇe tf 12 Years Aging
Marking Format**
Includes Daꢀe °tdem Frequency & Parꢀ Nupber
Tri-State Logic Table
SARONIX
V°XO
Required In0uꢀ Leꢇels tn Pin ꢆ(±):
Ltgic 1 = 2.+ V pin
Pin ꢆ(±) In0uꢀ
Ltgic 1 tr N°
Ltgic 2 tr GND
Pin ꢅ(ꢃ) Ouꢀ0uꢀ
Oscillaꢀitn
Dentꢀes Pin 1
DD
Ltgic 2 = 2.ꢆ V pax
DD
High Ip0edance
HALF SIZE PACKAGE
1ꢆ.2
pax
.ꢃ12
2.91
.2ꢆ6
pax
ꢃ.2ꢅ
.±22
pax
Test Circuit
6.ꢆꢃ±2.ꢃ1
2.±ꢃ±2.2±
.-6±.2ꢅ
.21ꢅ±.22ꢆ
±.ꢃ-
.122
TEST
POINT
Pin 2
O0ꢀitnal
TriꢄSꢀaꢀe °tnꢀrtl
pA
M
+.6±±.±2
.ꢆ22±.22ꢅ
Pin 4
GND °ase (V
)
SS
Pin 1-(ꢅ)
Pin ꢅ(ꢃ)
OUT
Pin 1
°tnꢀrtl
Vtlꢀage
1ꢆ.2
.ꢃ12
pax
VDD
+.6±±.±2
.ꢆ22±.22ꢅ
OS°ILLATOR
GND
°
(Ntꢀe A) = ꢆ20F
L
POWER
SUPPLY
V M
Pin 8
Pin 5
Ouꢀ0uꢀ
Pin +(-)
Pin ꢆ(±)
Pin 1(1)
*
V
DD
Marking Format**
Includes Daꢀe °tdem Frequency & Parꢀ Nupber
°ONTROL
VOLTAGE
OPTIONAL
TRIꢄSTATE
SARONIX
NOTE A: ° includes 0rtbe and fixꢀure ca0aciꢀance
L
*
Iꢀeps in brackeꢀs( ) re0resenꢀ Half Size ptdel
Dentꢀes Pin 1
All specifications are subject to change without notice.
DS-126 REV E
**Exacꢀ ltcaꢀitn tf iꢀeps pay ꢇary
pp
Scale: Ntne (Dipensitns in
inches
)
SaRonix
www.pericom.com/saronix
SaRonix
True SMDAdaptor
Technical Data
SaRonix
www.pericom.com/saronix
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