S1623F-FREQ-OUT24 [DIODES]
CMOS/LSTTL Output Clock Oscillator, 1.544MHz Min, 50MHz Max;
| 型号： | S1623F-FREQ-OUT24 |
| 厂家： | 
DIODES INCORPORATED |
| 描述： | CMOS/LSTTL Output Clock Oscillator, 1.544MHz Min, 50MHz Max 机械 振荡器 |
| 文件： | 总2页 (文件大小：118K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SaRonix
Mini Crystal Clock Oscillator 3.3V, HCMOS, Tri-State, SMD
ADVANCE
INFORMATION
S1623 Series
Technical Data
Frequency Range:
1.544 MHz to 50 MHz
Frequency Stability:
20, 25, 50 or 100 ꢀꢀꢁ over all conꢂitionsꢃ caliꢄration
tolerance, oꢀerating teꢁꢀerature, inꢀut voltage change, loaꢂ
change, aging (1 year @ 25°C average aꢁꢄient oꢀerating
teꢁꢀerature), shock anꢂ viꢄration.
Temperature Range:
-10 to +70°C, -40 to +85°C
-55 to +125°C
Oꢀerating:
Storage:
Supply Voltage:
Supply Current:
3.3V 10ꢅ
15ꢁA ꢁax 1.544 to 32 MHz
25ꢁA ꢁax 32+ to 50 MHz
10 A ꢁax 1.544 to 50 MHz
Outꢀut Enaꢄleꢂ:
ACTUAL SIZE
Outꢀut Disaꢄleꢂ:
Output:
Description
Syꢁꢁetry:
Rise & Fall Tiꢁes:
Logic 0:
Logic 1:
Loaꢂ:
Perioꢂ Jitter RMS:
45/55ꢅ ꢁax @ 50ꢅ V
DD
7ns ꢁax 20ꢅ to 80ꢅ V
The 3.3V S1623 Series are crystal-con-
trolleꢂ, low-current oscillators ꢀroviꢂing
ꢀrecise rise anꢂ fall tiꢁes to ꢂrive high
ꢀerforꢁance aꢀꢀlications. The suꢄ-ꢁin-
iature3.5x6x1.5ꢁꢁ,lowꢀrofileleaꢂless
ceraꢁic ꢀackage has golꢂ-ꢀlateꢂ contact
ꢀaꢂsiꢂealfortoꢂay'sꢀick-anꢂ-ꢀlaceSMT
environꢁents. Availaꢄle to 50 MHz, the
ꢀarts can ꢄe orꢂereꢂ with 20, 25, 50 or
100 ꢀꢀꢁ frequency staꢄility.
DD
10ꢅ V
90ꢅ V
ꢁax
ꢁin
DD
DD
15ꢀF ꢁax, 10LSTTL
8ꢀs ꢁax
Tri-State Characteristics:
Outꢀut:
oscillation @ V 2.2V ꢁin, high iꢁꢀeꢂance @ V 0.8V ꢁax
IN IN
50K ꢁin
Disaꢄle Outꢀut Delay: 100 ns ꢁax
Internal Pulluꢀ Resistance:
Control Inꢀut:
Enaꢄle Outꢀut Delay: 10 ꢁs ꢁax, 1.544 to 50MHz
Mechanical:
Applications & Features
Shock:
Solꢂeraꢄility:
MIL-STD-883, Methoꢂ 2002, Conꢂition B
MIL-STD-883, Methoꢂ 2003
MIL-STD-883, Methoꢂ 2007, Conꢂition A
MIL-STD-202, Methoꢂ 215
MIL-STD-883, Methoꢂ 2004, Conꢂition D
MIL-STD-202, Methoꢂ 210, Conꢂition I or J
• Suꢄ-ꢁiniature, 1.7ꢁꢁ high ceraꢁic
ꢀackage iꢂeal for SMT aꢀꢀlications
• 3.3V oꢀeration
Viꢄration:
Solvent Resistance:
Terꢁinal Strength:
Resitance to Solꢂering Heat:
• Tri-State stanꢂarꢂ
• CMOS & HCMOS coꢁꢀatiꢄle
• Perfect for PCsꢃ Noteꢄook, Palꢁtoꢀ
Coꢁꢀutersꢃ Portaꢄle Aꢀꢀlicationsꢃ
PCMCIA Carꢂs.
• Anywhere sꢁall size, low ꢀower, sur-
face ꢁountaꢄility are a ꢀriority.
• Availaꢄle on taꢀe & reelꢃ 16ꢁꢁ taꢀe,
1000ꢀcs ꢀer reel
Environmental:
Gross Leak Test:
Fine Leak Test:
Therꢁal Shock:
MIL-STD-883, Methoꢂ 1014, Conꢂition C
MIL-STD-883, Methoꢂ 1014, Conꢂition A2
MIL-STD-883, Methoꢂ 1011, Conꢂition A
MIL-STD-883, Methoꢂ 1004
Moisture Resistance:
Part Numbering Guide
S
1623
C
– 50.0000 (T)
Solder Reflow Guide
Saronix
(T) = Tape & Reel
full reel increments only
Series
Reflow 240 max
S1623 = 3.3V, 3.5 x 6 x 1.5mm
250
Frequency (MHz)
4ꢀC/sec max
Cooling
200
150
Preheat 183 10ꢀC
Stability Tolerance
AA = 20ppm, ꢁ10 to ꢂ+0ꢀC, limiteꢃ freꢄuencies, please contact SaRonix
A = 25ppm, ꢁ10 to ꢂ+0ꢀC
B = 50ppm, ꢁ10 to ꢂ+0ꢀC
C = 100ppm, ꢁ10 to ꢂ+0ꢀC
E = 50ppm, ꢁ40 to ꢂ85ꢀC
F = 100ppm, ꢁ40 to ꢂ85ꢀC
,
limiteꢃ freꢄuencies, please contact SaRonix
4ꢀC/sec max
Time
1 – 2 minutes
10 sec max
DS-198 REV 01
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
SaRonix
Mini Crystal Clock Oscillator
ADVANCE
INFORMATION
3.3V, HCMOS, Tri-State, SMD
S1623 Series
Technical Data
Tri-State Logic Table
Package Details
Marking Format (exact location of items may vary)
Line 1: S = SaRonix
Pad # 1 Input
Logic 1 or NC
Logic 0 or GND
Pad # 3 Output
Oscillation
HighImpedance
C = Stability Tol. (see Part Numbering Guide)
Y = year: 1 = 2001, 2 = 2002, 3 = 2003 etc.
WW = week
Line 2: Frequency (up to ꢀ digits including decimal point)
6.0 0.2
.236 .00ꢀ
Date Code
Required Input Level on pad #1:
Logic 1 = 2.2V min
Logic 0 = 0.ꢀV max
SAA YWW
Frequency
3.5 0.2
.13ꢀ .00ꢀ
Pin 1
Indicator
Test Circuits
1.7
max
.066
TEST
POINT
1.4
.055
mA
M
Pad 4
Pad 1
Pad 3
OUT
#1
#4
#2
1.5
.059
VDD
POWER
SUPPLY
C
= 15pF (Note A)
L
0.9
.035
V M
OSCILLATOR
GND
.01 µF
#3
3.0
.11ꢀ
0.1
.004
Pad 2
Pin Configurations
#1 = OE
#4 = V
#2 = GND
#3 = OUTPUT
TRI-STATE INPUT
DD
Note A: C includes probe and jig capacitance.
L
Recommended Land Pattern
Output Waveform
**
1.9
0.07
CMOS
T
T
f
r
4
1
3
LOGIC 1
ꢀ0% VDD
50% VDD
2.5
0.10
1.4
0.06
2
4.5
0.1ꢀ
20% VDD
LOGIC 0
SYMMETRY
**External high frequency power supply
decoupling required.
mm
Scale: None ( Dimensions in
)
inches
All specifications are subject to change without notice.
DS-198 REV 01
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
SaRonix
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