概述
数据手册DCR4880M35 概述
Phase Control Thyristor 相位控制晶闸管
DCR4880M35 数据手册
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PDF下载DCR4880M42
Phase Control Thyristor
Preliminary Information
DS5943-1.0 June 2009 (LN 26811)
KEY PARAMETERS
FEATURES
VDRM
IT(AV)
ITSM
dV/dt*
dI/dt
4200V
4880A
60800A
2000V/µs
400A/µs
ꢀ
ꢀ
Double Side Cooling
High Surge Capability
* Higher dV/dt selections available
APPLICATIONS
ꢀ
ꢀ
ꢀ
High Power Drives
High Voltage Power Supplies
Static Switches
VOLTAGE RATINGS
Part and
Ordering
Number
Repetitive Peak
Conditions
Voltages
VDRM and VRRM
V
DCR4880M42*
DCR4880M40
DCR4880M35
4200
4000
3500
Tvj = -40°C to 125°C,
IDRM = IRRM = 300mA,
VDRM, VRRM tp = 10ms,
VDSM & VRSM
=
VDRM & VRRM + 100V
respectively
Lower voltage grades available.
*4100V @ -40oC, 4200V @ 0oC
(See Package Details for further information)
Fig. 1 Package outline
ORDERING INFORMATION
When ordering, select the required part number
shown in the Voltage Ratings selection table.
For example:
DCR4880M42
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
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DCR4880M42
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60°C unless stated otherwise
Symbol
Parameter
Test Conditions
Max.
Units
Double Side Cooled
IT(AV)
IT(RMS)
IT
Mean on-state current
RMS value
Half wave resistive load
4880
7665
7020
A
A
A
-
-
Continuous (direct) on-state current
SURGE RATINGS
Symbol
Parameter
Test Conditions
Max.
Units
ITSM
I2t
Surge (non-repetitive) on-state current
I2t for fusing
10ms half sine, Tcase = 125°C
VR = 0
60.8
kA
18.48
MA2s
THERMAL AND MECHANICAL RATINGS
Symbol
Parameter
Test Conditions
Min.
Max.
Units
Rth(j-c)
Thermal resistance – junction to case
Double side cooled
Single side cooled
DC
-
0.00518
0.01012
0.01080
0.001
0.002
135
°C/W
°C/W
°C/W
°C/W
°C/W
°C
Anode DC
Cathode DC
Double side
Single side
-
-
Rth(c-h)
Thermal resistance – case to heatsink Clamping force 83.0kN
(with mounting compound)
-
-
-
Tvj
Virtual junction temperature
On-state (conducting)
Reverse (blocking)
-
125
°C
Tstg
Fm
Storage temperature range
Clamping force
-55
74.0
125
°C
91.0
kN
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DCR4880M42
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min.
Max.
Units
IRRM/IDRM Peak reverse and off-state current
At VRRM/VDRM, Tcase = 125°C
-
-
-
-
300
2000
200
mA
dV/dt
dI/dt
Max. linear rate of rise of off-state voltage To 67% VDRM, Tj = 125°C, gate open
V/µs
A/µs
A/µs
Repetitive 50Hz
Non-repetitive
Rate of rise of on-state current
From 67% VDRM to 2x IT(AV)
Gate source 30V, 10ꢀ,
tr < 0.5µs, Tj = 125°C
500
VT(TO)
Threshold voltage – Low level
500 to 2200A at Tcase = 125°C
-
-
-
-
-
0.75
0.92
0.205
0.122
3
V
V
Threshold voltage – High level
2200 to 8000A at Tcase = 125°C
500 to 2200A at Tcase = 125°C
2200 to 8000A at Tcase = 125°C
VD = 67% VDRM, gate source 30V, 10ꢀ
tr = 0.5µs, Tj = 25°C
rT
On-state slope resistance – Low level
On-state slope resistance – High level
mꢀ
mꢀ
µs
tgd
Delay time
Tj = 125°C, 5000A
VR = 200V, dI/dt = 5 A/µs,
tq
Turn-off time
900
µs
dVDR/dt = 20V/µs linear
QS
Stored charge
2920
42
4875
57
µC
A
IT = 3000A, Tj = 125°C, dI/dt – 1A/µs,
VRpeak ~3100V, VR ~ 2100V
IRR
Reverse recovery current
IL
Latching current
Holding current
Tj = 25°C, VD = 5V
-
-
3
A
IH
300
mA
Tj = 25°C, RG-K = ꢁ, ITM = 500A, IT = 5A
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DCR4880M42
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
Parameter
Gate trigger voltage
Test Conditions
Max.
Units
VGT
VGD
IGT
VDRM = 5V, Tcase = 25°C
At 50% VDRM, Tcase = 125°C
VDRM = 5V, Tcase = 25°C
At 50% VDRM, Tcase = 125°C
1.5
0.4
300
10
V
Gate non-trigger voltage
Gate trigger current
V
mA
mA
IGD
Gate non-trigger current
CURVES
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
Vtm max 125ºC
Vtm min 125ºC
Vtm max 25ºC
Vtm min 25ºC
0.5
1
1.5
2
Instantaneous on-state voltage V T - (V)
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION
Where A = -0.208640
B = 0.171688
C = 0.000113
D = 0.003842
VTM = A + Bln (IT) + C.IT+D.ꢀIT
these values are valid for Tj = 125°C for IT 500A to 8000A
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DCR4880M42
SEMICONDUCTOR
10
130
120
110
100
90
180
120
90
60
30
180
120
90
60
30
8
6
4
2
0
80
70
60
50
40
30
20
10
0
0
1000
2000
3000
4000
5000
0
500
1000
1500
2000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.3 On-state power dissipation – sine wave
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
125
16
180
120
90
60
30
d.c.
180
120
14
100
90
60
30
12
10
8
75
50
25
0
6
4
2
0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
Fig.6 On-state power dissipation – rectangular wave
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DCR4880M42
SEMICONDUCTOR
125
100
75
50
25
0
125
100
75
50
25
0
d.c.
180
120
90
60
30
d.c.
180
120
90
60
30
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.7 Maximum permissible case temperature,
double side cooled – rectangular wave
Fig.8 Maximum permissible heatsink temperature,
double side cooled – rectangular wave
1
2
3
4
Ri (°C/kW)
Ti (s)
1.995338 1.242784 1.9448
0.05
6.092995 1.957372 2.042252 0.035908
5.459764 0.510898 0.05 110.1735
6.856845 1.876401 2.062845 0.025343
5.181139 0.557321 0.05 110.1546
0.005
Double side cooled
Anode side cooled
Cathode side cooled
0.592935 0.592385 110.5108
12.0
Ri (°C/kW)
Ti (s)
Anode Side Cooled.
11.0
Double Side Cooled.
Ri (°C/kW)
Ti (s)
10.0
Cathode Side Cooled.
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
ꢂ
i 4
ꢂ
ꢁ ꢀ
[R (1 exp(T /T )]
Zth
ꢃ
i
i
ꢂ
i 1
Rth(j-c) Conduction
Tables show the increments of thermal resistance Rth(j-c) when the device
operates at conduction angles other than d.c.
Double side cooling
Zth (z)
Anode Side Cooling
Zth (z)
Cathode Sided Cooling
Zth (z)
°
°
180
120
90
°
sine.
0.51
0.57
0.64
0.70
0.74
0.76
rect.
0.36
0.49
0.56
0.63
0.71
0.74
sine.
0.51
0.58
0.65
0.71
0.75
0.77
rect.
0.36
0.50
0.57
0.64
0.71
0.75
sine.
rect.
0.36
0.50
0.57
0.64
0.71
0.75
180
120
90
180 0.51
120 0.58
90
60
30
15
0.001
0.01
0.1
Time ( s )
1
10
100
0.65
0.71
0.75
0.77
60
30
15
60
30
15
Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW)
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DCR4880M42
SEMICONDUCTOR
200
180
160
140
120
100
80
30
27
24
21
18
15
12
9
100
I2t
10
ITSM
Conditions:
Tcase = 125°C
VR =0
60
Conditions:
Tcase= 125°C
VR = 0
40
6
Pulse width = 10ms
20
3
half-sine wave
1
1
0
0
10
Number of cycles
100
1
10
Pulse width, tP - (ms)
100
Fig.10 Multi-cycle surge current
Fig.11 Single-cycle surge current
25000
20000
15000
10000
5000
0
700
600
500
400
300
200
100
0
Qs max = 4874.7*(di/dt) 0.4822
IRR max = 57.242*(di/dt)0.7466
IRR min = 41.99*(di/dt)0.7893
Qs min = 2920.8*(di/dt) 0.581
Conditions:
Conditions:
Tj = 125ºC, VR peak ~ 2500V
VRM ~ 1700V
Tj = 125ºC, VR peak ~ 2500V
VRM ~ 1700V
snubber as required to
control reverse voltage
snubber as required to control
reverse voltage
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Rate of decay of on-state current, di/dt - (A/us)
Rate of decay of on-state current, di/dt - (A/us)
Fig.12 Stored charge
Fig.13 Reverse recovery current
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DCR4880M42
SEMICONDUCTOR
10
Pulse Power PGM (Watts)
Frequency Hz
9
8
7
6
5
4
3
2
1
0
Pulse
Width us
100
50
150
150
150
150
20
100
150
150
150
100
-
400
150
125
100
25
200
500
1000
10000
Upper Limit
-
Preferred gate drive area
Tj = -40oC
Tj = 25oC
Lower Limit
Tj = 125oC
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current IGT, - (A)
Fig14 Gate Characteristics
30
25
20
15
10
5
Lower Limit
Upper Limit
5W
10W
20W
50W
100W
150W
-40C
0
0
1
2
3
4
5
6
7
8
9
10
Gate trigger current, IGT - (A)
Fig. 15 Gate characteristics
8/10
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DCR4880M42
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise.
DO NOT SCALE.
Maximum Minimum
Thickness Thickness
(mm)
25.815
25.89
26.12
26.26
26.5
(mm)
25.305
25.38
25.61
25.75
25.99
26.33
Device
22CT93M
28CT93M
42CT93M
DCR4330M52
DCR3480M65
DCR2760M85
26.84
Nominal weight: 2575g
Lead length: 420mm
Lead terminal connector: M4 ring
Package outline type code: M
Fig.16 Package outline
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DCR4880M42
SEMICONDUCTOR
POWER ASSEMBLY CAPABILITY
The Power Assembly group was set up to provide a support service for those customers requiring more than the basic
semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages
and current capability of our semiconductors.
We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today.
The Assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of our
customers.
Using the latest CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete
Solution (PACs).
HEATSINKS
The Power Assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to optimise
the performance of Dynex semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow rates) is
available on request.
For further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or
Customer Services.
Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all
semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be
followed.
http://www.dynexsemi.com
e-mail: power_solutions@dynexsemi.com
HEADQUARTERS OPERATIONS
DYNEX SEMICONDUCTOR LTD
Doddington Road, Lincoln
CUSTOMER SERVICE
Tel: +44(0)1522 502753 / 502901. Fax: +44(0)1522 500020
Lincolnshire, LN6 3LF. United Kingdom.
Tel: +44(0)1522 500500
Fax: +44(0)1522 500550
ꢀ Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION – NOT FOR
RESALE. PRODUCED IN UNITED KINGDOM.
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or
contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or
suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible
methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to
fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These
products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided
subject to the Company’s conditions of sale, which are available on request.
All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners.
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