EM4006F9WP21 [EMMICRO]

13.56 MHz 64 Data bit Read Only Contactless Identification Device; 13.56 MHz的64位数据只读非接触式识别装置
EM4006F9WP21
型号: EM4006F9WP21
厂家: EM MICROELECTRONIC - MARIN SA    EM MICROELECTRONIC - MARIN SA
描述:

13.56 MHz 64 Data bit Read Only Contactless Identification Device
13.56 MHz的64位数据只读非接触式识别装置

装置
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中文:  中文翻译
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EM MICROELECTRONIC - MARIN SA  
EM4006  
13.56 MHz 64 Data bit Read Only Contactless  
Identification Device  
Description  
The EM4006 (previously named H4006) is a CMOS  
integrated circuit intended for use in electronic Read Only  
transponders.  
Features  
Operating frequency range 10 MHz to 15 MHz  
RF interface optimized for 13.56 MHz operation  
Laser programmed memory array  
(64 data bit + 16 CRC bit)  
Modulator switch designed to preserve supply voltage  
Miller coding  
Default data rate is 26484 Baud  
Other data rates possible (mask programmable)  
On chip rectifier  
The exited coil connected to the device generates the  
power supply via a rectifier and an integrated decoupling  
capacitor. The clock used for the logic is also extracted  
from the coil. The logic is mainly composed by a miller  
code generator and the LROM control. The memory is  
factory programmed so that each IC is unique.  
On chip resonant capacitor  
On chip supply buffer capacitor  
Applications  
Logistics automation  
Anticounterfeiting  
Access control  
Industrial transponder  
Typical Operating Configuration  
Pad Assignment  
Coil1  
EM4006  
EM4006  
Coil2  
L: typical 1.4µH for fo = 13.56MHz  
C1  
C2  
Fig. 2  
Fig. 1  
1
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Copyright 2001, EM Microelectronic-Marin SA  
EM4006  
Absolute Maximum Ratings  
Handling Procedures  
This device has built-in protection against high static  
voltages or electric fields; however, anti-static  
precautions must be taken as for any other CMOS  
component. Unless otherwise specified, proper operation  
can only occur when all terminal voltages are kept within  
the voltage range. Unused inputs must always be tied to  
a defined logic voltage level.  
Parameter  
Symbol  
Conditions  
Maximum DC Current forced  
on COIL1 and COIL2  
Power Supply  
Storage Temp. Die form  
Storage Temp. PCB form  
Electrostatic discharge  
maximum to MIL-STD-883C  
method 3015  
ICMAX  
±30mA  
VDD  
Tst  
Tst  
-0.3V to 7.5V  
-55 to +200°C  
-55 to +125°C  
VESD  
2000V  
Operating Conditions  
Parameter  
Symb Min  
Typ Max Units  
Operating Temp.  
Top  
-40  
+85  
°C  
Stresses above these listed maximum ratings may cause  
permanent damages to the device. Exposure beyond  
specified operating conditions may affect device reliability  
or cause malfunction.  
Maximum Coil  
Current  
Icoil  
-10  
10  
mA  
AC Voltage on Coil  
Supply Frequency  
Vcoil  
fcoil  
3
14*  
Vpp  
10  
13.56  
15  
MHz  
*) The AC Voltage on Coil is limited by the on chip  
voltage limitation circuitry. This is according to the  
parameter Icoil.  
System Principle  
Transponder  
Tranceiver  
Coil1  
Antenna  
Oscillator  
Driver  
EM4006  
Coil2  
Filter  
and  
Demodulator  
Gain  
Data received  
from transponder  
Data decoder  
Signal on coils  
Transponder coil  
Transeiver coil  
RF Carrier  
Data  
Fig. 3  
2
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Copyright 2001, EM Microelectronic-Marin SA  
EM4006  
Electrical Characteristics  
VDD = 2V, VSS = 0V, fC1 = 13.56MHz sine wave, VC1 = 1.0Vpp centered at (VDD - VSS)/2, Ta = 25°C  
unless otherwise specified  
Parameter  
Supply Voltage  
Symbol Test Conditions  
Min.  
1.9  
Typ.  
Max.  
(note 1)  
Units  
V
VDD  
Supply current  
IDD  
60  
150  
1.8  
µA  
V
Rectifier Voltage Drop  
VREC  
IC1C2 = 1mA, modulator switch on  
VREC = (VC1-VC2) - (VDD - VSS)  
Modulator ON DC voltage  
drop (note 2)  
VON1  
VON2  
IVDD VSS = 1mA  
IVDD VSS = 10mA  
1.9  
2.4  
2.3  
2.8  
2.8  
3.3  
V
V
Power on reset (note 3)  
VR  
VR - VMIN  
1.2  
0.1  
1.4  
0.25  
1.7  
0.5  
V
V
Coil1 - Coil2 Capacitance  
Series resistance of CRES  
Power Supply Capacitor  
CRES  
RS  
Vcoil=100mVRMS f=10kHz  
92.6  
94.5  
3
96.4  
pF  
Csup  
140  
pF  
Note 1: Maximum voltage is defined by forcing 10 mA on C1 - C2  
Note 2: Measured between VDD and VSS  
Note 3: According to Figure 7  
Block Diagram  
Clock extractor  
Divider Chain  
Sequencer  
Miller Code  
Generator  
VDD  
+
AC1  
AC2  
C1  
CRES  
Power  
on  
Reset  
CSUP  
LASER  
ROM  
HF Rectifier  
Modulator  
-
C2  
Power Management  
VSS  
Fig. 4  
3
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EM4006  
General Description  
Functional Description  
Output Sequence  
The transponder will be activated when illuminated by a  
RF field of sufficient power and at any frequency that is  
compatible with its associated antenna and its internal  
power supply circuit input characteristics. The chip will  
Power-on-Reset itself when powered by this incoming  
energy that exceeds its reset threshold. After resetting  
itself the chip will start to transmit its memory contents as  
a stream of Miller code. The memory contents is  
transmitted by modifying the antenna matching  
impedance at its internal clock rate, thereby causing  
varying amounts of RF energy to be reflected from the  
antenna. This impedance variation will be achieved by  
connecting a modulating device across the antenna  
terminals. When switched on the modulating device will  
present a low impedance to the antenna. This will cause a  
change in the matching of the antenna and therefore in  
the amount of RF energy reflected by the transponder to  
the reader. This reflected signal combines with the  
transmitted signal in the receiver to yield an amplitude  
modulated signal representative of the IC memory  
contents. The “ON” impedance of the modulating device  
needs to be comparable to about 100 Ohms to affect the  
matching of the antenna and therefore its reflectivity.  
The RF signal received from the transponder antenna will  
serve several purposes :  
Transmission from the transponder will be accomplished  
through variation of the antenna load impedance by  
switching the modulating device ON and OFF.  
Output sequence is composed of cycles which are  
repeated. Each cycle is composed of 82 bits Standard  
Message Structure (STDMS) which is Miller coded and a  
pause (LW) during which the modulating device is OFF  
(see figure 6 for details of Miller code).  
The pause (LW) is 9bits length.  
The 82 bit STDMS consists of 1 start bit, 64 data bits, 16  
CRC bits and 1 stop bit.  
Start bit (1)  
Data(64) CRC (16) Stop bit (1) LW(9)  
Memory organisation  
As already mentioned above the 82 bits are stored in  
laser programmed ROM (LROM). The 82 bits of this  
LROM is partioned as followed (see Memory Map):  
Factory reserved  
IC name  
Customer ID  
ID code  
CRC-CCITT  
Start and stop bits  
9 bits  
10 bits  
13 bits  
32 bits  
16 bits  
2 bits  
power the chip  
provide a global reset to the chip through its POR  
(Power-On-Reset) function  
provide a carrier for the data transmission  
provide the input of the internal clock generation circuit  
(frequency division)  
Memory Map  
(First out)  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16  
MSB IC Name  
Start  
Factory reserved  
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  
LSB MSB Customer ID LSB  
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48  
MSB ID code  
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64  
ID code LSB  
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81  
LSB  
CRC - CCITT  
MSB Stop  
4
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EM4006  
Factory reserved bits  
ID code bits  
These 9 bits are reserved. Default value is 00Bhex.  
This field is programmed from a counter in that way that  
each device is unique.  
IC name bits  
Cyclic redundancy check  
They contains the 3 last characters device name. For this  
device, the value is 006hex.  
The shift register is reset to all zero with each Stop Bit.  
CRC code is calculated on 64 data bits. The CRC code is  
calculated according to CCITT / ISO 3309 - 1984  
standards. See figure 5 for principle block schematic and  
generating polynomial of the CRC code.  
Customer ID bits  
This field contains a code which is defined by EM  
Microelectronic-Marin S.A. For standard version, the code  
is 0001hex.  
Start and stop bits  
Start bit is set to logic 1 and stop bit is set to logic 0.  
CRC Block Diagram  
SERIAL QUOTIENT  
X5  
X12  
X16  
FEEDBACK  
BEFORE  
SHIFT  
15 14 13 12 11  
MSB  
10  
9
8
7
6
5
4
3
2
1
0
LSB  
BCC REGISTER  
x
BCC(Block Check Characters) REGISTER STAGE  
=
data input  
=EXCLUSIVE - OR  
CRC-CCITT GENERATING POLYNOMIAL = X16 + X12 + X5 + X0  
Fig. 5  
RF Interface  
Resonant capacitor, Rectifier, Limiter and Modulator  
Switch form the unit which is interfacing to the incoming  
RF signal. These blocks are interdependent so they are  
developed as unit. They interface to the antenna which  
typical characteristics are:  
Resonant Capacitor  
The capacitor value is adjusted by laser fusing. It can be  
trimmed by 1pF steps to achieve the absolute value of  
94.5pF typically. This option, which is available on  
request, allows a smaller capacitor tolerance over the  
whole production.  
LS 1400 nH  
RS 3 Ohms  
Rectifier and Limiter  
A full wave rectifier (Graetz Bridge) is used to provide  
supply voltage to the IC. The reverse breakdown of the  
diodes is also used to protect the IC from overvoltages.  
30 < Q < 40 at 13.56 MHz.  
5
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EM4006  
Modulator Switch  
Due to the low impedance of the antenna and resonant  
capacitor the Modulator Switch has to present low RF  
impedance when switched ON (about 100 ohms).  
The minimum time period with the Modulator Switch ON  
is 38 µs. At lower data rates this time is even much  
longer. The current consumption of divider chain running  
at 13 MHz is near 60 µA. Putting together this two figures  
it is clear that it is not possible to supply the IC during the  
time the Modulator Switch is ON from the integrated  
Supply Buffer Capacitor which value is approximately 140  
pF. The IC has to get power from the RF field also during  
the time the Modulator Switch is ON.  
This problem is solved by putting the Modulator Switch on  
the output of the Rectifier (between VDD and VSS) and  
regulating its ON resistance in function of supply voltage.  
When the supply voltage is high the ON impedance is low.  
When the supply voltage drops near the region where the  
operation of the IC at 13.56 MHz is not guaranteed the  
ON impedance is increased in order to prevent further  
drop.  
1
0
1
1
0
0
0
1
1
0
1
NRZ-L  
STREAM  
DM-M  
CODED  
Bit i-1 Bit i  
x
0
1
1
0
0
no transition at the beginning of Bit i,  
transition at the beginning of Bit i,  
no transition at the beginning of Bit i,  
transition in the middle of Bit i  
no transition in the middle of Bit i  
no transition in the middle of Bit i  
Fig. 6  
Power Supply Management  
For a correct operation, the device must be initialised.  
When the transponder is put in the RF field, the supply  
voltage increases until it achieves Vr limit (see Figure 7).  
During this time and for an additionnal 64 bit period, the  
modulator switch is on and the device initialises its  
internal logic.  
At this point, the data transmission starts and runs while  
the supply voltage is higher than Vmin. If the supply  
voltage decreases under this limit, the device is again in  
an initialising state and the modulator is on.  
6
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EM4006  
chip operating voltage range: from Vmin to Vmax  
supply voltage  
VDD  
Vmax (voltage clipping)  
chip supply voltage  
Vr (Read wake up)  
Vmin  
time  
modulator  
ON/OFF  
ON  
READ  
64 bits  
period  
OFF  
time  
Fig. 7  
Miller Encoder  
Others  
The input to Miller encoder is NRZ data coming from  
LROM. The output is coded according to Miller format and  
is driving the modulator Switch. See figure 6 for example  
of Miller code.  
As mentioned in Output Sequence, during the pause (LW)  
the Modulator Switch is OFF. When observing the pause  
duration one has to remember that the time with  
Modulator Switch OFF effectively observed can vary due  
to different terminations of STDMS. The stop bit at 0 can  
be represented either by Modulator Switch ON or OFF  
depending on the data. The start bit at 1 adds 1/2 of data  
period OFF (transition in the middle of bit period).  
Figure below show the four possible terminations of  
STDMS and its influence on entire period passed by  
Modulator Switch OFF. Level LOW represents Modulator  
Switch OFF. LDB stands for last data bit.  
Clock Generation  
The clock of the logic is extracted from the RF signal. The  
clock extracted from RF signal is driving the divider chain  
consisting of toggle flip-flops. The output of this divider  
chain is data clock with which the data from Laser ROM  
(LROM) is addressed, encoded and sent to Modulator  
Switch.  
The layout of divider chain is designed in a way that  
different data rates can be chosen with metal mask  
(options).  
The following division factors are possible on request:  
128, 256, 1024, 2048, 4094 and 8192.  
The standard is 512.  
7
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EM4006  
LDB  
1
1
0
0
Last data  
bit  
Stop bit  
at 0  
Pause 8 +1 bit periods  
Start bit  
at 1  
This transition is not due to Miller encoding.  
Fig. 8  
8
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EM4006  
Pad Description  
Name  
C2  
Description  
connection to antenna  
connection to antenna  
positive supply  
C1  
VDD  
Tout  
TESTn  
VSS  
test output  
test input with pull up  
negative supply  
Package Information  
CID Package  
PCB Package  
FRONT VIEW  
Y
Z
K
J
SYMBOL  
MIN  
8.2  
3.8  
TYP  
8.5  
4.0  
6.0  
0.5  
1.3  
0.4  
0.44  
MAX  
8.8  
4.2  
TOP VIEW  
B
A
B
D
e
F
g
J
K
R
X
5.8  
6.2  
0.38  
1.25  
0.3  
0.42  
0.115 0.127  
0.4 0.5  
0.62  
1.35  
0.5  
0.46  
0.139  
0.6  
MARKING  
AREA  
D
A
C2  
C1  
Dimensions are in mm  
R
SYMBOL MIN  
TYP  
MAX  
e
X
Y
Z
8.0  
4.0  
C2  
C1  
1.0  
F
F
Dimensions are in mm  
g
Fig. 9  
Fig. 10  
Pad position  
14  
325  
513  
772  
1144  
1124  
1600  
EM4006  
316  
152  
740  
Y
1041  
X
C1, C2 pad size : 95 X 95  
Other pads size : 76 X 76  
All dimensions in µm  
Fig. 11  
9
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EM4006  
Ordering Information  
Die Form  
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.  
F9 WS 11 %%%  
EM4006  
-
Version:  
Customer Version:  
F9 = Miller, 512 clocks per bit  
%%% = only for custom specific version  
Die form:  
Bumping:  
WW = Wafer  
" " (blank) = no bumps  
E = with Gold Bumps  
WS = Sawn Wafer/Frame  
WT = Sticky Tape  
WP = Waffle Pack (note 1)  
Thickness:  
7 = 7 mils (178um)  
11 = 11 mils (280um)  
21 = 21 mils (533um)  
Packaged Devices  
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.  
F9 CI2L C %%%  
EM4006  
-
Version:  
Customer Version:  
F9 = Miller, 512 clocks per bit  
%%% = only for custom specific version  
Package:  
Delivery Form:  
B = Tape  
C = Bulk  
CI2L = CID Pack, 2 pins (length 2.5mm)  
CB2R = PCB Package, 2 pins  
Remarks:  
For ordering please use table of “Standard Version” table below.  
For specifications of Delivery Form, including gold bumps, tape and bulk, as well as possible other delivery form or  
packages, please contact EM Microelectronic-Marin S.A.  
Note 1: This is a non-standard package. Please contact EM Microelectronic-Marin S.A for availability.  
Standard Versions:  
The versions below are considered standards and should be readily available. For other versions or other delivery form,  
please contact EM Microelectronic-Marin S.A. Please make sure to give complete part number when ordering (without  
space between letters).  
Bit  
coding  
Cycle/  
bit  
Delivery  
Form /  
For EM internal use  
only  
Part Number  
Package/Die Form  
old version  
OPS#  
2878  
2930  
3669  
Bumping  
EM4006 F9 CB2RC  
EM4006 F9 CI2LC  
EM4006 F9 WP7  
Miller  
Miller  
Miller  
Miller  
512 PCB Package, 2 pins  
bulk  
501  
501  
512 CID package, 2 pins (length 2.5mm) bulk  
512 Die in waffle pack, 7 mils  
512 custom  
no bumps  
custom  
501  
EM4006 F9 YYY-%%%  
%%%  
Product Support  
Check our Web Site under Products/RF Identification section.  
Questions can be sent to cid@emmicroelectronic.com  
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry  
entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to  
change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the  
information given has not been superseded by a more up-to-date version.  
© EM Microelectronic-Marin SA, 01/02, Rev. C/404  
10  
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Copyright 2001, EM Microelectronic-Marin SA  

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