EM4102B5WP7 [EMMICRO]
Read Only Contactless Identification Device; 只读非接触式识别装置型号: | EM4102B5WP7 |
厂家: | EM MICROELECTRONIC - MARIN SA |
描述: | Read Only Contactless Identification Device |
文件: | 总7页 (文件大小:134K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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EM MICROELECTRONIC - MARIN SA
EM4102
Read Only Contactless Identification Device
Description
Features
The EM4102 (previously named H4102) is a CMOS
integrated circuit for use in electronic Read Only RF
Transponders. The circuit is powered by an external coil
placed in an electromagnetic field, and gets its master
clock from the same field via one of the coil terminals. By
turning on and off the modulation current, the chip will
send back the 64 bits of information contained in a factor
programmed memory array.
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64 bit memory array laser programmable
Several options of data rate and coding available
On chip resonance capacitor
On chip supply buffer capacitor
On chip voltage limiter
Full wave rectifier on chip
Large modulation depth due to a low impedance
modulation device
The programming of the chip is performed by laser fusing
of polysilicon links in order to store a unique code on each
chip.
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Operating frequency 100 - 150 kHz
Very small chip size convenient for implantation
Very low power consumption
The EM4102 has several metal options which are used to
define the code type and data rate. Data rates of 64, 32
and 16 periods of carrier frequency per data bit are
available. Data can be coded as Manchester, Biphase or
PSK.
Applications
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Animal implantable transponder
Animal ear tag
Industrial transponder
Due to low power consumption of the logic core, no
supply buffer capacitor is required. Only an external coil
is needed to obtain the chip function.
resonance capacitor of 78 pF is also integrated.
A parallel
Typical Operating Configuration
Pin Assignment
Coil1
VSS
VDD
EM4102
EM4102
COIL2
COIL1
Coil2
L: typical 20.8mH for fo = 125kHz
COIL1
COIL2
Coil terminal / Clock input
Coil terminal
Fig. 1
Fig. 2
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EM4102
Absolute Maximum Ratings
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static precautions
must be taken as for any other CMOS component. Unless
otherwise specified, proper operation can only occur when
all terminal voltages are kept within the voltage range.
Unused inputs must always be tied to a defined logic
voltage level.
Parameter
Maximum DC Current forced
on COIL1 & COIL2
Symbol
ICOIL
Conditions
±30mA
Power Supply
VDD
-0.3 to 7.5V
Storage Temp. Die form
Storage Temp. PCB form
Tstore
Tstore
-55 to +200°C
-55 to +125°C
Operating Conditions
Electrostatic discharge
maximum to MIL-STD-883C
method 3015
VESD
2000V
Parameter
Operating Temp.
Symbol Min Typ Max Units
Top
ICOIL
Vcoil
fcoil
-40
-10
3
+85
°C
mA
Vpp
Maximum Coil Current
AC Voltage on Coil
Supply Frequency
10
Stresses above these listed maximum ratings may cause
permanent damages to the device. Exposure beyond
specified operating conditions may affect device reliability
or cause malfunction.
14*
100
150 kHz
*) The AC Voltage on Coil is limited by the on chip voltage
limitation circuitry. This is according to the parameter Icoil
in the absolute maximum ratings.
System Principle
Transponder
Tranceiver
Coil1
Antenna
Oscillator
Driver
EM4102
Coil2
Filter
and
Demodulator
Gain
Data received
from transponder
Data decoder
Signal on coils
Transponder coil
Transeiver coil
RF Carrier
Data
Fig. 3
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EM4102
Electrical Characteristics
VDD = 1.5V, VSS = 0V,
fC1 = 134kHz square wave, Ta = 25°C
VC1 = 1.0V with positive peak at VDD and negative peak at VDD -1V unless otherwise specified
Parameter
Supply Voltage
Symbol Test Conditions
Min.
1.5
Typ.
Max.
1)
Units
V
VDD
Rectified Supply Voltage
Coil1 - Coil2 Capacitance
Power Supply Capacitor
VDDREC
Cres
VCOIL1 - VCOIL2 = 2.8 VDC
Modulator switch = “ON”
Vcoil=100mVRMS f=10kHz
1.5
V
78 2)
125
pF
pF
Csup
Manchester and biphase
versions
Supply Current
IDD
0.6
1.5
µA
C2 pad Modulator ON
voltage drop
VONC2
VDD=5.0V IVDDC2=1mA
with ref. to VDD
150
500
220
280
mV
PSK version
Supply Current
IDDPSK
0.9
2.0
µA
C2 pad Modulator ON
voltage drop
VONC2PSK VDD=5.0V IVDDC2=100µA
with ref. to VDD
650
800
mV
Note 1) The maximum voltage is defined by forcing 10mA on COIL1 - COIL2
Note 2) The tolerance of the resonant capacitor is ± 15% over the whole production.
On a wafer basis, the tolerance is ± 2%
Timing Characteristics
VDD = 1.5V, VSS = 0V, fcoil = 134kHz square wave, Ta = 25°C
VC1 = 1.0V with positive peak at VDD and negative peak at VDD -1V unless otherwise specified
Timings are derived from the field frequency and are specified as a number of RF periods.
Parameter
Symbol
Test Conditions
Value
Units
Read Bit Period
Trdb
depending on option
64, 32, 16
RF periods
Timing Waveforms
TOC
64, 32 or 16 TOC, depending on option
COIL1
BIT n
BIT n+1
BIT n+2
Serial Data Out
Fig. 4
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EM4102
Block Diagram
CLOCK
EXTRACTOR
Logic
Clock
COIL1
VDD
AC1
+
Cress
Csup
FULL WAVE
RECTIFIER
AC2
MEMORY
ARRAY
SEQUENCER
-
VSS
COIL2
Serial
Data Out
DATA
MODULATOR
DATA
ENCODER
Modulation
Control
Fig. 5
The EM4102 contains 64 bits divided in five groups of
information. 9 bits are used for the header, 10 row parity
bits (P0-P9), 4 column parity bits (PC0-PC3), 40 data bits
(D00-D93), and 1 stop bit set to logic 0.
Functional Description
General
The EM4102 is supplied by means of an electromagnetic
field induced on the attached coil. The AC voltage is
rectified in order to provide a DC internal supply voltage.
When the last bit is sent, the chip will continue with the
first bit until the power goes off.
1
1
1
1
1
1
1
1
1
9 header bits
8 version bits or
customer ID
D00 D01 D02 D03 P0
D10 D11 D12 D13 P1
D20 D21 D22 D23 P2
D30 D31 D32 D33 P3
D40 D41 D42 D43 P4
D50 D51 D52 D53 P5
D60 D61 D62 D63 P6
D70 D71 D72 D73 P7
D80 D81 D82 D83 P8
Full Wave Rectifier
The AC input induced in the external coil by an incident
magnetic field is rectified by a Graetz bridge. The bridge
will limit the internal DC voltage to avoid malfunction in
strong fields.
32 data bits
Clock Extractor
One of the coil terminals (COIL1) is used to generate the
master clock for the logic function. The output of the clock
extractor drives a sequencer.
D90 D91 D92 D93 P9 10 line parity
PC0 PC1 PC2 PC3 S0 bits
4 column parity bits
Sequencer
The sequencer provides all necessary signals to address
the memory array and to encode the serial data out.
Three mask programmed encoding versions of logic are
available. These three encoding types are Manchester,
biphase and PSK. The bit rate for the first and the second
type can be 64 or 32 periods of the field frequency. For
the PSK version, the bit rate is 16.
The sequencer receives its clock from the COIL1 clock
extractor and generates every internal signal controlling
the memory and the data encoder logic.
The header is composed of the 9 first bits which are all
programmed to "1". Due to the data and parity
organisation, this sequence cannot be reproduced in the
data string. The header is followed by 10 groups of 4 data
bits allowing 100 billion combinations and 1 even row
parity bit. Then, the last group consists of 4 event column
parity bits without row parity bit. S0 is a stop bit which is
written to "0"
Bits D00 to D03 and bits D10 to D13 are customer
specific identification.
These 64 bits are outputted serially in order to control the
modulator. When the 64 bits data string is outputted, the
output sequence is repeated continuously until power
goes off.
Data Modulator
The data modulator is controlled by the signal Modulation
Control in order to induce a high current in the coil. The
coil 2 transistor drives this high current. This will affect the
magnetic field according to the data stored in the memory
array.
Memory Array for Manchester & Bi-Phase encoding
ICs
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EM4102
Memory Array for PSK encoding ICs
Biphase Code
The PSK coded IC's are programmed with odd parity for
P0 and P1 and always with a logic zero.
The parity bits from P2 to P9 are even.
The column parity PC0 to PC3 are calculated including
the version bits and are even parity bits.
At the beginning of each bit, a transition will occur. A logic
bit “1” will keep its state for the whole bit duration and a
logic bit “0” will show a transition in the middle of the bit
duration (see Fig. 7).
PSK Code
Code Description
Manchester
Modulation switch goes ON and OFF alternately every
period of carrier frequency. When a phase shift occurs, a
logical "0" is read from the memory. If no shift phase
occurs after a data rate cycle, a logical "1" is read (see
Fig. 8).
There is always a transition from ON to OFF or from OFF
to ON in the middle of bit period. At the transition from
logic bit “1” to logic bit “0” or logic bit “0” to logic bit “1” the
phase change. Value high of data stream presented
below modulator switch OFF, low represents switch ON
(see Fig. 6).
Manchester Code
Binary data
X
1
1
1
1
1
1
1
1
1
0
1
0
1
0
0
0
1
1
0
Memory output
Modulator control
Modulation control "low" means high current
Fig. 6
Biphase Code
0
1
1
0
1
0
0
1
Binary data
Memory output
Modulator control
Modulation control "low" means high current
Fig. 7
PSK Code
Serial Data Out
COIL1
Modulator control
"0" ON SERIAL OUT
"1" ON SERIAL OUT
Modulation control "low" means high current
Fig. 8
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EM4102
Pad Description
Pad
1
2
3
4
Name
Function
1
2
4
3
COIL2
COIL1
VDD
Coil terminal 2 / data output
Coil terminal 1 / clock input
Positive internal supply voltage
Negative internal supply voltage
VSS
CHIP Dimensions
EM4102
110
661
717
734
1295
415
248
523
Y
1016
X
Vss, Vdd pad size : 76 X 76
C1, C2 pad size : 200 X 600
All dimensions in µm
Fig. 9
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EM4102
Ordering Information
Die Form
A6 WS 11 E %%%
EM4102
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Version:
Customer Version:
A6 = Manchester, 64 clocks per bit
%%% = only for custom specific version
A5 = Manchester, 32 clocks per bit
B6 = Bi-Phase, 64 clocks per bit
B5 = Bi-Phase, 32 clocks per bit
C4 = PSK, 16 clocks per bit
Bumping:
" " (blank) = no bumps
E = with Gold Bumps
Die form:
Thickness:
WW = Wafer
7 = 7 mils (178um)
11 = 11 mils (280um)
WS = Sawn Wafer/Frame
WT = Sticky Tape
WP = Waffle Pack (note 1)
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
Remarks:
•
•
For ordering please use table of “Standard Version” table below.
For specifications of Delivery Form, including gold bumps, tape and bulk, as well as possible other delivery form or
packages, please contact EM Microelectronic-Marin S.A. Sales office.
•
Note 1: This is a non-standard package. Please contact EM Microelectronic-Marin S.A Sales office for availability.
Standard Versions:
The versions below are considered standards and should be readily available. For other versions or other delivery form,
please contact EM Microelectronic-Marin S.A. Please make sure to give complete part number when ordering, without
spacing.
Part Number
Bit coding
Cycle/bit
Card / Die Form
Delivery Form
/ bumping
EM4102A6WP11E
EM4102A6WS11E
EM4102A6WT11E
EM4102A6WW11E
EM4102XXYYY-%%%
Manchester
Manchester
Manchester
Manchester
custom
64
64
64
64
Die in waffle pack, 11 mils
Sawn wafer/Frame, 11 mils
Die on sticky tape, 11 mils
Unsawn wafer, 11 mils
with gold bumps
with gold bumps
with gold bumps
with gold bumps
custom
custom custom
Product Support
Check our Web Site under Products/RF Identification section.
Questions can be sent to info@emmicroelectronic.com
EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the
Company's standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no
responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at
any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other
intellectual property of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not
authorized for use as components in life support devices or systems.
© EM Microelectronic-Marin SA, 02/05, Rev. F
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