SED1670 [EPSON]

Dot Matrix High Duty LCD Driver; 点阵高负载LCD驱动器
SED1670
型号: SED1670
厂家: EPSON COMPANY    EPSON COMPANY
描述:

Dot Matrix High Duty LCD Driver
点阵高负载LCD驱动器

驱动器 CD
文件: 总8页 (文件大小:41K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PF836-02  
SED1670  
Dot Matrix High Duty LCD Driver  
100 Output  
1/64 to 1/300 in display duty  
CMOS High Voltage Resistant Process  
OVERVIEW  
The SED1670 is a 100 output low-power resistance common (row) driver which is suitable for driving a very high  
capacity dotmatrix LCD panels upto a duty ratio of 1/300. It is intended to be used in conjunction with the SED1640D  
or SED1606D as a pair.  
Since the SED1670 is so designed to drive LCDs over a wide range of voltages, and also the maximum potential  
V0 of its LCD drive bias voltages is isolated from VDD to allow the LCD driving bias voltages to be externally  
generated optionally with a high accuracy, it can cope with a wide range of LCD panels.  
Owing to its pad layout which can minimize its PC boards mounting space in addition to its selectable bidirectional  
driver output sequence and as many as 100 LCD output segments of high pressure resistance and low output  
impedance, it is possible to obtain the highest driver working efficiency for the 1/200 duty panel.  
And the SED1670 can display 65 x 132 panel when used as a common driver of RAM buit-in driver, SED1531.  
FEATURES  
Number of LCD drive output segments: 100  
Common output ON resistance: 700(Typ.)  
Display duty ratio: 1/64 to 1/300 (Reference)  
Display capacity: Possible to display 640 x 480 dots when used in combination with SED 1640D or SED1606D.  
Selectable pin output shift direction  
No-bias display OFF function (*1*)  
Instantaneous display blanking enabled by inhibit function (*0*)  
Adjustable offset bias of LCD power to VDD level  
Wide range of LCD drive voltages: –7 V to –28 V (Absolute maximum rated voltage: –30 V)  
Logic system power supply: –2.7 V to –5.5 V  
Chip packaging  
SED1670D0A (Al-pad die form)  
SED1670D1A  
SED1670D0B (Au bump die form)  
SED1670D1B  
SED1670T0A (TCP die form)  
SED1670T1A  
* Under Planning  
* Under Planning  
No radial rays countermeasure taken in designing  
1
SED1670  
BLOCK DIAGRAM  
COM0  
COM99  
COM1  
············  
············  
COM2  
V
DD  
V
SS  
V
1
V
V
4
0
LCD driver 100 bit  
Voltage  
control circuit  
V
5
FR  
shift register 100 bit  
shift register 100 bit  
DIO1  
YSCL  
SHL  
DIO2  
DOFF  
INH  
INH in SED16700*  
DOFF in SED16701*  
2
SED1670  
• PAD LAYOUT AND COORDINATES  
57  
92  
56  
93  
Y
X
(0,0)  
37  
112  
1
36  
Chip size .............................. 5.49mm x 3.03mm  
1) Au bump specification reference values  
Bump specific : High Quarity Au bump  
Bump size :  
100µm x 113µm  
17µm - 28µm  
Bump height :  
2) Al Pad specification reference values  
Pad Opening : 100µm x 100µm  
3
SED1670  
PAD  
Actual dimensions  
PAD  
NAME  
Actual dimensions  
PAD  
NAME  
Actual dimensions  
NO.  
1
NAME  
X
Y
NO.  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
X
Y
NO.  
81  
X
Y
COM5  
6
-2187  
-2058  
-1929  
-1799  
-1670  
-1541  
-1412  
-1283  
-1153  
-1024  
-895  
-766  
-637  
-507  
-378  
-249  
-120  
10  
-1357  
COM45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
83  
84  
2584  
-711  
-581  
-452  
-323  
-194  
-65  
COM85  
86  
-803  
1357  
2
82  
-932  
3
7
83  
87  
-1062  
-1191  
-1320  
-1449  
-1578  
-1708  
-1837  
-1966  
-2095  
-2224  
-2473  
4
8
84  
88  
5
9
85  
89  
6
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
89  
90  
7
65  
87  
91  
8
194  
323  
452  
581  
711  
840  
969  
1098  
1231  
1357  
88  
92  
9
89  
93  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
90  
94  
91  
95  
92  
96  
1357  
1334  
1201  
1071  
941  
93  
97  
94  
98  
95  
99  
2584  
2298  
2168  
2039  
1910  
1781  
1652  
1522  
1393  
1264  
1135  
1006  
876  
96  
DIO2  
DOFF  
(INH)  
FR  
YSCL  
SHL  
VDD  
VSS  
V0  
97  
715  
(97)  
98  
139  
585  
455  
268  
99  
397  
100  
101  
102  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
325  
526  
185  
656  
46  
785  
-112  
-252  
-391  
-531  
-671  
-810  
-941  
-1071  
-1201  
-1334  
914  
V1  
1043  
1172  
1302  
1431  
1560  
1689  
1818  
1948  
2077  
2206  
2335  
2584  
2584  
2584  
2584  
V4  
V5  
DIO1  
COM0  
1
747  
618  
489  
2
360  
3
230  
4
-2473  
101  
-28  
-1357  
-1231  
-1094  
-969  
-157  
-286  
-416  
-545  
-674  
-840  
1357  
PAD No. 97: INH for SED1670  
DOFF for SED1670  
0
1
*
*
*
*
4
SED1670  
• ABSOLUTE MAXIMUM RATINGS  
VDD=0V  
Parameter  
Supply voltage (1)  
Supply voltage (2)  
Supply voltage (3)  
Input voltageVI  
Symbol  
Rating  
–7.0 to +0.3  
–30.0 to +0.3  
V5–0.3 to +0.3  
VSS–0.3 to +0.3  
VSS–0.3 to +0.3  
20  
Unit  
V
VSS  
V5  
V
V0, V1, V4  
V
V
Output voltage  
VO  
IO  
V
Output current (1)  
Output current (2)  
Operating temperature  
Storing temperature 1  
mA  
mA  
°C  
°C  
IOCOM  
Topr  
Tstg  
20  
–40 to + 85  
–65 to +150  
>
>
>
>
Notes: 1. The voltage of V0, V1 and V4 must always satisfy the condition of VDD V0 V1 V4 V5.  
=
=
=
=
2. Floating of the logic system power during while the LCD drive system power is applied, or exceeding  
VSS = –2.6 V or more can cause permanent damage to the LSI. Functional operation under these  
conditions is not implied.  
Care should be taken to the power supply sequence especially in the system power ON or OFF.  
5
SED1670  
• ELECTRICAL CHARACTERISTICS  
DC characteristics  
(Unless otherwise specified, VDD = V0 = 0V, VSS = –5.0V±10%, Ta = –40 to 85°C.)  
Symbol  
VSS  
Condition  
Min.  
–5.5  
Typ.  
–5.0  
Max.  
–2.7  
Unit  
V
Applicable pin  
VSS  
Parameter  
Supply voltage (1)  
Recommended operating  
voltage  
V5  
–28.0  
–7.0  
V
V5  
V5  
V0  
V1  
V4  
Operation enable voltage  
Supply voltage (2)  
Supply voltage (3)  
Supply voltage (4)  
“H” input voltage (1)  
“L” input voltage (1)  
“H” input voltage (2)  
“L” input voltage (2)  
V5  
V0  
Functional operation  
Recommended value  
Recommended value  
Recommended value  
–7.0  
0
V
V
V
V
V
V
V
V
–2.5  
2/9·V5  
V5  
V1  
VDD  
V4  
7/9·V5  
0
VIH  
VIL  
VIHT  
VILT  
0.2VSS  
VSS  
DIO1, DIO2,  
YSCL, SHL, FR  
VSS=–2.7V to –5.5V  
VSS=–2.7V to –5.5V  
0.8VSS  
0
0.2VSS  
VSS  
DOFF, INH  
0.85VSS  
IOH=–0.3mA  
“H” output voltage  
“L” output voltage  
VOH  
VOL  
IOH=–0.2mA  
(VSS=–2.7 to –4.5V)  
–0.4  
VSS  
0
V
V
DIO1, DIO2  
IOL=+0.3mA  
IOL=+0.2mA  
VSS+0.4  
(VSS=–2.7 to –4.5V)  
YSCL, SHL,  
DOFF, INH, FR  
Input leakage current  
Input/output leakage current  
Static current  
2.0  
5.0  
25  
µA  
µA  
µA  
ILI  
VSS VIN 0V  
VSS VIN 0V  
DIO1, DIO2  
VDD  
ILI/O  
IDDS  
V5=–7.0 to –28.0V  
VIH=VDD, VIL=VSS  
When the  
V1, V4, V0 or  
V5 level is  
output  
VON V5=  
=0.5V –20.0V  
RCOM  
0.70  
7
1.40  
15  
KΩ  
µA  
µA  
COM0~COM99  
Output resistance  
VSS=–5.0V, VIH=VDD,  
VIL=VSS, fYSCL=12KHz,  
Frame frequency=60Hz  
Input data; “H” at no load  
every 1/200 duty  
Average operating current  
consumption (1)  
VSS  
V5  
ISS1  
ISS2  
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -  
Other conditions are the same  
5
10  
as VSS = –3.0 V  
VSS=–5.0, V,=–2.0V,  
Average operating current  
consumption (2)  
V4=–18.0V, V5=–20.0V  
Other conditions are the same  
as in the item of ISS1.  
7
15  
YSCL, SHL,  
DOFF, INH, FR  
Input pin capacitance  
CI  
8
pF  
pF  
Ta=25°C  
Input/output pin capacitance  
CI/O  
15  
DIO1, DIO2  
6
SED1670  
• DIFFERENT POINTS FROM REPLACEMENT PRODUCT  
SED1670*0*  
SED1631***  
Function  
Bidirectional shift register  
Bidirectional shift register  
INH  
INH  
100 output segments  
100 output segments  
Output Tr configuration  
PAD layout  
Fig. 1  
Fig. 2  
Identical to the equivalent product  
Different from the equivalent product  
PAD coordinates  
SED1670*1*  
SED1635***  
Function  
Bidirectional shift register  
Bidirectional shift register  
DOFF  
DOFF  
100 output segments  
100 output segments  
Output Tr configuration  
PAD layout  
Fig. 1  
Fig. 2  
Identical to the equivalent product  
Different from the equivalent product  
PAD coordinates  
COM  
COM  
V
0
V0  
V1  
V4  
V
5
V
1
V
5
V
4
Fig. 1  
FIg. 2 @  
7
SED1670  
NOTICE:  
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson  
reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any  
inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material  
is applicable to products requiring high level reliability, such as, medical products. Morever, no license to any intellectual property rights is granted  
by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any  
patent or copyright infringement of a third party. This material or portions thereof may contain techonology or the subject relating to strategic  
products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry  
of International Trade and Industry or other approval from another government agency.  
©
Seiko Epson Corporation 1996 All right reserved.  
ELECTRONIC DEVICE MARKETING DEPARTMENT  
IC Marketing & Engineering Group  
421-8 Hino, Hino-shi, Tokyo 191, JAPAN  
Phone: 0425-87-5816  
FAX: 0425-87-5624  
International Marketing Department I (Europe, U.S.A.)  
421-8 Hino, Hino-shi, Tokyo 191, JAPAN  
Phone: 0425-87-5812  
FAX: 0425-87-5564  
International Marketing Department II (Asia)  
421-8 Hino, Hino-shi, Tokyo 191, JAPAN  
H
Phone: 0425-87-5814  
FAX: 0425-87-5110  
Issue Nov. 1996, printed in Japan  

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