PMP5818UWSR [ERICSSON]
DC-DC Regulated Power Supply Module, 1 Output, 88W, Hybrid, ROHS COMPLIANT PACKAGE-11;
| 型号： | PMP5818UWSR |
| 厂家： | 
ERICSSON |
| 描述： | DC-DC Regulated Power Supply Module, 1 Output, 88W, Hybrid, ROHS COMPLIANT PACKAGE-11 |
| 文件： | 总56页 (文件大小：1902K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
C October2012
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44 V, Output up to 16 A / 88 W
Key Features
•
•
•
•
•
•
•
Industry standard POLA™ compatible
22.1 x 18.93 x 8.5 mm (0.87 x 0.745 x 0.335 in.)
High efficiency, up to. 96%
Auto Track™ sequencing pin
Turbo Trans™ Technology for Ultra-Fast Transient
Smart Sync Technology
More than 6.0 million hours MTBF
General Characteristics
•
•
•
•
•
•
•
•
•
Operating temperature: -40ºC to 85ºC
Input under voltage protection
Start up into a pre-biased output
Output short-circuit protection
On/Off inhibit control
Wide input voltage function
Wide output voltage adjust function
Highly automated manufacturing ensures quality
ISO 9001/14001 certified supplier
Safety Approvals
Design for Environment
Meets requirements in high-
temperature lead-free soldering
processes.
Contents
General Information
Safety Specification
Absolute Maximum Ratings
............................................................................. 2
............................................................................. 3
............................................................................. 4
Product Program
Ordering No.
0.7-5.5V, 16A / 88W
PMP 5818UW P ..............................................................................
............................................................................. 5
............................................................................. 9
........................................................................... 13
........................................................................... 18
........................................................................... 23
........................................................................... 28
........................................................................... 33
........................................................................... 36
0.7V, 16A / 11.2W Electrical Specification
1.0V, 16A / 16.0W Electrical Specification
1.2V, 16A / 19.2W Electrical Specification
1.5V, 16A / 24.0W Electrical Specification
1.8V, 16A / 28.8W Electrical Specification
2.5V, 16A / 40.0W Electrical Specification
3.3V, 16A / 52.8W Electrical Specification
5.0V, 16A / 80.0W Electrical Specification
EMC Specification
........................................................................... 42
........................................................................... 42
........................................................................... 48
........................................................................... 49
........................................................................... 51
........................................................................... 53
........................................................................... 53
........................................................................... 56
Operating Information
Thermal Consideration
Connections
Mechanical Information
Soldering Information
Delivery Information
Product Qualification Specification
C October2012
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44 V, Output up to 16 A / 88 W
Quality Statement
General Information
The products are designed and manufactured in an industrial
environment where quality systems and methods like ISO 9000, 6σ
(sigma), and SPC are intensively in use to boost the continuous
improvements strategy. Infant mortality or early failures in the products
are screened out and they are subjected to an ATE-based final test.
Conservative design rules, design reviews and product qualifications,
plus the high competence of an engaged work force, contribute to the
high quality of our products.
Ordering Information
See Contents for individual product ordering numbers.
Option
SMD pin
SMD pin with lead-free surface
Suffix
S
SR
Ordering No.
PMP 5818UW S
PMP 5818UW SR
Reliability
Warranty
The Mean Time Between Failure (MTBF) is calculated at full output
power and an operating ambient temperature (TA) of +40°C, which is a
typical condition in Information and Communication Technology (ICT)
equipment. Different methods could be used to calculate the predicted
MTBF and failure rate which may give different results. Ericsson Power
Modules currently uses Telcordia SR332.
Warranty period and conditions are defined in Ericsson Power Modules
General Terms and Conditions of Sale.
Limitation of Liability
Ericsson Power Modules does not make any other warranties,
expressed or implied including any warranty of merchantability or fitness
for a particular purpose (including, but not limited to, use in life support
applications, where malfunctions of product can cause injury to a
person’s health or life).
Predicted MTBF for the series is:
-
6.0 million hours according to Telcordia SR332, issue 1, Black box
technique.
Telcordia SR332 is a commonly used standard method intended for
reliability calculations in ICT equipment. The parts count procedure used
in this method was originally modelled on the methods from MIL-HDBK-
217F, Reliability Predictions of Electronic Equipment. It assumes that no
reliability data is available on the actual units and devices for which the
predictions are to be made, i.e. all predictions are based on generic
reliability parameters.
Compatibility with RoHS requirements
The products are compatible with the relevant clauses and requirements
of the RoHS directive 2002/95/EC and have a maximum concentration
value of 0.1% by weight in homogeneous materials for lead, mercury,
hexavalent chromium, PBB and PBDE and of 0.01% by weight in
homogeneous materials for cadmium.
Exemptions in the RoHS directive utilized in Ericsson Power Modules
products include:
-
-
-
Lead in high melting temperature type solder (used to solder the
die in semiconductor packages)
Lead in glass of electronics components and in electronic ceramic
parts (e.g. fill material in chip resistors)
Lead as an alloying element in copper alloy containing up to 4%
lead by weight (used in connection pins made of Brass)
The exemption for lead in solder for servers, storage and storage array
systems, network infrastructure equipment for switching, signaling,
transmission as well as network management for telecommunication is
only utilized in surface mount products intended for end-users’ leaded
SnPb Eutectic soldering processes. (See ordering information table)
C October2012
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44 V, Output up to 16 A / 88 W
Safety Specification
Isolated DC/DC converters
It is recommended that a slow blow fuse with a rating twice the
maximum input current per selected product be used at the input of
General information
Ericsson Power Modules DC/DC converters and DC/DC regulators are
designed in accordance with safety standards IEC/EN/UL60950, Safety
of Information Technology Equipment.
each DC/DC converter. If an input filter is used in the circuit the fuse
should be placed in front of the input filter.
In the rare event of a component problem in the input filter or in the
DC/DC converter that imposes a short circuit on the input source, this
fuse will provide the following functions:
IEC/EN/UL60950 contains requirements to prevent injury or damage
due to the following hazards:
•
•
Isolate the faulty DC/DC converter from the input power
source so as not to affect the operation of other parts of the
system.
Protect the distribution wiring from excessive current and
power loss thus preventing hazardous overheating.
•
•
•
•
•
•
Electrical shock
Energy hazards
Fire
Mechanical and heat hazards
Radiation hazards
Chemical hazards
The galvanic isolation is verified in an electric strength test.
The test voltage (Viso) between input and output is
On-board DC-DC converters and DC/DC regulators are defined as
component power supplies. As components they cannot fully comply
with the provisions of any Safety requirements without “Conditions of
Acceptability”. Clearance between conductors and between conductive
parts of the component power supply and conductors on the board in
the final product must meet the applicable Safety requirements. Certain
conditions of acceptability apply for component power supplies with
limited stand-off (see Mechanical Information for further information). It
is the responsibility of the installer to ensure that the final product
housing these components complies with the requirements of all
applicable Safety standards and Directives for the final product.
1500 Vdc or 2250 Vdc for 60 seconds (refer to product specification).
Leakage current is less than 1 µA at nominal input voltage.
24 V DC systems
The input voltage to the DC/DC converter is SELV (Safety
Extra Low Voltage) and the output remains SELV under normal and
abnormal operating conditions.
48 and 60 V DC systems
If the input voltage to the DC/DC converter is 75 Vdc or less, then the
output remains SELV (Safety Extra Low Voltage) under normal and
abnormal operating conditions.
Component power supplies for general use should comply with the
requirements in IEC60950, EN60950 and UL60950 “Safety of
information technology equipment”.
There are other more product related standards, e.g. IEEE802.3af
“Ethernet LAN/MAN Data terminal equipment power”, and ETS300132-2
“Power supply interface at the input to telecommunications equipment;
part 2: DC”, but all of these standards are based on IEC/EN/UL60950
with regards to safety.
Single fault testing in the input power supply circuit should be performed
with the DC/DC converter connected to demonstrate that the input
voltage does not exceed
75 Vdc.
If the input power source circuit is a DC power system, the source may
be treated as a TNV2 circuit and testing has demonstrated compliance
with SELV limits and isolation requirements equivalent to Basic
Insulation in accordance with IEC/EN/UL60950.
Ericsson Power Modules DC/DC converters and DC/DC regulators are
UL60950 recognized and certified in accordance with EN60950.
Non-isolated DC/DC regulators
The flammability rating for all construction parts of the
products meets requirements for V-0 class material according to IEC
60695-11-10.
The input voltage to the DC/DC regulator is SELV (Safety
Extra Low Voltage) and the output remains SELV under normal and
abnormal operating conditions.
The products should be installed in the end-use equipment, in
accordance with the requirements of the ultimate application. Normally
the output of the DC/DC converter is considered as SELV (Safety Extra
Low Voltage) and the input source must be isolated by minimum Double
or Reinforced Insulation from the primary circuit (AC mains) in
accordance with IEC/EN/UL60950.
C October2012
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4V, Output up to 16 A / 88 W
Absolute Maximum Ratings
Characteristics
min
typ
max
Unit
Tref
TS
VI
Operating Temperature (see Thermal Consideration section)
Storage temperature
–40
–40
85
125
14
°C
°C
V
Input voltage
4.5
5/12
Remote Control pin voltage
Positive logic option
Negative logic option
Vin-0.5
N/A
N/A
Open
N/A
N/A
V
VRC
Vadj
V
Adjust pin voltage (see Operating Information section)
V
Stress in excess of Absolute Maximum Ratings may cause permanent damage. Absolute Maximum Ratings, sometimes referred to as no destruction limits, are
normally tested with one parameter at a time exceeding the limits of Output data or Electrical Characteristics. If exposed to stress above these limits, function
and performance may degrade in an unspecified manner.
Fundamental Circuit Diagram
+VSEN
3
2
1
2
VIN
VOUT
1
3
2
1
GND
-VSEN
Auto Track
TRK
ADJ
PWM Controller
Error Amplifier
Ref
Turbo Trans
SmartSync
GND
SYNC
GND
GND
Turbo Trans
UVLO Prog Block
RC Block
INH/UVLO
GND
C October2012
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4V, Output up to 16 A / 88 W
0.7V, 16A / 11.2W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 7.7 V, Radj = 681 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5
max
Unit
V
VI
Input voltage range
7.7
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
4.1
4.2
44
V
4.4
V
μF
W
PO
0
11.2
50 % of max IO
max IO
86.0
79.9
2.8
η
Efficiency
%
Pd
Pli
PRC
IS
Power Dissipation
Input idling power
Input standby power
Static Input current
Switching frequency
max IO
3.3
W
W
IO= 0 A, VI = 5 V
VI = 5 V (turned off with RC)
VI = 5 V, max IO
0-100 % of max IO
0.17
4.7
mW
A
2.82
300
fs
270
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5 V, max IO
0.689
0.679
0.700
0.711
0.721
V
Output voltage tolerance band 10-100 % of max IO
V
Idling voltage
Line regulation
Load regulation
IO = 0 A
0.700
±3
V
VO
max IO
mV
mV
VI = 5 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
Vtr
ttr
tr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
(from 10−90 % of VOi)
2.4
7.1
ms
ms
100 % of max IO
Start-up time
(from VI connection to 90 % of VOi)
ts
Max IO
1.1
9.0
7.0
0.3
9.0
ms
ms
ms
ms
ms
A
VI shut-down fall time.
tf
(From VI off to 10 % of VO)
IO = 0.1 A
Max IO
RC start-up time
tRC tInh
Max IO
RC shut-down fall time
(From RC off to 10 % of VO)
Io = 0.1 A
IO
Output current
0
16
C October2012
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4V, Output up to 16 A / 88 W
Ilim
Isc
Current limit threshold
Short circuit current
Tref < max Tref
Tref = 25ºC
29
29
A
A
See ripple & noise section,
max IO
VOac
Output ripple & noise
6.1
mVp-p
C October2012
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4V, Output up to 16 A / 88 W
0.7V, 16A / 11.2W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
95
[W]
4
90
85
3
2
1
0
4.5 V
4.5 V
5 V
80
75
70
5 V
7.7 V
7.7V
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
22
19
16
13
10
15
10
5
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
0
20
40
60
80
100 [°C]
Available load current vs. ambient air temperature and airflow at
VI = 5 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
0.80
0.705
0.60
0.703
0.701
0.699
0.697
4.5 V
4.5 V
5 V
0.40
0.20
0.00
5 V
7.7 V
7.7 V
20
24
28
32
36
40 [A]
0
4
8
12
16 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
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4V, Output up to 16 A / 88 W
0.7V, 16A / 11.2W Typical Characteristics
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1.0 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
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4V, Output up to 16 A / 88 W
1.0V, 16A / 16.0W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 11 V, Radj = 20.8 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5
max
Unit
V
VI
Input voltage range
11
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
4.1
4.2
44
V
4.4
16
V
μF
W
PO
0
50 % of max IO
max IO
89.0
84.3
3.0
η
Efficiency
%
Pd
Pli
PRC
IS
Power Dissipation
Input idling power
Input standby power
Static Input current
Switching frequency
max IO
3.5
W
W
IO= 0 A, VI = 5 V
VI = 5 V (turned off with RC)
VI = 5 V, max IO
0-100 % of max IO
0.20
4.7
mW
A
3.83
300
fs
270
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5 V, max IO
0.985
0.970
1.000
1.015
1.030
V
Output voltage tolerance band 10-100 % of max IO
V
Idling voltage
Line regulation
Load regulation
IO = 0 A
1.000
±3
V
VO
max IO
mV
mV
VI = 5 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
Vtr
ttr
tr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
(from 10−90 % of VOi)
2.5
6.8
ms
ms
100 % of max IO
Start-up time
(from VI connection to 90 % of VOi)
ts
Max IO
1.1
13.1
6.9
ms
ms
ms
ms
ms
A
VI shut-down fall time.
tf
(From VI off to 10 % of VO)
IO = 0.1 A
Max IO
RC start-up time
tRC tInh
Max IO
0.4
RC shut-down fall time
(From RC off to 10 % of VO)
Io = 0.1 A
13.8
IO
Output current
0
16
C October2012
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4V, Output up to 16 A / 88 W
Ilim
Isc
Current limit threshold
Short circuit current
Tref < max Tref
Tref = 25ºC
29
29
A
A
See ripple & noise section,
max IO
VOac
Output ripple & noise
7.8
mVp-p
C October2012
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4V, Output up to 16 A / 88 W
1.0V, 16A / 16.0W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
95
[W]
4
90
85
3
2
1
0
4.5 V
4.5 V
5 V
80
75
70
5 V
11 V
11V
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
22
15
10
5
19
16
13
10
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
0
20
40
60
80
100 [°C]
Available load current vs. ambient air temperature and airflow at
VI = 5 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
1.20
1.003
0.90
1.001
4.5 V
4.5 V
0.999
0.997
0.995
0.60
0.30
0.00
5 V
5 V
11 V
11 V
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
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4V, Output up to 16 A / 88 W
1.0V, 16A / 16.0W Typical Characteristics
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
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4V, Output up to 16 A / 88 W
1.2V, 16A / 19.2W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 13.2 V, Radj = 12.1 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5/12 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5/12
4.1
max
Unit
V
VI
Input voltage range
13.2
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
V
4.3
4.4
V
44
μF
W
PO
0
19.2
VI = 5 V, 50 % of max IO
VI = 5 V, max IO
90.3
86.0
86.8
84.7
3.1
VI = 5 V
Efficiency
η
%
VI = 12 V, 50 % of max IO
VI = 12 V, max IO
VI = 12 V
VI = 5 V, max IO
3.6
4.0
W
W
Pd
Power Dissipation
Input idling power
Input standby power
VI = 12 V, max IO
3.5
VI = 5 V, IO= 0 A
0.22
0.64
4.7
W
Pli
VI = 12 V, IO= 0 A
W
VI = 5 V (turned off with RC)
VI = 12 V (turned off with RC)
VI = 5 V, max IO
mW
mW
A
PRC
33.9
4.5
IS
fs
Static Input current
Switching frequency
VI = 12 V, max IO
1.9
A
0-100 % of max IO
270
300
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5/12 V, max IO
1.182
1.164
1.200
1.218
1.236
V
Output voltage tolerance band 10-100 % of max IO
V
V
VI = 5 V, IO = 0 A
Idling voltage
1.199
1.200
±3
VO
VI = 12 V, IO = 0 A
Line regulation
Load regulation
max IO
mV
mV
VI = 5/12 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±70
30
mV
voltage deviation
Without Turbo Trans
Load transient recovery time
μs
C October2012
s
4V, Output up to 16 A / 88 W
Co =1640 µF Type C
Load transient
VI = 12 V, Load step 25-75-25 % of
Vtr
ttr
tr
±55
30
mV
μs
voltage deviation
max IO, di/dt = 2.5 A/μs
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
2.5
6.9
2.7
ms
ms
ms
(from 10−90 % of VOi)
VI = 5 V, 100 % of max IO
Start-up time
ts
tr
(from VI connection to 90 % of VOi)
Ramp-up time
(from 10−90 % of VOi)
VI = 12 V, 100 % of max IO
Start-up time
ts
6.9
ms
(from VI connection to 90 % of
VOi)
VI shut-
Max IO
1.4
16.6
0.4
ms
ms
ms
VI = 5 V
down fall
IO = 0.1 A
Max IO
time.
tf
(From VI off
VI = 12 V
to 10 % of
IO = 0.1 A
19.8
ms
VO)
VI = 5 V , Max IO
VI = 12 V , Max IO
Max IO
7.0
6.8
0.4
7.1
0.3
ms
ms
ms
ms
ms
RC start-up time
RC shut-
VI = 5 V
down fall
Io = 0.1 A
tRC tInh
time
Max IO
(From RC off
VI = 12 V
to 10 % of
Io = 0.1 A
19.2
ms
VO)
IO
Output current
Current limit threshold
Short circuit current
0
16
A
A
A
Ilim
Isc
Tref < max Tref
Tref = 25ºC
30
30
See ripple & noise section,
max IO
VOac
Output ripple & noise VI = 5 V
9.0
mVp-p
mVp-p
Output ripple & noise VI = 12 See ripple & noise section,
max IO
VOac
11.3
V
C October2012
s
4V, Output up to 16 A / 88 W
1.2V, 16A / 19.2W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
95
[W]
4
90
85
3
2
1
0
4.5 V
4.5 V
5 V
5 V
80
75
70
13.2V
12.0V
13.2 V
12.0V
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
23
21
19
17
15
13
15
10
5
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
0
20
40
60
80
100 [°C]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
1.203
1.50
1.20
1.201
4.5V
4.5 V
0.90
0.60
0.30
5 V
5 V
13.2 V
12.0V
1.199
1.197
1.195
13.2 V
12.0V
0.00
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
s
4V, Output up to 16 A / 88 W
1.2V, 16A / 19.2W Typical Characteristics VI = 5 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
1.2V, 16A / 19.2W Typical Characteristics VI = 12 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1.0 V/div.).
Bottom trace: input voltage (10 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 12 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 12 V.
Output Voltage Adjust (see operating information)
Passive adjust
Active adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
The output voltage may be adjusted using a current/voltage
applied to the Vadj pin. This current/voltage is calculated by using
the equations in the operating information.
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
1.5V, 16A / 24.0W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 14 V, Radj = 7.09 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5/12 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5/12
4.1
max
Unit
V
VI
Input voltage range
14
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
V
4.3
4.4
24
V
44
μF
W
PO
0
VI = 5 V, 50 % of max IO
VI = 5 V, max IO
91.5
87.9
87.5
86.1
3.3
VI = 5 V
Efficiency
η
%
VI = 12 V, 50 % of max IO
VI = 12 V, max IO
VI = 12 V
VI = 5 V, max IO
3.8
4.4
W
W
Pd
Power Dissipation
Input idling power
Input standby power
VI = 12 V, max IO
3.9
VI = 5 V, IO= 0 A
0.27
0.86
4.7
W
Pli
VI = 12 V, IO= 0 A
W
VI = 5 V (turned off with RC)
VI = 12 V (turned off with RC)
VI = 5 V, max IO
mW
mW
A
PRC
26.4
5.5
IS
fs
Static Input current
Switching frequency
VI = 12 V, max IO
2.3
A
0-100 % of max IO
270
300
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5/12 V, max IO
1.477
1.455
1.500
1.523
1.545
V
Output voltage tolerance band 10-100 % of max IO
V
V
VI = 5 V, IO = 0 A
Idling voltage
1.500
1.500
±3
VO
VI = 12 V, IO = 0 A
Line regulation
Load regulation
max IO
mV
mV
VI = 5/12 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±70
30
mV
voltage deviation
Without Turbo Trans
Load transient recovery time
μs
C October2012
s
4V, Output up to 16 A / 88 W
Co =1640 µF Type C
Load transient
VI = 12 V, Load step 25-75-25 % of
Vtr
ttr
tr
±55
30
mV
μs
voltage deviation
max IO, di/dt = 2.5 A/μs
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
3.1
7.0
3.0
ms
ms
ms
(from 10−90 % of VOi)
VI = 5 V, 100 % of max IO
Start-up time
ts
tr
(from VI connection to 90 % of VOi)
Ramp-up time
(from 10−90 % of VOi)
VI = 12 V, 100 % of max IO
Start-up time
ts
6.9
ms
(from VI connection to 90 % of
VOi)
VI shut-
Max IO
1.6
24.6
0.6
ms
ms
ms
VI = 5 V
down fall
IO = 0.1 A
Max IO
time.
tf
(From VI off
VI = 12 V
to 10 % of
IO = 0.1 A
21.4
ms
VO)
VI = 5 V , Max IO
VI = 12 V , Max IO
Max IO
7.0
6.9
ms
ms
ms
ms
ms
RC start-up time
RC shut-
0.5
VI = 5 V
down fall
Io = 0.1 A
22.4
0.5
tRC tInh
time
Max IO
(From RC off
VI = 12 V
to 10 % of
Io = 0.1 A
22.3
ms
VO)
IO
Output current
Current limit threshold
Short circuit current
0
16
A
A
A
Ilim
Isc
Tref < max Tref
Tref = 25ºC
30
30
See ripple & noise section,
max IO
VOac
Output ripple & noise VI = 5 V
10.2
13.4
mVp-p
mVp-p
Output ripple & noise VI = 12 See ripple & noise section,
max IO
VOac
V
C October2012
s
4V, Output up to 16 A / 88 W
1.5V, 16A / 24.0W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
95
[W]
5
4
3
2
1
0
90
85
4.5 V
4.5 V
5.0 V
14.0 V
12.0V
5.0 V
14.0V
12.0V
80
75
70
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
23
21
19
17
15
13
15
10
5
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0
20
40
60
80
100 [°C]
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
1.80
1.503
1.50
1.20
1.501
4.5V
4.5 V
5.0 V
5.0 V
0.90
0.60
0.30
0.00
1.499
1.497
1.495
14.0 V
12.0V
14.0 V
12.0V
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
s
4V, Output up to 16 A / 88 W
1.5V, 16A / 24.0W Typical Characteristics VI = 5 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
1.5V, 16A / 24.0W Typical Characteristics VI = 12 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 12 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 12 V.
Output Voltage Adjust (see operating information)
Passive adjust
Active adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
The output voltage may be adjusted using a current/voltage
applied to the Vadj pin. This current/voltage is calculated by using
the equations in the operating information.
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
1.8V, 16A / 28.8W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 14 V, Radj = 4.78 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5/12 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5/12
4.1
max
Unit
V
VI
Input voltage range
14
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
V
4.3
4.4
V
44
μF
W
PO
0
28.8
VI = 5 V, 50 % of max IO
VI = 5 V, max IO
92.5
89.3
88.7
87.1
3.5
VI = 5 V
Efficiency
η
%
VI = 12 V, 50 % of max IO
VI = 12 V, max IO
VI = 12 V
VI = 5 V, max IO
4.0
4.8
W
W
Pd
Power Dissipation
Input idling power
Input standby power
VI = 12 V, max IO
4.3
VI = 5 V, IO= 0 A
0.30
0.75
1.6
W
Pli
VI = 12 V, IO= 0 A
W
VI = 5 V (turned off with RC)
VI = 12 V (turned off with RC)
VI = 5 V, max IO
mW
mW
A
PRC
33.9
6.5
IS
fs
Static Input current
Switching frequency
VI = 12 V, max IO
2.8
A
0-100 % of max IO
270
300
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5/12 V, max IO
1.773
1.746
1.800
1.827
1.854
V
Output voltage tolerance band 10-100 % of max IO
V
V
VI = 5 V, IO = 0 A
Idling voltage
1.801
1.802
±3
VO
VI = 12 V, IO = 0 A
Line regulation
Load regulation
max IO
mV
mV
VI = 5/12 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±70
30
mV
voltage deviation
Without Turbo Trans
Load transient recovery time
μs
C October2012
s
4V, Output up to 16 A / 88 W
Co =1640 µF Type C
Load transient
VI = 12 V, Load step 25-75-25 % of
Vtr
ttr
tr
±60
30
mV
μs
voltage deviation
max IO, di/dt = 2.5 A/μs
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
2.9
7.0
2.8
ms
ms
ms
(from 10−90 % of VOi)
VI = 5 V, 100 % of max IO
Start-up time
ts
tr
(from VI connection to 90 % of VOi)
Ramp-up time
(from 10−90 % of VOi)
VI = 12 V, 100 % of max IO
Start-up time
ts
7.0
ms
(from VI connection to 90 % of
VOi)
VI shut-
Max IO
1.5
26.2
0.7
ms
ms
ms
VI = 5 V
down fall
IO = 0.1 A
Max IO
time.
tf
(From VI off
VI = 12 V
to 10 % of
IO = 0.1 A
29.2
ms
VO)
VI = 5 V , Max IO
VI = 12 V , Max IO
Max IO
7.0
6.9
ms
ms
ms
ms
ms
RC start-up time
RC shut-
0.6
VI = 5 V
down fall
Io = 0.1 A
26.5
0.6
tRC tInh
time
Max IO
(From RC off
VI = 12 V
to 10 % of
Io = 0.1 A
27.4
ms
VO)
IO
Output current
Current limit threshold
Short circuit current
0
16
A
A
A
Ilim
Isc
Tref < max Tref
Tref = 25ºC
30
30
See ripple & noise section,
max IO
VOac
Output ripple & noise VI = 5 V
11.3
14.8
mVp-p
mVp-p
Output ripple & noise VI = 12 See ripple & noise section,
max IO
VOac
V
C October2012
s
4V, Output up to 16 A / 88 W
1.8V, 16A / 28.8W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
95
[W]
5
4
3
2
1
0
90
85
80
75
70
4.5 V
5.0 V
14.0V
12.0V
4.5 V
5.0 V
14.0 V
12.0V
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
23
21
19
17
15
13
15
10
5
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0
20
40
60
80
100 [°C]
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
1.805
2.50
2.00
1.803
4.5V
4.5 V
1.50
1.00
0.50
0.00
5.0 V
5.0 V
1.801
1.799
1.797
14.0 V
12.0V
14.0 V
12.0V
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
s
4V, Output up to 16 A / 88 W
1.8V, 16A / 28.8W Typical Characteristics VI = 5 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
1.8V, 16A / 28.8W Typical Characteristics VI = 12 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 12 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 12 V.
Output Voltage Adjust (see operating information)
Passive adjust
Active adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
The output voltage may be adjusted using a current/voltage
applied to the Vadj pin. This current/voltage is calculated by using
the equations in the operating information.
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
2.5V, 16A / 40.0W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 14 V, Radj = 2.38 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5/12 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5/12
4.1
max
Unit
V
VI
Input voltage range
14
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
V
4.3
4.4
33
V
44
μF
W
PO
0
VI = 5 V, 50 % of max IO
VI = 5 V, max IO
94.2
91.9
90.2
89.4
3.6
VI = 5 V
Efficiency
η
%
VI = 12 V, 50 % of max IO
VI = 12 V, max IO
VI = 12 V
VI = 5 V, max IO
4.1
5.3
W
W
Pd
Power Dissipation
Input idling power
Input standby power
VI = 12 V, max IO
4.8
VI = 5 V, IO= 0 A
0.34
0.99
4.7
W
Pli
VI = 12 V, IO= 0 A
W
VI = 5 V (turned off with RC)
VI = 12 V (turned off with RC)
VI = 5 V, max IO
mW
mW
A
PRC
26.4
8.8
IS
fs
Static Input current
Switching frequency
VI = 12 V, max IO
3.8
A
0-100 % of max IO
270
300
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5/12 V, max IO
2.462
2.425
2.500
2.538
2.575
V
Output voltage tolerance band 10-100 % of max IO
V
V
VI = 5 V, IO = 0 A
Idling voltage
2.501
2.503
±3
VO
VI = 12 V, IO = 0 A
Line regulation
Load regulation
max IO
mV
mV
VI = 5/12 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±70
30
mV
voltage deviation
Without Turbo Trans
Load transient recovery time
μs
C October2012
s
4V, Output up to 16 A / 88 W
Co =1640 µF Type C
Load transient
VI = 12 V, Load step 25-75-25 % of
Vtr
ttr
tr
±65
30
mV
μs
voltage deviation
max IO, di/dt = 2.5 A/μs
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
3.2
7.1
3.1
ms
ms
ms
(from 10−90 % of VOi)
VI = 5 V, 100 % of max IO
Start-up time
ts
tr
(from VI connection to 90 % of VOi)
Ramp-up time
(from 10−90 % of VOi)
VI = 12 V, 100 % of max IO
Start-up time
ts
6.9
ms
(from VI connection to 90 % of
VOi)
VI shut-
Max IO
1.5
37.5
0.9
ms
ms
ms
VI = 5 V
down fall
IO = 0.1 A
Max IO
time.
tf
(From VI off
VI = 12 V
to 10 % of
IO = 0.1 A
41.2
ms
VO)
VI = 5 V , Max IO
VI = 12 V , Max IO
Max IO
6.7
6.8
ms
ms
ms
ms
ms
RC start-up time
RC shut-
0.8
VI = 5 V
down fall
Io = 0.1 A
38.6
0.8
tRC tInh
time
Max IO
(From RC off
VI = 12 V
to 10 % of
Io = 0.1 A
38.5
ms
VO)
IO
Output current
Current limit threshold
Short circuit current
0
16
A
A
A
Ilim
Isc
Tref < max Tref
Tref = 25ºC
30
30
See ripple & noise section,
max IO
VOac
Output ripple & noise VI = 5 V
12.9
21.6
mVp-p
mVp-p
Output ripple & noise VI = 12 See ripple & noise section,
max IO
VOac
V
C October2012
s
4V, Output up to 16 A / 88 W
2.5V, 16A / 40.0W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
100
[W]
6
95
90
5
3
2
0
4.5 V
4.5 V
5.0 V
14.0 V
12.0V
5.0 V
14.0V
12.0V
85
80
75
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
21
15
10
5
18
15
12
9
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
0
20
40
60
80
100 [°C]
Available load current vs. ambient air temperature and airflow at
VI = 5 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
2.507
3.00
2.50
2.505
4.5V
2.00
1.50
1.00
0.50
0.00
4.5 V
5.0 V
14.0 V
12.0V
5.0 V
2.503
2.501
2.499
14.0 V
12.0V
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
s
4V, Output up to 16 A / 88 W
2.5V, 16A / 40.0W Typical Characteristics VI = 5 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
2.5V, 16A / 40.0W Typical Characteristics VI = 12 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 12 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 12 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
3.3V, 16A / 52.8W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 4.5 to 14 V, Radj = 1.21 kΩ, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 5/12 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
4.5
typ
5/12
4.1
max
Unit
V
VI
Input voltage range
14
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
3.9
V
4.3
4.4
V
44
μF
W
PO
0
52.8
VI = 5 V, 50 % of max IO
VI = 5 V, max IO
95.8
94.0
91.3
90.8
3.4
VI = 5 V
Efficiency
η
%
VI = 12 V, 50 % of max IO
VI = 12 V, max IO
VI = 12 V
VI = 5 V, max IO
3.9
5.9
W
W
Pd
Power Dissipation
Input idling power
Input standby power
VI = 12 V, max IO
5.4
VI = 5 V, IO= 0 A
0.31
1.31
1.6
W
Pli
VI = 12 V, IO= 0 A
W
VI = 5 V (turned off with RC)
VI = 12 V (turned off with RC)
VI = 5 V, max IO
mW
mW
A
PRC
26.4
11.3
4.9
IS
fs
Static Input current
Switching frequency
VI = 12 V, max IO
A
0-100 % of max IO
270
300
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 5/12 V, max IO
3.250
3.201
3.300
3.350
3.399
V
Output voltage tolerance band 10-100 % of max IO
V
V
VI = 5 V, IO = 0 A
Idling voltage
3.304
3.306
±3
VO
VI = 12 V, IO = 0 A
Line regulation
Load regulation
max IO
mV
mV
VI = 5/12 V, 0-100 % of max IO
±2
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
±75
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 5 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±40
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Vtr
ttr
±80
30
mV
voltage deviation
Without Turbo Trans
Load transient recovery time
μs
C October2012
s
4V, Output up to 16 A / 88 W
Co =1640 µF Type C
Load transient
VI = 12 V, Load step 25-75-25 % of
Vtr
ttr
tr
±75
30
mV
μs
voltage deviation
max IO, di/dt = 2.5 A/μs
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
3.3
7.0
3.3
ms
ms
ms
(from 10−90 % of VOi)
VI = 5 V, 100 % of max IO
Start-up time
ts
tr
(from VI connection to 90 % of VOi)
Ramp-up time
(from 10−90 % of VOi)
VI = 12 V, 100 % of max IO
Start-up time
ts
6.9
ms
(from VI connection to 90 % of
VOi)
VI shut-
Max IO
1.2
50.2
1.2
ms
ms
ms
VI = 5 V
down fall
IO = 0.1 A
Max IO
time.
tf
(From VI off
VI = 12 V
to 10 % of
IO = 0.1 A
50.5
ms
VO)
VI = 5 V , Max IO
VI = 12 V , Max IO
Max IO
6.9
6.8
ms
ms
ms
ms
ms
RC start-up time
RC shut-
1.4
VI = 5 V
down fall
Io = 0.1 A
51.6
1.1
tRC tInh
time
Max IO
(From RC off
VI = 12 V
to 10 % of
Io = 0.1 A
53.9
ms
VO)
IO
Output current
Current limit threshold
Short circuit current
0
16
A
A
A
Ilim
Isc
Tref < max Tref
Tref = 25ºC
30
30
See ripple & noise section,
max IO
VOac
Output ripple & noise VI = 5 V
11.3
28.1
mVp-p
mVp-p
Output ripple & noise VI = 12 See ripple & noise section,
max IO
VOac
V
C October2012
s
4V, Output up to 16 A / 88 W
3.3V, 16A / 52.8W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
100
[W]
8
95
90
85
80
75
6
4
2
0
4.5 V
5.0 V
14.0V
12.0V
4.5 V
5.0 V
14.0 V
12.0V
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
21
15
10
5
18
15
12
9
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
0
20
40
60
80
100 [°C]
Available load current vs. ambient air temperature and airflow at
VI = 5 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
4.00
3.311
3.20
3.309
4.5V
4.5 V
2.40
1.60
0.80
0.00
3.307
3.305
3.303
3.301
5.0 V
5.0 V
14.0 V
12.0V
14.0 V
12.0V
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
s
4V, Output up to 16 A / 88 W
3.3V, 16A / 52.8W Typical Characteristics VI = 5 V
Start-up
PMP 5818UW P
Shut-down
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/d iv.).
Bottom trace: input voltage (5 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 5 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (5 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 5 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 5 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
3.3V, 16A / 52.8W Typical Characteristics VI = 12 V
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 12 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 12 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
C October2012
s
4V, Output up to 16 A / 88 W
5.0V, 16A / 80.0W Electrical Specification
PMP 5818UW P
Tref = -40 to +85ºC, VI = 7 to 14 V, Radj = 171 Ω, unless otherwise specified under Conditions.
Typical values given at: Tref = +25°C, VI= 12 V, max IO , unless otherwise specified under Conditions.
Additional Cin = 330+22 µF and Cout = 220 µF. See Operating Information section for selection of capacitor types.
Connect the sense pin, where available, to the output pin.
Characteristics
Conditions
min
7
typ
12
max
Unit
V
VI
Input voltage range
14
VIoff
VIon
CI
Turn-off input voltage
Turn-on input voltage
Internal input capacitance
Output power
Decreasing input voltage
Increasing input voltage
4.5
4.7
4.8
44
V
5.0
80
V
μF
W
PO
0
50 % of max IO
max IO
92.8
92.6
6.5
η
Efficiency
%
Pd
Pli
PRC
IS
Power Dissipation
Input idling power
Input standby power
Static Input current
Switching frequency
max IO
7.0
W
W
IO= 0 A, VI = 12 V
VI = 12 V (turned off with RC)
VI = 12 V, max IO
0-100 % of max IO
1.8
33.9
7.3
mW
A
fs
270
300
330
kHz
Output voltage initial setting
and accuracy
VOi
Tref = +25°C, VI = 12 V, max IO
4.925
4.850
5.000
5.075
5.150
V
Output voltage tolerance band 10-100 % of max IO
V
Idling voltage
Line regulation
Load regulation
IO = 0 A
5.004
±3
V
VO
max IO
mV
mV
VI = 12 V, 0-100 % of max IO
±2
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
Without Turbo Trans
Vtr
ttr
Vtr
ttr
tr
±80
40
mV
μs
voltage deviation
Load transient recovery time
Co =1640 µF Type C
Load transient
VI = 12 V, Load step 25-75-25 % of
max IO, di/dt = 2.5 A/μs
±70
30
mV
μs
voltage deviation
With Turbo Trans
Load transient recovery time
Co =1640 µF Type C; RTT =2 kΩ
Ramp-up time
(from 10−90 % of VOi)
3.0
7.0
ms
ms
100 % of max IO
Start-up time
(from VI connection to 90 % of VOi)
ts
Max IO
1.6
78.3
7.0
ms
ms
ms
ms
ms
A
VI shut-down fall time.
tf
(From VI off to 10 % of VO)
IO = 0.1 A
Max IO
RC start-up time
tRC tInh
Max IO
0.7
RC shut-down fall time
(From RC off to 10 % of VO)
Io = 0.1 A
81.2
IO
Output current
0
16
C October2012
s
4V, Output up to 16 A / 88 W
Ilim
Isc
Current limit threshold
Short circuit current
Tref < max Tref
Tref = 25ºC
29
29
A
A
See ripple & noise section,
max IO
VOac
Output ripple & noise
40.2
mVp-p
C October2012
s
4V, Output up to 16 A / 88 W
5.0V, 16A / 80.0W Typical Characteristics
Efficiency
PMP 5818UW P
Power Dissipation
[%]
100
[W]
10
8
6
4
2
0
95
90
7.0 V
7.0 V
12 V
14 V
85
80
75
12 V
14V
0
4
8
12
16 [A]
0
4
8
12
16 [A]
Efficiency vs. load current and input voltage at Tref = +25°C
Dissipated power vs. load current and input voltage at
Tref = +25°C
Output Current Derating
Thermal Resistance
[A]
20
[°C/W]
17
15
10
5
15
13
11
9
2.0 m/s
1.0 m/s
0.5 m/s
Nat. Conv.
0
0
20
40
60
80
100 [°C]
0.0
0.4
0.8
1.2
1.6
2.0[m/s]
Available load current vs. ambient air temperature and airflow at
VI = 12 V. See Thermal Consideration section.
Thermal resistance vs. airspeed measured at the converter.
Tested in wind tunnel with airflow and test conditions as per
the Thermal consideration section.
Output Characteristics
Current Limit Characteristics
[V]
[V]
5.011
6.00
5.00
4.00
5.009
7.0 V
5.007
5.005
5.003
5.001
7.0 V
12 V
14 V
3.00
2.00
1.00
0.00
12 V
14 V
0
4
8
12
16 [A]
20
24
28
32
36
40 [A]
Output voltage vs. load current at Tref = +25°C
Output voltage vs. load current at IO > max IO , Tref = +25°C
C October2012
s
4V, Output up to 16 A / 88 W
5.0V, 16A / 80.0W Typical Characteristics
PMP 5818UW P
Start-up enabled by connecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Shut-down enabled by disconnecting VI at:
Tref = +25°C, VI = 12 V,
Top trace: output voltage (1 V/div.).
Bottom trace: input voltage (10 V/div.).
Output Ripple & Noise
Output Load Transient Response
With Turbo Trans
Without Turbo Trans
Output voltage ripple at:
Tref = +25°C, VI = 12 V,
IO = 16 A resistive load.
Trace: output voltage (10 mV/div.).
Time scale: (2 µs/div.).
Output voltage response to load current
step-change (4-12-4 A) at:
Top trace: output voltage (100 mV/div.).
Middle trace: output voltage (100 mV/div.).
Bottom trace: load current (10 A/div.).
Tref =+25°C, VI = 12 V.
Output Voltage Adjust (see operating information)
Passive adjust
The resistor value for an adjusted output voltage is calculated by
using the equations in the operating information.
0.69
RSET =10kΩ×
−1.43kΩ
Vo − 0.69
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42
Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
Output ripple and noise
EMC Specification
Output ripple and noise measured according to figure below.
See Design Note 022 for detailed information.
Conducted EMI measured according to test set-up.
The fundamental switching frequency is 300 kHz for
PMP 5818UW P @ VI = 5/12 V, max IO.
Conducted EMI Input terminal value (typ)
TBD
Output ripple and noise test setup
Operating information
Extended information for POLA products is found in
Application Note 205.
EMI without filter
Input Voltage
The input voltage range 4.5 to 14 Vdc makes the product
easy to use in intermediate bus applications when powered
by a regulated bus converter.
Turn-off Input Voltage
TBD
The DC/DC regulators monitor the input voltage and will turn
on and turn off at predetermined levels.
The minimum hysteresis between turn on and turn off input
voltage is 0.1V.
Remote Control (RC) Inhibit
The products are fitted with a
remote control function referenced
to positive logic. The RC function
allows the regulator to be turned
on/off by an external device like a
semiconductor or mechanical
switch. The RC pin has an internal
pull up resistor to + In.
Test set-up
Layout recommendation
The radiated EMI performance of the DC/DC regulator will
depend on the PCB layout and ground layer design.
It is also important to consider the stand-off of the DC/DC
regulator.
If a ground layer is used, it should be connected to the output
of the DC/DC regulator and the equipment ground or chassis.
The maximum required sink current is 1 mA. When the RC pin
is left open, the voltage generated on the RC pin is
4.5 — 14 V. The regulator will turn on when the input voltage is
applied with the RC pin open. Turn off is achieved by
connecting the RC pin to the - In. To ensure safe turn off the
voltage difference between RC pin and the - In pin shall be
less than 1V. The regulator will restart automatically when this
connection is opened.
A ground layer will increase the stray capacitance in the PCB
and improve the high frequency EMC performance.
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Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
across the input of the regulator will ensure stable operation.
The capacitor is not required when powering the DC/DC
regulator from an input source with an inductance below
10 μH.
External Capacitors
Input capacitors:
The PMP 5818UW P requires a combination of one 22 μF
X5R/X7R ceramic and 330 μF electrolytic type. The ripple
current rating of the electrolytic capacitor must be at least
950 mA rms. The ripple current rating must increase to 1500
mA rms when Vo > 2.1V and Io ≥11A.
If using the ceramic capacitor as the input capacitor, the PMP
5818UW P needs a minimum input capacitance of 300 μF. In
addition, output capacitor also need ceramic capacitor, PMP
5818UW P needs a minimum output capacitance of 300 μF.
External Decoupling Capacitors
When powering loads with significant dynamic current
requirements, the voltage regulation at the point of load can
be improved by addition of decoupling capacitors at the load.
The most effective technique is to locate low ESR ceramic
and electrolytic capacitors as close to the load as possible,
using several parallel capacitors to lower the effective ESR.
The ceramic capacitors will handle high-frequency dynamic
load changes while the electrolytic capacitors are used to
handle low frequency dynamic load changes. Ceramic
capacitors will also reduce any high frequency noise at the
load.
For high-performance/transient application, or wherever the
input source performance is degraded, 680 μF of input
capacitance is recommended. The additional input
capacitance above the minimum level insures an optimized
performance.
It is equally important to use low resistance and low
inductance PCB layouts and cabling.
Output capacitors:
The PMP 5818UW P requires a minimum output capacitance
of 220 μF of aluminium, polymer-aluminum, tantalum, or
polymer-tantalum type.
External decoupling capacitors will become part of the
control loop of the DC/DC regulator and may affect the
stability margins. As a “rule of thumb”, 100 μF/A of output
current can be added without any additional analysis. The
ESR of the capacitors is a very important parameter. Power
Modules guarantee stable operation with a verified ESR value
of >10 mΩ across the output connections.
The required capacitance above the minimum will be
determined by actual transient deviation requirements.
When using one or more non-ceramic capacitors, the
calculated equivalent ESR should be no lower than 4 mΩ
(7mΩ using the manufacturer’s maximum ESR for a single
capacitor).
For further information please contact your local Ericsson
Power Modules representative.
Output Voltage Adjust (Vadj
)
Turbo TransTM allows the designer to optimize the
capacitance load according to the system transient design
requirement. High quality, ultra-low ESR capacitors are
required to maximize Turbo TransTM effectiveness. Capacitors
with a capacitance (μF)×ESR (mΩ) ≤ 10,000 mΩ × μF are
required.
The DC/DC regulators have an Output Voltage Adjust pin
(Vadj). This pin can be used to adjust the output voltage above
or below Output voltage initial setting.
To increase or decrease the voltage, the resistor should be
connected between the Vadj pin and GND pin. The resistor
value of the output voltage adjust function is according to
information given under the output section for the respective
product.
Required Capacitor with Turbo Trans. See the Turbo TransTM
Application information for Capacitor Selection.
Capacitor Type Group by ESR (Equivalent Series Resistance)
Type A = (100<capacitance×ESR≤1,000)
Type B = (1,000<capacitance×ESR≤5,000)
Type C = (5,000<capacitance×ESR≤10,000)
Input And Output Impedance
P M P 5 8 1 8 U W
P
The impedance of both the input source and the load will
interact with the impedance of the DC/DC regulator. It is
important that the input source has low characteristic
impedance. The regulators are designed for stable operation
without external capacitors connected to the input or output.
The performance in some applications can be enhanced by
addition of external capacitance as described under External
Decoupling Capacitors. If the input voltage source contains
significant inductance, the addition of a 100 μF capacitor
Parallel Operation
Two regulators may be paralleled for redundancy if the total
power is equal or less than PO max. It is not recommended to
parallel the regulators without using external current sharing
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Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
circuits.
The UVLO characteristic is defined by the ON threshold (VTHD
voltage. Below the ON threshold, the Inhibit control is
overridden, and the moudule does not produce an output.
The hysterisis voltage, which is the difference between the
ON and OFF threshold voltage, is set at 500 mV. The
hysteresis prevents start up oscillations, which can occur if
the input voltage drops slightly when the modules begins to
draw current from the input source.
)
Remote Sense
The DC/DC regulators have remote sense that can be used to
compensate for voltage drops between the output and the
point of load. The sense traces should be located close to the
PCB ground layer to reduce noise susceptibility. The remote
sense circuitry will compensate for up to 10% voltage drop
between output pins and the point of load.
The UVLO feature of the PMP 5818UW P module allows for
limited adjustment of the ON threshold voltage. The
If the remote sense is not needed +Sense should be
connected to +Out and -Sense should be connected to -Out.
adjustment is made via the Inhibit/UVLO Prog control pin (Pin
11) using a single resistor (see figure below). When pin 11 is
left open, the ON threshold voltage is intermally set to its
default value, which is 4.3 volts. The ON threshold might need
to be raised if the module is powered from a tightly regulated
12 V bus. Adjusting the threshold voltage prevents the
module from operating if the input bus fails to completely rise
to its specified regulation voltage.
Over Temperature Protection (OTP)
The regulators are protected from thermal overload by an
internal over temperature shutdown circuit.
When Tref as defined in thermal consideration section
exceeds the OTP threshold, the regulator will shut down. The
DC/DC regulator will make continuous attempts to start up
(non-latching mode) and resume normal operation
automatically when the temperature has dropped >10°C
below the temperature threshold.
The below equation determines the value of RUVLO required
to adjust VTHD to a new value. The default value is 4.3 V and it
may only be adjusted to a higher value.
Over Current Protection (OCP)
9690 − (137 × V THD
137 × V THD − 585
)
The regulators include current limiting circuitry for protection
at continuous overload.
The output voltage will decrease towards zero for output
currents in excess of max output current (max IO). The
regulator will resume normal operation after removal of the
overload. The load distribution should be designed for the
maximum output short circuit current specified.
R UVLO
=
(kΩ )
Soft-start Power Up
The above table lists the standard resistor values for RUVLO for
different values of the ON threshold (VTHD) voltage.
The figure of UVLO Program Resistor Placement is as follow.
From the moment a valid input voltage is applied, the soft-
start control introduces a short time-delay (typically 5-10 ms)
before allowing the output voltage to rise.
The initial rise in input current when the input voltage first
starts to rise is the charge current drawn by the input
capacitors. Power-up is complete within 15 ms.
P M P 5 8 1 8 U W
P
Auto Track™ Function
Auto TrackTM was designed to simplify the amount of circuitry
required to make the output voltage from each module
power up and power down in sequence. The sequencing of
two or more supply voltages during power up is a common
requirement for complex mixed-signal applications, that use
dual-voltage VLSI ICs such as DSPs, micro-processors and
ASICs.
Turbo TransTM Technology
Adjustable Undervoltage Lockout
Turbo TransTM optimizes the transient response of the
regulator with added external capacitance using a single
external resistor. The benefits of this technology include:
reduced output capacitance, minimized output voltage
deviation following a load transient, and enhanced stability
when using ultra-low ESR output capacitors. The amout of
output capacitance required to meet a target output voltage
deviation, is reduded with Turbo TransTM activated. Likewise,
The regualtors incorporate an input undervoltage lockout
(UVLO). The UVLO feature prevents the operation of the
module until there is a sufficient input voltage to produce a
valid output voltage. This enables the module to provide a
clean, monotonic powerup for the load circuit and also limit
the magnitude of current drawn from regulator’s input source
during the power-up sequence.
E
45
Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
for a given amout of output capacitance, with Turbo Trans
engaged, the amplitude of the voltage deviation following a
load transient is reduced. Applications requiring tight
transient voltage tolerances and minimized capacitor footprint
area benefit from this technology.
Utilizing Turbo TransTM requires connecting a resistor, RTT
,
between the +Sense pin (pin 6) and the Turbo Trans pin (pin
9), The value of the resistor directly corresponds to the
amount of output capacitance required. For the PMP
5818UW P, the minimum required capacitance is 2200 μF.
When using Turbo TransTM, capacitors with a
capacitance×ESR product below 10,000 μF×mΩ are required.
To see the benefit of Turbo TransTM, follow the 5mV/A
marking across to the “Without Turbo TransTM” plot. Following
that point down shows that more than 4,500 μF of output
capacitance is required to meet the same transient deviation
RTT Resistor Selection
The Turbo TransTM resistor value, RTT can be determined from
the Turbo TransTM programming equation, see the equation
below.
limit. This is the benefit of Turbo TransTM
.
A typical Turbo TransTM application schematic is also shown.
C
o
1 − (
)
1500
R TT = 40 ×
( k Ω )
C
o
5 × (
) − 1
1500
Where Co is the total output capacitance in μF. Co values
greater than or equal to 1500 μF require RTT to be a short,
0Ω. To ensure stability, a minimum amount of output capacitance is
required for a given RTT resistor value.The value of RTT must be
calculated using the minimum required output capacitance.
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46
Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
RTT Resistor Selection
The Turbo TransTM resistor value, RTT can be determined from
the Turbo TransTM programming equation, see the equation
below.
C
o
1 − (
)
1100
R TT = 40
×
( k Ω )
C
o
5 × (
) − 1
1100
Where Co is the total output capacitance in μF. Co values
greater than or equal to 1100 μF require RTT to be a short,
0Ω.To ensure stability, a minimum amount of output capacitance is
required for a given RTT resistor value.The value of RTT must be
calculated using the minimum required output capacitance.
RTT Resistor Selection
The Turbo Trans resistor value, RTT can be determined from
the Turbo TransTM programming equation, see the equation
below.
C
o
1 − (
)
1980
R
= 40 ×
( k Ω )
TT
5 × C + 880
o
(
) − 1
1980
Where Co is the total output capacitance in μF. Co values
greater than or equal to 1980 μF require RTT to be a short,
0Ω.To ensure stability, a minimum amount of output capacitance is
required for a given RTT resistor value.The value of RTT must be
calculated using the minimum required output capacitance.
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Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
output voltage and swiching frequency. Operationally, the
maximum input voltage is inversely proportional to switching
frequency. Synchronizing to a higher frequency causes
greater restrictions on the input voltage range. For a given
switching frequency, the below figure shows how the
maximum input voltage varies with output voltage.
PMP 5818UW P
For example, for a module operating at 400 KHz and an
output voltage of 1.2 V, the maximum input voltage is 10 V.
Exceeding the maximum input voltage may cause in an
increase in output ripple voltage and increased output voltage
variation.
As shown in the below figure, input voltage below 6 V can
operate down to the minimum output voltage over the entire
synchronization frequency range.
Smart Sync
Smart Sync is a feature that allows multiple power modules to
be synchronized to a common frequency. Driving the Smart
Sync pins with an external oscillator set to the desired
frequency, synchronizes all connected modules to the
selected frequency. The synchronization frequency can be
higher or lower than the nominal swithing frequency of the
modules within the range of 240 KHz to 400 KHz.
Synchroizing modules powered from the same bus eliminates
beat frequencies reflected back to the input supply, and also
reduces EMI filtering requirements. Eliminating the slow beat
frequencies (usually < 10 KHz) allows the EMI filter to be
designed to attenuate only the synchronization frequency.
Power modules can also be synchronized out of phase to
minimize ripple current and reduce input capacitance
requirements. The below figure shows a standard circuit with
two modules syncronized 180◦ out of phase using a D flip-
flop.
PMP 5818UW P
PMP 5818UW P
The maximum input voltage allowed for proper
synchronization is duty cycle limited. When using Smart Sync,
the maximum allowable input voltage varies as a function of
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Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
Thermal Consideration
General
The regulators are designed to operate in different thermal
environments and sufficient cooling must be provided to
ensure reliable operation.
Cooling is achieved mainly by conduction, from the pins to
the host board, and convection, which is dependant on the
airflow across the regulator. Increased airflow enhances the
cooling of the regulator.
The Output Current Derating graph found in the Output
section for each model provides the available output current
vs. ambient air temperature and air velocity at Vin = 5/12 V.
The DC/DC regulator is tested on a 10.2 x 10.2 mm,
35 μm (1 oz), 4-layer test board mounted vertically in a wind
tunnel with a cross-section of 305 x 305 mm.
Proper cooling of the DC/DC regulator can be verified by
measuring the temperature at positions P1, P2 and P3. The
temperature at these positions should not exceed the max
values provided in the table below.
Note that the max value is the absolute maximum rating
(non destruction) and that the electrical Output data is
guaranteed up to ambient temperature +85°C.
See Design Note 019 for further information.
Position
P1
Device
Pcb
Designation
max value
130º C
P2
P3
Mosfet
130º C
130º C
Inductor
Tref
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Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
Thermal Consideration continued
Connections
Definition of reference temperature (Tref
)
The reference temperature is used to monitor the temperature
limits of the product. Temperatures above maximum Tref are
not allowed and may cause degradation or permanent
damage to the product. Tref is also used to define the
temperature range for normal operating conditions.
Tref is defined by the design and used to guarantee safety
margins, proper operation and high reliability of the module.
Ambient Temperature Calculation
By using the thermal resistance the maximum allowed
ambient temperature can be calculated.
1. The power loss is calculated by using the formula
((1/η) - 1) × output power = power losses (Pd).
η = efficiency of regulator. E.g 89.5 % = 0.895
Pin Designation Function
1
SmartSync This input pin sychronizes the switching
frequency of the module to external clock
frequency. The SmartSync feature can be
used to sychronize the switching
2. Find the thermal resistance (Rth) in the Thermal Resistance
graph found in the Output section for each model.
Calculate the temperature increase (ΔT).
ΔT = Rth x Pd
frequency of multipe PMP 5818UW P
modules, aiding EMI noise suppression
efforts. If unused, this pin should be
connected to GND (PIN 3). For more
information, please review the Application
Information section.
3. Max allowed ambient temperature is:
Max Tref - ΔT.
E.g PMP 5818UW P at 0m/s:
1
2
3
VI
The positive input voltage power node to
the module, which is referenced to
common GND.
1. ((
) - 1) × 80 W = 6.39 W
0.926
2. 6.39 W × 15.8°C/W = 101.0°C
GND
This is the common ground connection
for the VI and Vo power connections. It is
also the 0 Vdc reference for the control
inputs.
3. 130 °C — 101.0°C = max ambient temperature is 29.0°C
The actual temperature will be dependent on several factors
such as the PCB size, number of layers and direction of
airflow.
4
GND
This is the common ground connection
for the VI and Vo power connections. It is
also the 0 Vdc reference for the control
inputs.
5
6
Vo
The regulated positive power output with
respect to the GND.
+Sense
The sense input allows the regulation
circuit to compensate for voltage drop
between the module and the load. The
+Sense pin should always be connected
to Vo , either at the load for optimal
voltage accuracy, or at the module (pin 5).
E
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Technical Specification
EN/LZT 146 388 R1C October 2012
PMP 5000 series PoL Regulator
Input 4.5 - 14 V, Output up to 16 A / 88 W
© Ericsson AB
7
-Sense
The sense input allows the regulation
circuit to compensate for voltage drop
between the module and the load. For
optimal voltage accuracy, -Sense must
be connectted to GND(pin 4) , very close
to the module (within 10 cm).
11 Inhibit/
The Inhibit pin is an open-collector/drain,
UVLO Adjust negative logic input that is referenced to
GND. Applying a low level ground signal
to this input disables the module’s output
voltage. If the Inhibit pin is left open-
circuit, the module produces an output
whenever a valid input source is applied.
This input is not compatible with TTL
logic devices and should not be tied VI or
other voltage.
8
Vo Adjust
A 0.05 W 1% resistor must be directly
connected between this pin and pin 7 (-
Sense) to set the output voltage to a
value higher than 0.69 V. The
This pin is also used for input
undervoltage lockout (UVLO)
temperature stability of the resistor
should be 100 ppm/℃ (or better). The
setpoint range for the output voltage is
from 0.69V to 5.5 V. If left open circuit,
the output voltage defaults to its lowest
value. For further information, on output
voltage adjustment see the related
application note. The specification table
gives the preferred resistor values for a
number of standard output voltages..
programming. Connecting a resistor from
this pin to GND (Pin 3) allows the ON
threshold of the UVLO to be adjusted
higher than the default value.
9
Turbo Trans This input pin adjusts the transient
response of the regulator. To activate the
Turbo TransTM feature, a 1%, 50mW
resistor must be connected between this
pin and pin 6 (+Sense) very close to the
module. For a given value of output
capacitance, a reduction in peak output
voltage deviation is achieved by using
this feature. If unused, this pin must be
left open-circuit. External capacitance
must never be connected to this pin
unless the Turbo TransTM resistor value is
a short, 0Ω.
10 Track
This is an analog control input that
enables the output voltage to follow an
external voltage. This pin becomes active
typically 20 ms after the input voltage has
been applied, and allows direct control of
the output voltage from 0 V up to the
nominal set-point voltage. Within the
control voltage is raised above this range,
the module regulates at its set-point
voltage. The features allows the output
voltage to rise simultaneously with other
modules powered from the same input
bus. If unused, this input should be
connected to VI .
NOTE: Due to the undervoltage lockout
feature, the output of the module cannot
follow its own input voltage during power
up. For more information, see the related
application note.
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44 V, Output up to 16 A / 88 W
Mechanical Information (Surface mount version)
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Mechanical Information (Through hole mount version)
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+221°C for Sn/Ag/Cu solder alloys) for more than 30
Soldering Information - Surface Mounting
The surface mount version of the product is intended for
convection or vapor phase reflow SnPb or Pb-free
processes. To achieve a good and reliable soldering result,
make sure to follow the recommendations from the solder
paste supplier, to use state-of-the-art reflow equipment and
reflow profiling techniques as well as the following
guidelines.
seconds, and a peak temperature of +235°C on all solder
joints is recommended to ensure a reliable solder joint.
A no-clean flux is recommended to avoid entrapment of
cleaning fluids in cavities inside the product or between the
product and the host board. The cleaning residues may
affect long time reliability and isolation voltage.
Peak Product Temperature Requirements
Pin 1 is chosen as reference location for the maximum
(peak) allowed product temperature (TP) since this will likely
be the warmest part of the product during the reflow
process.
Minimum Pin Temperature Recommendations
Pin number 8 is chosen as reference location for the
minimum pin temperature recommendations since this will
likely be the coolest solder joint during the reflow process.
To avoid damage or performance degradation of the
product, the reflow profile should be optimized to avoid
excessive heating. A sufficiently extended preheat time is
recommended to ensure an even temperature across the
host PCB, for both small and large devices. To reduce the
risk of excessive heating is also recommended to reduce the
time in the reflow zone as much as possible.
Pin 8 for measurement of minimum
solder joint temperature, TPIN
SnPb solder processes
For SnPb solder processes, the product is qualified for MSL
1 according to IPC/JEDEC standard J-STD-020C.
Pin 1 for measurement of maximum
peak product reflow temperature, TP
SnPb solder processes
During reflow, TP must not exceed +225°C at any time.
For SnPb solder processes, a pin temperature (TPIN) in
excess of the solder melting temperature, (TL, +183°C for
Sn63/Pb37) for more than 30 seconds, and a peak
temperature of +210°C is recommended to ensure a reliable
solder joint.
Lead-free (Pb-free) solder processes
For Pb-free solder processes, the product is qualified for
MSL 3 according to IPC/JEDEC standard J-STD-020C.
During reflow, TP must not exceed +260°C at any time.
Lead-free (Pb-free) solder processes
For Pb-free solder processes, a pin temperature (TPIN) in
excess of the solder melting temperature (TL, +217 to
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44 V, Output up to 16 A / 88 W
Temperature
Ramp-up
TP
Ramp-down
(cooling)
TL
Reflow
Preheat
Time 25 °C to peak
25 °C
Time
Reflow process specifications
Average ramp-up rate
Sn/Pb eutectic
3 °C/s max
+183°C
Pb-free
3 °C/s max
+221°C
Solder melting
TL
temperature (typical)
Minimum time above TL
30 s
30 s
Minimum pin
temperature
TPIN +210°C
+235°C
Peak product
temperature
TP
+225°C
+260°C
Average ramp-down rate
Time 25 °C to peak
6°C/s max
6°C/s max
6 minutes max
8 minutes max
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44 V, Output up to 16 A / 88 W
Soldering Information – Through Hole Mounting
The through hole mount version of the product is intended
for manual or wave soldering. When wave soldering is used,
the temperature on the pins is specified to maximum 270 °C
for maximum 10 seconds.
A maximum preheat rate of 4°C/s and a temperature of max
of +150°C is suggested. When soldering by hand, care
should be taken to avoid direct contact between the hot
soldering iron tip and the pins for more than a few seconds
in order to prevent overheating.
Carrier Tape Specifications
A no-clean flux is recommended to avoid entrapment of
cleaning fluids in cavities inside the product or between the
product and the host board. The cleaning residues may
affect long time reliability and isolation voltage.
Material
Antistatic PS
Surface resistance
Bakability
107 < Ohm/square < 1012
The tape is not bakable.
44 mm [1.732 inch]
32 mm [1.260 inch]
9.09 mm [0.358 inch]
381 mm [15 inch]
Tape width
Pocket pitch
Pocket depth
Reel diameter
Reel capacity
Delivery Package Information
The TH version products are delivered in antistatic trays.
The SMD version products are delivered in antistatic trays
and antistatic carrier tape (EIA 481 standard).
200 products /reel
Non-Dry Pack Information
Tray Specifications
The through hole mount version of product is delivered in
non-dry packing trays.
Material
Antistatic PET
Surface resistance
Tray capacity
Tray thickness
Box capacity
Bakability
106 < Ohm/square < 1012
42 products/tray
The lead (Pb) surface mount version of product is delivered
in non-dry packing trays or tape & reel.
13 mm [0.512 inch]
Dry Pack Information
210 products ( 5 full trays/box)
The tray is not bakable.
The lead free (Pb-free) surface mount version of the product
is delivered in trays or tape & reel. These inner shipment
containers are dry packed in standard moisture barrier bags
according to IPC/JEDEC standard J-STD-033 (Handling,
packing, shipping and use of moisture/reflow sensitivity
surface mount devices).
Using products in high temperature Pb-free soldering
processes requires dry pack storage and handling. In case
the products have been stored in an uncontrolled
environment and no longer can be considered dry, the
modules must be baked according to J-STD-033.
56
C October2012
eoL
44 V, Output up to 16 A / 88 W
Product Qualification Specification
Characteristics
External visual inspection
IPC-A-610
Change of temperature
(Temperature cycling)
IEC 60068-2-14 Na
Temperature range
Number of cycles
Dwell/transfer time
-40 to +100 °C
1000
15 min/0-1 min
Cold (in operation)
Damp heat
IEC 60068-2-1 Ad
IEC 60068-2-67 Cy
Temperature TA
Duration
-45°C
72 h
Temperature
Humidity
+85 °C
85 % RH
1000 hours
Duration
Dry heat
IEC 60068-2-2 Bd
Temperature
Duration
+125 °C
1000 h
Immersion in cleaning solvents
Mechanical shock
IEC 60068-2-45 XA
Method 2
Water
+55° C
+35° C
Glycol ether
IEC 60068-2-27 Ea
Peak acceleration
Duration
100 g
6 ms
1
Moisture reflow sensitivity
J-STD-020C
level 1 (SnPb-eutectic)
level 3 (Pb Free)
225° C
260° C
Operational life test
MIL-STD-202G method 108A
Duration
1000 h
2
Resistance to soldering heat
IEC 60068-2-20 Tb
Method 1A
Solder temperature
Duration
270° C
10-13 s
Robustness of terminations
Solderability
IEC 60068-2-21 Test Ua1
IEC 60068-2-21 Test Ue1
Through hole mount products
Surface mount products
All leads
All leads
1
IEC 60068-2-58 test Td
Preconditioning
150 °C dry bake 16 h
215° C
Temperature, SnPb Eutectic
Temperature, Pb-free
235° C
2
IEC 60068-2-20 test Ta
Preconditioning
Steam ageing
235 ° C
Temperature, SnPb Eutectic
Temperature, Pb-free
245 ° C
Vibration, broad band random
IEC 60068-2-64 Fh, method 1
Frequency
10 to 500 Hz
0.07 g2/Hz
Spectral density
Duration
10 min in each perpendicular
direction
Note 1: Only for products intended for reflow soldering (surface mount products)
Note 2: Only for products intended for wave soldering (plated through hole products)
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