10/100 [ETC]

10/100 Ethernet Protection with SRV05-4 (142k) ; 10/100以太网保护与SRV05-4 ( 142k )\n
10/100
型号: 10/100
厂家: ETC    ETC
描述:

10/100 Ethernet Protection with SRV05-4 (142k)
10/100以太网保护与SRV05-4 ( 142k )\n

以太网 局域网(LAN)标准
文件: 总3页 (文件大小:143K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SI01-17  
Surging Ideas  
TVS Diode Application Note  
PROTECTION PRODUCTS  
10/100 ETHERNET PROTECTION  
the Ethernet chip. The challenge is to find a TVS  
(transient voltage suppressor) that will clamp low  
enough as to prevent latch-up or damage to the  
Ethernet IC. Also, the protection device must add  
minimal loading capacitance as high parasitic capaci-  
tance can cause significant degradation to the  
100Mbps signal.  
10/100 Ethernet ICs are vulnerable to damage from  
electrostatic discharge (ESD). The fatal discharge may  
originate from a charged cable or a “human body”.  
Furthermore, devices used in telecommunications  
equipment may be exposed to lightning induced tran-  
sients. This application note illustrates a protection  
circuit suitable for use in 10/100 Ethernet applica-  
tions.  
Semtech’s SRV05-4 meets all these criteria. The  
circuit diagram of SRV05-4 is shown in Figure 1. It is  
in a SOT-23 6L package and may be used to protect  
two high-speed line pairs. The SRV05-4 combines  
performance with proprietary process technology to  
produce a low clamping voltage and capacitance  
(typically 3pF line-to-ground and 1pF line-to-line) device  
at an operating voltage of 5V. The 8kV contact ESD  
response of the SRV05-4 can be seen in Figure 2.  
Figure 3 shows the capacitance verse reverse voltage  
curve. A plot of the SRV05-4 insertion loss from 3kHz  
to 3GHz is shown in Figure 4. An eye pattern of the  
SRV05-4 operating at 125MHz is shown in Figure 5 in  
a line-to-ground configuration and in Figure 6 in a line-  
to-line configuration. Figure 2 through 6 shows that  
the SRV05-4 will maintain the Ethernet signal integrity  
without attenuation. It also offers superior protection  
to meet IEC 61000-4-2 level 4 (ESD – 15kV air and  
8kV contact), IEC 61000-4-4, level 4 EFT and IEC  
61000-4-5 16A (8 x 20µs) lightning surge.  
The original 10Base-T Ethernet chips were fairly large  
geometry CMOS products that were not very sensitive  
to static over-voltage. Newer 10/100 Ethernet de-  
vices however have become extremely sensitive to  
latch-up or damage as IC manufacturers have moved  
to 0.35-micron and smaller line widths. These small  
geometries are sensitive to fatal electrostatic dis-  
charges that may originate from a charged cable,  
lightning or a “human body”.  
One of the most common electrostatic discharges is a  
Cable Discharge Event (CDE). An Ethernet cable can  
store up energy that will discharge into the circuit when  
the cable is plugged into the connector causing a CDE.  
Another frequent phenomenon is human thumbing of  
the connectors of the cable. This charges each of the  
connections that will discharge into the circuit upon  
contact. Lightning can also induce high voltage onto  
the lines that can be transferred to the protected IC.  
Discharge from any source into the Ethernet interface  
will charge the secondary windings of its transformer.  
Once the surge is removed, the secondary winding will  
stop charging and will transfer its stored energy to the  
primary side where the protected IC sits. The internal  
protection in the PHY chip, if any, often is not enough  
due to the high energy of the discharges. If the dis-  
charge is catastrophic, it will destroy the protected IC.  
If it is less severe, it will cause latent failures that are  
very difficult to find.  
10/100 Ethernet operates at 125MHz clock over a  
twisted pair interface. In a typical system, the twisted-  
pair interface for each port consists of two differential  
signal pairs: one for the transmitter and one for the  
receiver, with the transmitter input being the most  
sensitive to damage. The fatal discharge occurs  
differentially across the transmit or receive line pair  
and is capacitively coupled through the transformer to  
SRV05-4  
Figure 1 - SRV05-4 Schematic and Pin Configuration  
Revision 09/14/2001  
www.semtech.com  
1
SI01-17  
Surging Ideas  
TVS Diode Application Note  
PROTECTION PRODUCTS  
PROTECTION PRODUCTS  
5
4
3
2
1
0
I/O to GND  
f = 1MHz  
0
1
2
3
4
5
Reverse Voltage (V)  
Figure 3 - SRV05-4 Typical Capacitance  
Verse Reverse Voltage  
Figure 2 - SRV05-4 8kV Contact ESD Response  
CH1 S21 LOG  
REF 0 dB  
3 dB/  
.
STOP 3 000 000 000 MHz  
START .030 000 MHz  
Figure 6 - 125MHz with SRV05-4  
Line-to-Line  
Figure 4 - SRV05-4 Insertion Loss  
Figure 5 - 125MHz with SRV05-4  
Line-to-Ground  
www.semtech.com  
2001 Semtech Corp.  
2
SI01-17  
Surging Ideas  
TVS Diode Application Note  
PROTECTION PRODUCTS  
PROTECTION PRODUCTS  
Figure 7 shows how one SRV05-4 can be configured to  
protect both twisted pairs (four lines) on the 10/100  
Ethernet port. In this configuration, one SRV05-4  
provides bi-directional differential mode protection for  
positive and negative surges. Transformer isolation of  
at least 1.5kV is usually sufficient for common mode  
protection. Pin 1 is connected to one line of a twisted  
pair while pin 6 is connect to the other line of that  
same twisted pair. Pin 3 is connected to one line of  
another twisted pair while pin 4 is connect to the other  
line of that same twisted pair. During a positive or  
negative surge on a twisted pair, the surge goes  
through a steering diode from pin 1,3,4, or 6 to turn on  
the TVS and shunt the current away from the pro-  
tected IC and back to the source.  
SRV05-4  
Figure 7 - SRV05-4 in 10/100 Ethernet Application  
www.semtech.com  
2001 Semtech Corp.  
3

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