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25539A

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描述：MirrorBit? Flash Memory Write Buffer Programming and Page Buffer Read

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25539A 概述

MirrorBit? Flash Memory Write Buffer Programming and Page Buffer Read 的MirrorBit ？闪存的写入缓冲区编程和页面缓冲器读\n

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MirrorBit™ Flash Memory

Write Buffer Programming

and Page Buffer Read

Application Note

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Publication Number 25539 Revision A Amendment 0 Issue Date October 4, 2001

MirrorBit Flash Memory Write Buffer

Programming and Page Buffer Read

Application Note

Write Buffer Programming is performed through the

INTRODUCTION

use of a few new memory device commands. These

are in addition to the commands normally used to con-

trol all AMD Flash devices. Please refer to an AMD

Flash datasheet for a review of the full command set,

the method for issuing commands, and the method for

polling the status of memory during a command opera-

tion.

A Write Buffer is implemented in MirrorBit flash mem-

ory devices to speed up programming operations. A

write buffer is a set of registers used to hold several

words that are to be programmed as a group. The

buffer is filled with words to be programmed before is-

suing the write buffer programming command. The

time to program each word is reduced by performing

programming overhead operations once for the entire

group of words. This results in faster effective word/

byte programming time than the standard “word/byte”

programming algorithms. Write Buffer Programming al-

lows the system to write to a maximum of 16 words (32

bytes) in one programming operation.

WRITE BUFFER OPERATION

Write-Buffer Programming is only available through the

“Write to Buffer” and “Program Buffer to Flash” confirm

command sequences. The “Write-to-Buffer Abort Re-

set” command sequence is used to reset out of the

Write-Buffer-Abort state. Table 1 lists all software pro-

gram sequences associated with the Write-Buffer.

Table 1. MirrorBit Write Buffer Programming Command Definitions x8/x16 Devices

Bus Cycles

First

Second

Third

Fourth

Fifth

Sixth

Command Sequence

Interface Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data

Word

Byte

555

2AA

555

WBL

(Note)

Write to Buffer

AAA

Program Buffer to Flash

(Confirm)

Both

Word

Byte

555

2AA

555

Write-to-BufferAbort

Reset

XXX

AAA

Note: The sixth cycle must be repeated to complete the number of buffer writes specified by WC in cycle four.

PA = Program Address of the memory location to be programmed. This can be any address within the target Write-Buffer-Page.

PD = Program Data to be programmed at location PA.

SA = Sector Address containing locations to be programmed. This can be any valid address within the sector.

WC = Write Count is the number of write buffer locations to load minus one.

WBL = Write Buffer Location. The address must be within the same write buffer page (32 byte range located on a 32 byte bound-

ary) as PA.

Publication# 25539 Rev: A Amendment/0

Issue Date: October 4, 2001

In Table 1, the user starts loading data at any location

in the target write-buffer-page. Subsequent write

buffer locations do not need to be loaded in any partic-

ular order as long as they reside in the same write-

buffer-page.

loaded into a given write-buffer location will be pro-

grammed into the device after the “Program Buffer to

Flash” confirm command. It is the software's respon-

sibility to comprehend the ramifications of loading a

write-buffer location more than once.

Note that the internal write counter decrements for

every data load operation, not for each unique write-

buffer address location. If the same write-buffer-loca-

tion is loaded multiple times, the internal write counter

will decrement after each load operation. The last data

When the “Write to Buffer” command programming se-

quence has been completed, the “Program Buffer to

Flash” confirm command must be issued to move the

data from the write-buffer into the flash memory array.

Programming Steps

Table 2. Table 2. MirrorBit Write Buffer Programming Procedure

Cycle #

Write Buffer Program Sequence

Address

Data

Comment

Refer to “Write-to-Buffer” Software

Command Definition for first and second

bus cycles

Issue Two Unlock Cycles:Unlock 1,

Unlock 2

1, 2

Issue “Write-Buffer-Load” Command @

Sector Address

Sector Address is issued starting with

the third bus cycle

0025h

WC = number of locations to program

minus 1WC of 0 = 1 location to pgmWC

of 1 = 2 locations to pgm, etc.The Word

Count is issued during the fourth bus

cycle

Issue Number of Write Buffer Locations to

load minus one@ Sector Address

Selects Write-Buffer-Page and loads

first Address/Data Pair. The first

address location can be any location in

the target Write-Buffer-Page.The first

address is loaded into the write-buffer

during the fifth bus cycle

Load First Address/Data pair

All addresses MUST be within the

selected write-buffer-page boundaries

but do not have to be in any

order.Number of cycles depends on the

cycle count loaded in fourth bus cycle.

Load remaining Address/Data pairs into

write buffer

6 to N

N + 1

WBL

This command MUST follow the last

write buffer location loaded, or the

operation will ABORT.

Issue Write Buffer Program Confirm@

Sector Address

0029h

Perform Data Bar Polling on Last Loaded

Address

A flowchart for the “Write to Buffer” command se-

quence is demonstrated in Figure 1.

MirrorBit Flash Memory Write Buffer Programming and Page Buffer Read

Write “Write to Buffer”

command and

Sector Address

Part of “Write to Buffer”

Command Sequence

Write number of locations

to program minus 1(WC)

and Sector Address

Write first address/data

Yes

WC = 0 ?

Write to a different

sector address

Abort Write to

Yes

Buffer Operation?

Write to buffer ABORTED.

Must write “Write-to-buffer

Abort Reset” command

sequence to return

(Note 1)

Write next address/data pair

to read mode.

WC = WC - 1

Write program buffer to

flash confirm,

Notes:

1. When “Sector Address” is specified, any

sector address

address in the selected sector is

acceptable. However, when loading

Write-Buffer address locations with data,

all addresses MUST fall within the

selected Write-Buffer Page.

Read DQ7 - DQ0 with

address = Last Loaded

Address

2. If this flowchart location was reached

because DQ5= “1”, then the device

FAILED. If this flowchart location was

reached because DQ1= “1”, then the

Write to Buffer operation was ABORTED.

In either case, the proper RESET

command must be written to the device to

return the device to READ mode. Write-

Buffer-Programming-Abort-Reset if

DQ1=1, either Software RESET or Write-

Buffer-Programming-Abort-Reset if

DQ5=1.

Yes

DQ7 = Data?

DQ1 = 1?

Yes

DQ5 = 1?

Yes

Read DQ7 - DQ0 with

address = Last Loaded

Address

Yes

DQ7 = Data?

(Note 2)

FAIL or ABORT

PASS

Figure 1. Write Buffer Programming Operation

MirrorBit Flash Memory Write Buffer Programming and Page Buffer Read

Buffer-Abort Reset” command sequence must be writ-

ten to the device to return to READ mode.

Write Buffer Programming Abort

A “write-buffer-page” is selected by addresses A4-

A(max) for x16 or x8/x16 flash memory devices or by

addresses A5-A(max) for x8 flash memory devices.

The “write-buffer-page” addresses must be the same

for all addresses loaded during a write buffer program-

ming operation. Write Buffer Programming cannot be

performed across multiple “write-buffer-pages” or

across multiple sectors. If the above conditions are vi-

olated, the Write Buffer Programming operation will be

automatically aborted.

PAGE BUFFER READ INTRODUCTION

Whenever the system changes a “page address” (or

toggles CE# during a read) the device performs a “ran-

dom access”. During this “random access” the read

page buffer is loaded in parallel with data within the se-

lected read-page boundaries. Subsequent “intra-

page” accesses are 3 to 4 times faster than random ac-

cesses because the data are already available in the

buffer (please refer to differences between t_CE/t_ACC

and t_PACCin the Am29LVxxxM datasheet). Therefore,

read performance is significantly improved.

Listed below are the ways in which the Write Buffer

Programming sequence can be automatically aborted:

1. Loading a value that is greater than the write buffer

size (write-buffer-page) during the “Numbers of Lo-

cations to Program” step.

READ BUFFER OPERATION

For page buffer read operation, the user has to issue a

read address, or “RA”, for any memory location. During

2. Writing to an address in a sector that is different

than the one specified during the “Write-Buffer-

Load” command.

the initial access time (t_{CE ACC}) a page of 4 words (8

bytes), located on an 8-byte boundary, is read into the

page buffer. If the device is in word mode address bits

A1 and A0 can then be used to access any of the four

words within the page with a reduced page access time

(t_PACC). If the device is in byte mode in a x8/x16 device.

A1 through A-1 can be used to access any of the eight

bytes in the page. If the device is a x8-only device, A2

through A0 can be used to access any of the eight

bytes within the page.

3. Writing an Address/Data pair to a different write-

buffer-page than the one selected by the “Starting

Address” during the “write buffer data loading”

stage of the operation.

4. Writing data other than the “Confirm Command”

after loading the specified number of write buffer lo-

cations.

The appropriate page is selected by the higher address

bits A2-A(max) for x16-only and x8/x16 devices, and

A3-A(max) for x8-only devices. Fast page mode ac-

cesses are obtained by keeping the high-order “read-

page address bits” constant and changing the “intra-

read page address bits” addresses: A0 to A1 for x16-

only and x8/x16 in word mode; A-1 to A1 for x8/x16 in

byte mode; and A0 to A2 for x8-only. This is an asyn-

chronous operation with the microprocessor supplying

the specific byte or word location.

Note that the “Write-to-Buffer Abort” condition is always

indicated by the DQ1 “Write-To-Buffer Abort” Operation

Status Bit.

DQ1: Write-to-Buffer Abort

DQ1 is “1” when a Write-to-Buffer operation has been

aborted.

A Write-to-Buffer-Abort-Reset command sequence

must be issued to return the flash memory device to

reading array data.

A depiction of the command sequence definition for

read accesses is shown in Table 3.

The ABORT condition is indicated by DQ1 = 1, DQ7 =

DATA# (for the “Last Loaded Address”), DQ6 = TOG-

GLE, DQ5=0. This indicates that the Write Buffer Pro-

gramming Operation was ABORTED. A “Write-to-

A depiction of the device bus operation for read ac-

cesses is shown in Table 4.

Table 3. Read Access

Bus Cycles

Third

Command

Sequence

Interface

First

Second

Fourth

Fifth

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Note

Data

Note

Read

Both

Note: For reading bytes, eight consecutive memory locations can be read, compared to four memory locations for reading words.

“Intra-read page” locations can be accessed in any order.

RA = Read Address

RD = Read Data

MirrorBit Flash Memory Write Buffer Programming and Page Buffer Read

Table 4. Device Bus Operation for Read Access

Operation

CE#

OE#

WE#

RESET#

WP#/ACC

Address

Data

Read

A_IN

D_OUT

During page buffer read operations, the CE# pin must

be kept at voltage level V_ILduring all fast page mode

accesses. If the CE# pin toggles or changes state dur-

ing a page buffer read operation, the current data trans-

fer will automatically be aborted and another initial

page access is started. This will result in unnecessary

penalty and overhead in read timings.

gramming performance is roughly two times faster than

previous AMD Low Voltage Flash Memories. Write

Buffer Programming is enabled via a simple addition of

three commands to the standard AMD embedded algo-

rithm bus command set.

The Read Page Buffer feature of AMD MirrorBit Flash

memories can increase read performance significantly.

Following each random (inter-page) access all loca-

tions of the referenced 8-byte page are available for

fast access. When read accesses can be grouped

within a page the average read performance can be in-

creased by 3 to 4 times.

CONCLUSION

The Write Buffer Programming feature of AMD Mirror-

Bit Flash memories increases the programming

speed by roughly 16 times compared to single byte or

word write operations in the same memory for a full

write buffer of 16 words or 32 bytes. Write Buffer Pro-

AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc.

Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

MirrorBit Flash Memory Write Buffer Programming and Page Buffer Read

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