27LV25630IP [ETC]
x8 EPROM ; X8 EPROM\n
| 型号： | 27LV25630IP |
| 厂家： | 
ETC |
| 描述： | x8 EPROM
|
| 文件： | 总12页 (文件大小：125K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
27LV256
256K (32K x 8) Low-Voltage CMOS EPROM
FEATURES
PACKAGE TYPES
PDIP
• Wide voltage range 3.0V to 5.5V
• High speed performance
VPP • 1
28 VCC
27 A14
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 O7
18 O6
17 O5
16 O4
15 O3
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
2
3
4
- 200 ns access time available at 3.0V
• CMOS Technology for low power consumption
- 8 mA Active current at 3.0V
5
6
7
8
- 20 mA Active current at 5.5V
9
10
11
12
13
- 100 µA Standby current
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• Separate chip enable and output enable controls
• High speed “Express” programming algorithm
• Organized 32K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
VSS 14
PLCC
5
29
A6
A8
6
28
A5
A4
A3
A2
A1
A0
NC
O0
A9
7
27
A11
- 32-pin PLCC package
8
26
25
24
23
22
21
NC
OE
A10
CE
O7
O6
9
- 28-pin SOIC package
10
11
12
13
- Tape and reel
• Data Retention > 200 years
• Available for the following temperature ranges:
- Commercial:
- Industrial:
0˚C to +70˚C
-40˚C to +85˚C
SOIC
VPP
A12
A7
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
DESCRIPTION
2
3
A6
4
The Microchip Technology Inc. 27LV256 is a low volt-
age (3.0 volt) CMOS EPROM designed for battery pow-
ered applications. The device is organized as a 32K x
A5
5
A9
A4
6
A11
OE
A10
CE
O7
A3
7
A2
8
8
(32K-Byte) non-volatile memory product. The
A1
9
27LV256 consumes only 8 mA maximum of active cur-
rent during a 3.0 volt read operation therefore improv-
ing battery performance. This device is designed for
very low voltage applications where conventional 5.0
volt only EPROMS can not be used. Accessing individ-
ual bytes from an address transition or from power-up
(chip enable pin going low) is accomplished in less than
200 ns at 3.0V. This device allows systems designers
the ability to use low voltage non-volatile memory with
today’s' low voltage microprocessors and peripherals in
battery powered applications.
A0
10
11
12
13
14
O0
O1
O2
VSS
O6
O5
O4
O3
A complete family of packages is offered to provide the
most flexibility in applications. For surface mount appli-
cations, PLCC or SOIC packaging is available. Tape
and reel packaging is also available for PLCC or SOIC
packages.
1998 Microchip Technology Inc.
DS11020G-page 1
This Material Copyrighted by Its Respective Manufacturer
27LV256
TABLE 1-1:
Name
PIN FUNCTION TABLE
Function
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Maximum Ratings*
A0-A14
CE
Address Inputs
Chip Enable
VCC and input voltages w.r.t. VSS ........-0.6V to +7.25V
VPP voltage w.r.t. VSS during
programming .........................................-0.6V to +14V
OE
Output Enable
Programming Voltage
Data Output
VPP
Voltage on A9 w.r.t. VSS.......................-0.6V to +13.5V
Output voltage w.r.t. VSS.................-0.6V to VCC +1.0V
Storage temperature .......................... -65˚C to +150˚C
Ambient temp. with power applied...... -65˚C to +125˚C
O0 - O7
VCC
+5V or +3V Power Supply
Ground
VSS
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
NC
No Connection; No Internal
Connection
NU
Not Used; No External Connection Is
Allowed
TABLE 1-2:
READ OPERATION DC CHARACTERISTICS
VCC = +5V ±10% or 3.0V where indicated
Commercial:
Industrial:
Tamb = 0˚C to +70˚C
Tamb = -40˚C to +85˚C
Parameter
Part*
Status
Symbol Min.
Max.
Units Conditions
Input Voltages
all
Logic "1"
Logic "0"
VIH
VIL
2.0
-0.5
VCC+1
0.8
V
V
Input Leakage
all
all
ILI
-10
2.4
10
µA VIN = 0 to VCC
Output Voltages
Logic "1"
Logic "0"
VOH
VOL
V
V
IOH = -400 µA
IOL = 2.1 mA
0.45
10
6
Output Leakage
all
all
—
—
ILO
-10
—
µA VOUT = 0V to VCC
Input Capacitance
CIN
pF VIN = 0V; Tamb = 25°C;
f = 1 MHz
Output Capacitance
all
—
COUT
—
12
pF VOUT = 0V; Tamb = 25°C;
f = 1 MHz
Power Supply Current,
Active
C
I
TTL input
TTL input
ICC1
ICC2
—
—
20 @ 5.0V
8 @ 3.0V
25 @ 5.0V
10 @ 3.0V
mA VCC = 5.5V; VPP = VCC
mA f = 1 MHz;
mA OE = CE = VIL;
mA IOUT = 0 mA;
VIL = -0.1 to 0.8V;
VIH = 2.0 to VCC;
Note 1
Power Supply Current,
Standby
C
I
TTL input
TTL input
ICC(S)
—
1 @ 3.0V
2 @ 3.0V
mA
mA
all
CMOS input
100 @ 3.0V µA CE=VCC ± 0.2V
* Parts: C=Commercial Temperature Range
I =Industrial Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
DS11020G-page 2
1998 Microchip Technology Inc.
This Material Copyrighted by Its Respective Manufacturer
27LV256
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V
1 TTL Load + 100 pF
Input Rise and Fall Times: 10 ns
Ambient Temperature:
Commercial:
Industrial:
Tamb = 0˚C to +70˚C
Tamb = -40˚C to +85˚C
27HC256-20
27HC256-25
27HC256-30
Parameter
Sym
Units
Conditions
Min
Max
Min
Max
Min
Max
Address to Output Delay
CE to Output Delay
OE to Output Delay
tACC
tCE
—
—
—
0
200
200
100
50
—
—
—
0
250
250
125
50
—
—
—
0
300
300
125
50
ns
ns
ns
ns
CE = OE = VIL
OE = VIL
tOE
CE = VIL
CE or OE to O/P High
Impedance
tOFF
Output Hold from
Address CE or OE,
whichever goes first
tOH
0
—
0
—
0
—
ns
FIGURE 1-1: READ WAVEFORMS
VIH
Address
VIL
Address valid
VIH
CE
VIL
tCE(2)
VIH
OE
VIL
tOFF(1,3)
tOH
tOE(2)
VOH
Outputs
O0 - O7
High Z
High Z
Valid Output
VOL
tACC
Notes: (1) tOFF is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE
(3) This parameter is sampled and is not 100% tested.
1998 Microchip Technology Inc.
DS11020G-page 3
This Material Copyrighted by Its Respective Manufacturer
27LV256
TABLE 1-4:
PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25°C ± 5°C
VCC = 6.5V ± 0.25V, VPP = 13.0V ± 0.25V
Parameter
Status
Symbol
Min
Max.
Units
Conditions
Input Voltages
Logic”1”
Logic”0”
VIH
VIL
2.0
-0.1
VCC+1
0.8
V
V
Input Leakage
—
ILI
-10
2.4
10
µA
VIN = 0V to VCC
Output Voltages
Logic”1”
Logic”0”
VOH
VOL
V
V
IOH = -400 µA
IOL = 2.1 mA
0.45
20
VCC Current, program & verify
VPP Current, program
—
—
—
ICC2
IPP2
VH
—
—
mA
mA
V
Note 1
Note 1
25
A9 Product Identification
11.5
12.5
Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
for Program, Program Verify
and Program Inhibit Modes
AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V
Output Load: 1 TLL Load + 100pF
Ambient Temperature: Tamb=25°C±5°C
VCC= 6.5V ± 0.25V, VPP =13.0V ± 0.25V
Parameter
Symbol
Min. Max. Units
Remarks
Address Set-Up Time
Data Set-Up Time
Data Hold Time
tAS
tDS
2
2
—
—
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
ns
tDH
2
—
Address Hold Time
Float Delay (2)
tAH
0
—
tDF
0
130
—
VCC Set-Up Time
Program Pulse Width (1)
CE Set-Up Time
tVCS
tPW
tCES
tOES
tVPS
tOE
2
95
2
105
—
100 µs typical
OE Set-Up Time
2
—
VPP Set-Up Time
Data Valid from OE
2
—
—
100
Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%.
2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no
longer driven (see timing diagram).
DS11020G-page 4
1998 Microchip Technology Inc.
This Material Copyrighted by Its Respective Manufacturer
27LV256
FIGURE 1-2: PROGRAMMING WAVEFORMS
Program
Verify
VIH
Address
Data
Address Stable
VIL
VIH
VIL
tAS
tDS
tAH
High Z
Data Stable
Data Out Valid
tDF
(1)
tDH
13.0V(2)
5.0V
6.5V(2)
5.0V
VIH
VPP
VCC
CE
tVPS
tVCS
VIL
tOES
tPW
tOE
(1)
VIH
OE
tOPW
VIL
Notes:
(1) tDF and tOE are characteristics of the device but must be accommodated by the programmer
(2) VCC = 6.5V ±0.25V, VPP = VH = 13.0V ±0.25V for express algorithm
TABLE 1-6:
MODES
Operation Mode
CE
OE
VPP
A9
O0 - O7
Read
VIL
VIL
VIH
VIH
VIH
VIL
VIL
VIL
VIH
VIL
VIH
X
VCC
VH
X
X
DOUT
DIN
Program
Program Verify
Program Inhibit
Standby
VH
X
DOUT
VH
X
High Z
VCC
VCC
VCC
X
High Z
Output Disable
Identity
VIH
VIL
X
High Z
VH
Identity Code
X = Don’t Care
1.2
Read Mode
For Read operations, if the addresses are stable, the
address access time (tACC) is equal to the delay from
CE to output (tCE). Data is transferred to the output
after a delay from the falling edge of OE (tOE).
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when:
a) the CE pin is low to power up (enable) the chip
b) the OE pin is low to gate the data to the output
pins
1998 Microchip Technology Inc.
DS11020G-page 5
This Material Copyrighted by Its Respective Manufacturer
27LV256
1.3
Standby Mode
1.6
Verify
The standby mode is defined when the CE pin is high
(VIH) and a program mode is not defined. Output Dis-
able
After the array has been programmed it must be veri-
fied to ensure that all the bits have been correctly pro-
grammed. This mode is entered when all of the
following conditions are met:
1.4
Output Enable
a) VCC is at the proper level
b) VPP is at the proper VH level
c) the CE pin is high
This feature eliminates bus contention in multiple bus
microprocessor systems and the outputs go to a high
impedance when the following condition is true:
d) the OE line is low
•
The OE pin is high and program mode is not
defined.
1.7
Inhibit
When Programming multiple devices in parallel with dif-
ferent data, only CE needs to be under separate control
to each device. By pulsing the CE line low on a partic-
ular device, that device will be programmed, and all
other devices with CE held high will not be programmed
with the data although address and data are available
on their input pins.
1.5
Programming Mode
The Express algorithm has been developed to improve
on the programming throughput times in a production
environment. Up to 10 100-microsecond pulses are
applied until the byte is verified. No over-programming
is required. A flowchart of the express algorithm is
shown in Figure 1.
1.8
Identity Mode
Programming takes place when:
In this mode specific data is outputted which identifies
the manufacturer as Microchip Technology Inc. and
device type. This mode is entered when Pin A9 is taken
to VH (11.5V to 12.5V). The CE and OE lines must be
at VIL. A0 is used to access any of the two non-eras-
able bytes whose data appears on O0 through O7.
a) VCC is brought to the proper voltage
b) VPP is brought to the proper VH level
c) the OE pin is high
d) the CE pin is low
Since the erased state is “1” in the array, programming
of “0” is required. The address to be programmed is set
via pins A0-A14 and the data to be programmed is pre-
sented to pins O0-O7. When data and address are sta-
ble, a low-going pulse on the CE line programs that
location.
Pin
Identity
Input
Output
A0 0 O O O O O O O
H
e
x
7
6
5
4
3
2
1
0
Manufacturer
Device Type*
VIL
VIH
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
29
8C
* Code subject to change.
DS11020G-page 6
1998 Microchip Technology Inc.
This Material Copyrighted by Its Respective Manufacturer
27LV256
FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM
Conditions:
Tamb = 25+/-5C
VCC = 6.5+/-0.25V
VPP = 13.0+/-0.25V
Start
ADDR = First Location
VCC = 6.5V
VPP = 13.0V
X = 0
Program one 100 µs pulse
Increment X
Verify
Byte
Pass
Fail
No
Yes
Device
Failed
X = 10?
Last
Address?
Yes
No
Increment Address
VCC = VPP = 4.5V, 5.5V
All
Yes
bytes
= original
data?
No
Device
Passed
Device
Failed
1998 Microchip Technology Inc.
DS11020G-page 7
This Material Copyrighted by Its Respective Manufacturer
27LV256
NOTES:
DS11020G-page 8
1998 Microchip Technology Inc.
This Material Copyrighted by Its Respective Manufacturer
27LV256
NOTES:
1998 Microchip Technology Inc.
DS11020G-page 9
This Material Copyrighted by Its Respective Manufacturer
27LV256
NOTES:
DS11020G-page 10
1998 Microchip Technology Inc.
This Material Copyrighted by Its Respective Manufacturer
27LV256
27LV256 Product Identification System
To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed
sales offices.
27LV256
–
25
I
/P
L = Plastic Leaded Chip Carrier
P = Plastic DIP (600 Mil)
Package:
SO = Plastic SOIC (300 Mil)
Temperature
Range:
Blank = 0˚C to +70˚C
I = -40˚C to +85˚C
20 = 200 ns
25 = 250 ns
30 = 300 ns (SOIC only)
Access
Time:
Device:
27LV256
256K (32K x 8) Low-Voltage CMOS EPROM
1998 Microchip Technology Inc.
DS11020G-page 11
This Material Copyrighted by Its Respective Manufacturer
WORLDWIDE SALES AND SERVICE
AMERICAS
AMERICAS (continued)
ASIA/PACIFIC (continued)
Corporate Office
Toronto
Singapore
Microchip Technology Inc.
Microchip Technology Inc.
Microchip Technology Singapore Pte Ltd.
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2355 West Chandler Blvd.
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Tel: 480-786-7200 Fax: 480-786-7277
Technical Support: 480-786-7627
Web Address: http://www.microchip.com
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Tel: 65-334-8870 Fax: 65-334-8850
Taiwan, R.O.C
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11/15/99
San Jose
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
All rights reserved. © 1999 Microchip Technology Incorporated. Printed in the USA. 11/99
Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed
by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products
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logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.
1999 Microchip Technology Inc.
This Material Copyrighted by Its Respective Manufacturer
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