508657R [ETC]
IC SMD ; SMD IC\n型号: | 508657R |
厂家: | ETC |
描述: | IC SMD
|
文件: | 总12页 (文件大小:329K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC485
Low Power RS485
Interface Transceiver
U
DESCRIPTIO
EATURE
S
F
■
■
■
■
Low Power: ICC = 300µA Typ
Designed for RS485 Interface Applications
Single 5V supply
–7V to 12V Bus Common-Mode Range Permits
±7V Ground Difference Between Devices on the Bus
Thermal Shutdown Protection
Power-Up/Down Glitch-Free Driver Outputs
Permit Live Insertion or Removal of Transceiver
Driver Maintains High Impedance in Three-State
or with the Power Off
Combined Impedance of a Driver Output and
Receiver Allows Up to 32 Transceivers on the Bus
70mV Typical Input Hysteresis
30ns Typical Driver Propagation Delays
with 5ns Skew
Pin Compatible with the SN75176A, DS75176A
and µA96176
TheLTC485isalowpowerdifferentialbus/linetransceiver
designedformultipointdatatransmissionstandardRS485
applications with extended common-mode range (12V to
–7V). It also meets the requirements of RS422.
TheCMOSdesignofferssignificantpowersavingsoverits
bipolarcounterpartwithoutsacrificingruggednessagainst
overload of ESD damage.
■
■
■
■
The driver and receiver feature three-state outputs, with
the driver outputs maintaining high impedance over the
entire common-mode range. Excessive power dissipation
caused by bus contention or faults is prevented by a
thermal shutdown circuit which forces the driver outputs
into a high impedance state.
■
■
The receiver has a fail-safe feature which guarantees a
high output state when the inputs are left open.
■
The LTC485 is fully specified over the commercial and
extended industrial temperature range.
O U
PPLICATI
S
A
■
Low Power RS485/RS422 Transceiver
Level Translator
■
U
O
TYPICAL APPLICATI
Driver Outputs
RO1
RE1
DE1
DI1
V
CC1
R
A
Rt
Rt
D
GND1
RO2
RE2
DE2
DI2
V
CC2
R
B
D
GND2
LTC485 • TA01
LTC485 • TA02
1
LTC485
W W W
U
W
U
ABSOLUTE AXI U RATI GS
(Note 1)
/O
PACKAGE RDER I FOR ATIO
ORDER PART
Supply Voltage ....................................................... 12V
Control Input Voltages ................... –0.5V to VCC + 0.5V
Driver Input Voltage....................... –0.5V to VCC + 0.5V
Driver Output Voltage ........................................... ±14V
Receiver Input Voltage.......................................... ±14V
Receiver Output Voltages .............. –0.5V to VCC + 0.5V
Operating Temperature Range
LTC485I...................................... –40°C ≤ TA ≤ 85°C
LTC485C.......................................... 0°C ≤ TA ≤ 70°C
LTC485M.................................. –55°C ≤ TA ≤ 125°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TOP VIEW
NUMBER
RO
RE
DE
DI
1
2
3
4
V
B
A
8
7
6
5
CC
R
LTC485CJ8
LTC485CN8
LTC485CS8
LTC485IN8
LTC485IS8
LTC485MJ8
D
GND
J8 PACKAGE
N8 PACKAGE
8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP
S8 PACKAGE
8-LEAD PLASTIC SOIC
S8 PART MARKING
TJMAX = 155°C, θJA = 100°C/ W (J)
TJMAX = 100°C, θJA = 130°C/ W (N)
JMAX = 100°C, θJA = 170°C/ W (S)
485
485I
T
VCC = 5V ±5%, unless otherwise noted. (Notes 2 and 3)
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OD1
V
OD2
Differential Driver Output Voltage (Unloaded)
Differential Driver Output Voltage (with Load)
I = 0
●
5
V
O
R = 50Ω (RS422)
R = 27Ω (RS485), Figure 1
●
●
2
1.5
V
V
5
∆V
Change in Magnitude of Driver
DifferentialOutput Voltage for
Complementary States
R = 27Ω or R = 50Ω, Figure 1
●
0.2
V
OD
V
Driver Common-Mode Output Voltage
R = 27Ω or R = 50Ω, Figure 1
R = 27Ω or R = 50Ω, Figure 1
●
●
3
V
V
OC
∆ V
Change in Magnitude of Driver
Common-Mode Output Voltage
for Complementary States
0.2
OC
V
V
Input High Voltage
Input Low Voltage
Input Current
DE, DI, RE
DE, DI, RE
DE, DI, RE
●
●
●
●
●
●
2
V
V
IH
0.8
±2
IL
I
I
µA
mA
mA
V
IN1
IN2
Input Current (A, B)
DE = 0, V = 0V
V
V
= 12V
= –7V
±1
CC
IN
IN
or 5.25V
–0.8
0.2
V
TH
Differential Input Threshold Voltage
for Receiver
–7V ≤ V ≤ 12V
–0.2
3.5
CM
∆V
Receiver Input Hysteresis
Receiver Output High Voltage
Receiver Outpu Low Voltage
V
CM
= 0V
●
●
●
●
70
mV
V
TH
V
V
I = –4mA, V = 200mV
O ID
OH
I = 4mA, V = –200mV
O
0.4
V
OL
ID
I
Three-State (High Impedance) Output
Current at Receiver
V
CC
= Max, 0.4V ≤ V ≤ 2.4V
±1
µA
OZR
O
R
Receiver Input Resistance
Supply Current
–7V ≤ V ≤ 12V
●
●
●
●
●
●
12
kΩ
µA
IN
CM
I
No Load, Pins 2, Outputs Enabled
3, 4 = 0V or 5V
500
300
100
100
900
500
250
250
85
CC
Outputs Disabled
µA
I
I
I
Driver Short-Circuit Current, V
Driver Short-Circuit Current, V
Receiver Short-Circuit Current
= HIGH
= LOW
V = –7V
O
35
35
7
mA
mA
mA
OSD1
OSD2
OSR
OUT
V = 10V
O
OUT
0V ≤ V ≤ V
O
CC
2
LTC485
U
SWITCHI G CHARACTERISTICS VCC = 5V ±5%, unless otherwise noted. (Notes 2 and 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
30
30
5
MAX
50
UNITS
ns
t
t
t
Driver Input to Output
R
DIFF
= 54Ω, C = C = 100pF,
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
10
PLH
L1
L2
(Figures 3 and 5)
Driver Input to Output
10
50
ns
PHL
Driver Output to Output
Driver Rise or Fall Time
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable Time from Low
Driver Disable Time from High
Receiver Input to Output
10
ns
SKEW
t , t
r
3
15
40
40
40
40
90
90
13
20
20
20
20
25
ns
f
t
t
t
t
t
t
t
t
t
t
t
C = 100pF (Figures 4 and 6) S2 Closed
L
70
ns
ZH
ZL
LZ
HZ
C = 100pF (Figures 4 and 6) S1 Closed
L
70
ns
C = 15pF (Figures 4 and 6) S1 Closed
L
70
ns
C = 15pF (Figures 4 and 6) S2 Closed
L
70
ns
R
DIFF
= 54Ω, C = C = 100pF,
30
30
200
200
ns
PLH
PHL
SKD
ZL
L1
L2
(Figures 3 and 7)
ns
t
– t
Differential Receiver Skew
PHL
ns
PLH
Receiver Enable to Output Low
Receiver Enable to Output High
Receiver Disable from Low
Receiver Disable from High
C
RL
C
RL
C
RL
C
RL
= 15pF (Figures 2 and 8) S1 Closed
= 15pF (Figures 2 and 8) S2 Closed
= 15pF (Figures 2 and 8) S1 Closed
= 15pF (Figures 2 and 8) S2 Closed
50
50
50
50
ns
ns
ZH
ns
LZ
ns
HZ
The
●
denotes specifications which apply over the full operating
Note 3: All typicals are given for V = 5V and T = 25°C.
CC A
temperature range.
Note 1: Absolute maximum ratings are those beyond which the safety of
the device cannot be guaranteed.
Note 4: The LTC485 is guaranteed by design to be functional over a supply
voltage range of 5V ±10%. Data sheet parameters are guaranteed over the
tested supply voltage range of 5V ±5%.
Note 2: All currents into device pins are positive; all currents out ot device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
TEST CIRCUITS
A
S1
S2
TEST POINT
C
R
1k
RECEIVER
OUTPUT
V
CC
V
OD
1k
RL
15pF
V
R
OC
LTC485 • F02
B
LTC485 • F01
Figure 1. Driver DC Test Load
Figure 2. Receiver Timing Test Load
3V
DE
S1
A
A
B
C
V
L1
CC
RO
DI
500Ω
OUTPUT
UNDER TEST
R
DIFF
B
S2
C
L2
RE
C
L
15pF
LTC485 • F02
LTC485 • F03
Figure 3. Driver/Receiver Timing Test Circuit
Figure 4. Driver Timing Test Load #2
3
LTC485
U
W
W
SWITCHI G TI E WAVEFOR S
3V
DI
1.5V
f = 1MHz, t ≤ 10ns, t ≤ 10ns
1.5V
r
f
0V
B
1/2 V
O
t
t
PLH
PLH
V
O
A
t
t
SKEW
1/2 V
SKEW
O
90%
20%
V
O
80%
V
DIFF
= V(A) – V(B)
0V
10%
–V
O
LTC485 • F05
t
t
f
r
Figure 5. Driver Propagation Delays
3V
0V
5V
1.5V
f = 1MHz, t ≤ 10ns, t ≤ 10ns
1.5V
DI
r
f
t
t
LZ
ZL
A, B
A, B
2.3V
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
0.5V
0.5V
V
OL
OH
0V
V
2.3V
t
LTC485 • F06
t
HZ
ZH
Figure 6. Driver Enable and Disable Times
V
OH
1.5V
1.5V
R
OUTPUT
V
OL
f = 1MHz, t ≤ 10ns, t ≤ 10ns
t
t
PLH
r
f
PHL
V
A, B
–V
OD2
OD2
0V
INPUT
LTC485 • F07
Figure 7. Receiver Propagation Delays
3V
0V
5V
1.5V
f = 1MHz, t ≤ 10ns, t ≤ 10ns
1.5V
RE
R
r
f
t
t
LZ
ZL
1.5V
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
0.5V
0.5V
R
1.5V
0V
t
LTC485 • F08
t
HZ
ZH
Figure 8. Receiver Enable and Disable Times
4
LTC485
U
U
U U
U
FU CTIO TABLES
PI FU CTIO S
LTC485 Transmitting
PIN #
NAME
DESCRIPTION
INPUTS
OUTPUTS
1
RO
Receiver Output. If the receiver output is enabled
(RE low), then if A > B by 200mV, RO will be
high. If A < B by 200mV, then RO will be low.
Receiver Output Enable. A low enables the
receiver output, RO. A high input forces the
receiver output into a high impedance state.
Driver Outputs Enable. A high on DE enables the
driver output. A and B, and the chip will function
as a line driver. A low input will force the driver
outputs into a high impedance state and the chip
will function as a line receiver.
Driver Input. If the driver outputs are enabled
(DE high), then a low on DI forces the outputs A
low and B high. A high on DI with the driver
outputs enabled will force A high and B low.
LINE
CONDITION
RE
X
DE
1
DI
1
B
A
1
0
Z
Z
No Fault
No Fault
X
0
1
Z
Z
2
3
RE
DE
X
1
0
X
0
X
X
X
1
Fault
LTC485 Receiving
INPUTS
OUTPUTS
4
DI
RE
0
DE
0
A – B
≥0.2V
R
1
0
1
Z
0
0
≤–0.2V
Inputs Open
X
5
6
7
8
GND
A
B
Ground Connection.
Driver Output/Receiver Input.
Driver Output/Receiver Input.
0
0
1
0
V
Positive Supply; 4.75 < V < 5.25
CC
CC
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Receiver Output Low Voltage
vs Output Current
Receiver Output High Voltage
vs Output Current
Receiver Output High Voltage
vs Temperature
36
32
28
24
20
16
12
8
–18
–16
–14
–12
–10
–8
4.8
T
A
= 25°C
T
= 25°C
I = 8mA
A
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
– 6
–4
4
–2
0
0
3.0
0
0.5
2.0
5
4
–50 –25
0
25
50
125
1.0
1.5
3
2
75 100
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
LTC485 • TPC01
LTC485 • TPC02
LTC485 • TPC03
5
LTC485
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Receiver Output Low Voltage
vs Temperature
Driver Differential Output Voltage
vs Output Current
Driver Differential Output Voltage
vs Temperature
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
72
64
56
48
40
32
24
16
8
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
T
= 25°C
RI = 54Ω
I = 8mA
A
0
0
1.5
–50 –25
0
25
50
125
0
1
3
4
–50 –25
0
25
50
125
75 100
2
75 100
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
LTC485 • TPC03
LTC485 • TPC05
LTC485 • TPC06
Driver Output Low Voltage
vs Output Current
Driver Output High Voltage
vs Output Current
TTL Input Threshold
vs Temperature
1.64
1.63
1.62
1.61
1.60
1.59
1.58
1.57
1.56
90
80
70
60
50
40
30
20
10
–108
–96
–84
–72
–60
–48
–36
–24
–12
T
= 25°C
T
= 25°C
A
A
1.55
0
0
–50 –25
0
25
50
125
0
1
3
4
0
1
3
4
75 100
2
2
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
LTC485 • TPC09
LTC485 • TPC07
LTC485 • TPC08
Receiver tPLH – tPHL
vs Temperature
Driver Skew vs Temperature
Supply Current vs Temperature
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
5.4
4.8
4.2
3.6
3.0
2.4
1.8
1.2
0.6
640
580
520
460
400
340
280
220
160
DRIVER ENABLED
DRIVER DISABLED
3.0
0
100
–50 –25
0
25
50
125
–50 –25
0
25
50
125
75 100
75 100
–50 –25
0
25
50
125
75 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LTC485 • TPC10
LTC485 • TPC11
LTC485 • TPC12
6
LTC485
U U
W
U
APPLICATIO S I FOR ATIO
Basic Theory of Operation
(D1) or the N + /P-substrate diode (D2) respectively will
turn on and clamp the output to the supply. Thus, the
output stage is no longer in a high impedance state and is
not able to meet the RS485 common-mode range require-
ment. In addition, the large amount of current flowing
through either diode will induce the well known CMOS
latchup condition, which could destroy the device.
Previous RS485 transceivers have been designed using
bipolar technology because the common-mode range of
thedevicemustextendbeyondthesuppliesandthedevice
must be immune to ESD damage and latchup. Unfortu-
nately, the bipolar devices draw a large amount of supply
current, which is unacceptable for the numerous applica-
tions that require low power consumption. The LTC485 is
the first CMOS RS485/RS422 transceiver which features
ultra-lowpowerconsumptionwithoutsacrificingESDand
latchup immunity.
The LTC485 output stage of Figure 9 eliminates these
problems by adding two Schottky diodes, SD3 and SD4.
The Schottky diodes are fabricated by a proprietary modi-
fication to the standard N-well CMOS process. When the
output stage is operating normally, the Schottky diodes
are forward biased and have a small voltage drop across
them. When the output is in the high impedance state and
is driven above VCC or below ground, the parasitic diodes
D1 or D2 still turn on, but SD3 or SD4 will reverse bias and
prevent current from flowing into the N-well or the sub-
strate. Thus, the high impedance state is maintained even
with the output voltage beyond the supplies. With no
minority carrier current flowing into the N-well or sub-
strate, latchup is virtually eliminated under power-up or
power-down conditions.
The LTC485 uses a proprietary driver output stage, which
allows a common-mode range that extends beyond the
power supplies while virtually eliminating latchup and
providing excellent ESD protection. Figure 9 shows the
LTC485 output stage while Figure 10 shows a conven-
tional CMOS output stage.
When the conventional CMOS output stage of Figure 10
enters a high impedance state, both the P-channel (P1)
and the N-channel (N1) are turned off. If the output is then
driven above VCC or below ground, the P + /N-well diode
V
CC
V
CC
SD3
P1
P1
D1
D1
OUTPUT
OUTPUT
D2
LOGIC
LOGIC
SD4
N1
N1
D2
LTC485 • F10
LTC485 • F09
Figure 10. Conventional CMOS Output Stage
Figure 9. LTC485 Output Stage
7
LTC485
APPLICATIO S I FOR ATIO
U U
W
U
The LTC485 output stage will maintain a high impedance
state until the breakdown of the N-channel or P-channel is
reached when going positive or negative respectively. The
output will be clamped to either VCC or ground by a Zener
voltage plus a Schottky diode drop, but this voltage is way
beyond the RS485 operating range. This clamp protects
the MOS gates from ESD voltages well over 2000V.
BecausetheESDinjectedcurrentintheN-wellorsubstrate
consists of majority carriers, latchup is prevented by
careful layout techniques.
Propagation Delay
Many digital encoding schemes are dependent upon the
difference in the propagation delay times of the driver and
the receiver. Using the test circuit of Figure 13, Figures 11
and 12 show the typical LTC485 receiver propagation
delay.
The receiver delay times are:
tPLH – tPHL = 9ns Typ, VCC = 5V
The driver skew times are:
Skew = 5ns Typ, VCC = 5V
10ns Max, VCC = 5V, TA = –40°C to 85°C
A
A
DRIVER
OUTPUTS
DRIVER
OUTPUTS
B
B
RECEIVER
RO
RECEIVER
RO
OUTPUT
OUTPUT
LTC485 • F11
LTC485 • F12
Figure 11. Receiver tPHL
Figure 12. Receiver tPLH
100pF
BR
RECEIVER
OUT
R
TTL IN
t , t < 6ns
D
R
100Ω
r
f
LTC485 • F13
100pF
Figure 13. Receiver Propagation Delay Test Circuit
8
LTC485
U U
W
U
APPLICATIO S I FOR ATIO
LTC485 Line Length vs Data Rate
Figures 17 and 18 show that the LTC485 is able to
comfortably drive 4000 feet of wire at 110kHz.
The maximum line length allowable for the RS422/RS485
standard is 4000 feet.
RO
100Ω
C
A
B
TTL
OUT
COMMON-MODE
VOLTAGE (A + B)/2
LTC485
LTC485
D
4000 FT 26AWG
TWISTED PAIR
NOISE
TTL
IN
GENERATOR
DI
LTC485 • F17
Figure 14. Line Length Test Circuit
Figure 17. System Common-Mode Voltage at 110kHz
Using the test circuit in Figure 14, Figures 15 and 16 show
that with ~20VP-P common-mode noise injected on the
line, The LTC485 is able to reconstruct the data stream at
the end of 4000 feet of twisted pair wire.
RO
COMMON-MODE
VOLTAGE (A – B)
RO
DI
COMMON-MODE
LTC485 • F18
VOLTAGE (A + B)/2
Figure 18. System Differential Voltage at 110kHz
DI
When specifying line length vs maximum data rate the
curve in Figure 19 should be used:
LTC485 • F15
Figure 15. System Common-Mode Voltage at 19.2kHz
10k
1k
RO
DIFFERENTIAL
VOLTAGE A – B
100
10
DI
10k
100k
1M 2.5M
10M
MAXIMUM DATA RATE
LTC485 • F16
LTC485 • F19
Figure 19. Cable Length vs Maximum Data Rate
Figure 16. System Differential Voltage at 19.2kHz
9
LTC485
TYPICAL APPLICATIO S
U
Typical RS485 Network
R
t
R
t
LTC485 • TA03
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
J8 Package
8-Lead Ceramic DIP
0.405
(10.287)
0.005
MAX
(0.127)
MIN
6
5
4
8
7
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
1
2
3
0.200
(5.080)
MAX
0.290 – 0.320
(7.366 – 8.128)
CORNER LEADS OPTION
(4 PLCS)
0.015 – 0.060
(0.381 – 1.524)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.045 – 0.068
(1.143 – 1.727)
0.385 ± 0.025
(9.779 ± 0.635)
0.125
3.175
MIN
0.100 ± 0.010
0.014 – 0.026
(2.540 ± 0.254)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP OR TIN PLATE LEADS.
(0.360 – 0.660)
J8 0293
10
LTC485
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic DIP
0.400
(10.160)
MAX
8
7
6
3
5
4
0.250 ± 0.010
(6.350 ± 0.254)
1
2
0.130 ± 0.005
0.300 – 0.320
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.128)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.025
0.045 ± 0.015
(1.143 ± 0.381)
0.325
–0.015
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
N8 0392
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
7
5
8
6
0.228 – 0.244
0.150 – 0.157
(5.791 – 6.197)
(3.810 – 3.988)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
SO8 0392
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC485
U.S. Area Sales Offices
SOUTHEAST REGION
Linear Technology Corporation
17060 Dallas Parkway
Suite 208
Dallas, TX 75248
Phone: (214) 733-3071
FAX: (214) 380-5138
SOUTHWEST REGION
Linear Technology Corporation
22141 Ventura Blvd.
NORTHEAST REGION
Linear Technology Corporation
One Oxford Valley
2300 E. Lincoln Hwy.,Suite 306
Langhorne, PA 19047
Phone: (215) 757-8578
FAX: (215) 757-5631
Suite 206
Woodland Hills, CA 91364
Phone: (818) 703-0835
FAX: (818) 703-0517
CENTRAL REGION
Linear Technology Corporation
Chesapeake Square
NORTHWEST REGION
Linear Technology Corporation
782 Sycamore Dr.
Linear Technology Corporation
266 Lowell St., Suite B-8
Wilmington, MA 01887
Phone: (508) 658-3881
FAX: (508) 658-2701
229 Mitchell Court, Suite A-25
Addison, IL 60101
Phone: (708) 620-6910
FAX: (708) 620-6977
Milpitas, CA 95035
Phone: (408) 428-2050
FAX: (408) 432-6331
International Sales Offices
FRANCE
KOREA
TAIWAN
Linear Technology S.A.R.L.
Immeuble "Le Quartz"
58 Chemin de la Justice
92290 Chatenay Malabry
France
Linear Technology Korea Branch
Namsong Building, #505
Itaewon-Dong 260-199
Yongsan-Ku, Seoul
Korea
Linear Technology Corporation
Rm. 801, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
Phone: 33-1-41079555
FAX: 33-1-46314613
Phone: 82-2-792-1617
FAX: 82-2-792-1619
UNITED KINGDOM
GERMANY
SINGAPORE
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Phone: 44-276-677676
FAX: 44-276-64851
Linear Techonolgy GMBH
Untere Hauptstr. 9
D-85386 Eching
Germany
Phone: 49-89-3197410
FAX: 49-89-3194821
Linear Technology Pte. Ltd.
101 Boon Keng Road
#02-15 Kallang Ind. Estates
Singapore 1233
Phone: 65-293-5322
FAX: 65-292-0398
JAPAN
Linear Technology KK
5F YZ Bldg.
Iidabashi, Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010
World Headquarters
Linear Technology Corporation
1630 McCarthy Blvd.
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
06/24/93
LT/GP 0294 5K REV E • PRINTED IN THE USA
LINEAR TECHNOLOGY CORPORATION 1994
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
12
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(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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