5962-8979806ZA [ETC]

Controller Miscellaneous - Datasheet Reference ; 控制器杂项 - 数据表参考\n
5962-8979806ZA
型号: 5962-8979806ZA
厂家: ETC    ETC
描述:

Controller Miscellaneous - Datasheet Reference
控制器杂项 - 数据表参考\n

外围集成电路 数据传输 控制器 CD 通信 时钟
文件: 总26页 (文件大小:162K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
REVISIONS  
LTR  
DESCRIPTION  
DATE (YR-MO-DA)  
APPROVED  
A
B
C
Changes made in accordance with NOR 5962-R275-94.  
Changes made in accordance with NOR 5962-R365-97.  
94-09-14  
97-06-19  
98-01-15  
K. A. Cottongim  
K. A. Cottongim  
K. A. Cottongim  
Add device type 03, 04 and CAGE code 88379. Correct note 1 in  
table I.  
D
E
Corrections to tables I and II.  
98-05-14  
02-03-13  
K. A. Cottongim  
Add device types 05 through 07. Add case outlines T and Z. Table I,  
Raymond Monnin  
I
IH and IIL tests with notes 4 and 6, reverse the minimum and  
maximum limits. Table I, IIH for device types 01-04 with note 6 in the  
conditions column, change the minimum limit from -0.2 mA to -0.4  
mA. Update drawing boilerplate.  
F
Paragraph 4.2 Screening: add subparagraphs 4.2.a.3 and 4.2.c for  
device types 05, 06, and 07, only. Table I, device types 05 through  
07, change min/max test limits for VIH, VIL, IIH (3 places), IIL (3  
places), and device types 05 and 06, change max test limits for IEE  
(2 places each).  
02-05-24  
Raymond Monnin  
REV  
SHEET  
REV  
F
F
F
F
F
F
F
21  
F
F
22  
F
F
23  
F
F
24  
F
SHEET  
15  
16  
17  
18  
19  
20  
REV STATUS  
OF SHEETS  
REV  
F
5
F
6
F
7
F
8
F
9
F
F
F
F
F
SHEET  
1
2
3
4
10  
11  
12  
13  
14  
PMIC N/A  
PREPARED BY  
Steve L. Duncan  
DEFENSE SUPPLY CENTER COLUMBUS  
POST OFFICE BOX 3990  
STANDARD  
MICROCIRCUIT  
DRAWING  
CHECKED BY  
Michael C. Jones  
COLUMBUS, OHIO 43216-5000  
http://www.dscc.dla.mil  
APPROVED BY  
Gregory Lude  
THIS DRAWING IS  
AVAILABLE  
FOR USE BY ALL  
DEPARTMENTS  
MICROCIRCUIT, HYBRID, LINEAR, DUAL  
REDUNDANT REMOTE TERMINAL UNIT  
(RTU)  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
DRAWING APPROVAL DATE  
91-11-25  
AMSC N/A  
REVISION LEVEL  
F
SIZE  
A
CAGE CODE  
67268  
5962-89798  
SHEET  
1 OF 24  
DSCC FORM 2233  
APR 97  
5962-E423-02  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  
1. SCOPE  
1.1 Scope. This drawing describes device requirements for class H hybrid microcircuits to be processed in accordance with  
MIL-PRF-38534 and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying  
Number (PIN).  
1.2 PIN. The PIN shall be as shown in the following example:  
5962-89798  
01  
X
X
Drawing number  
Device type  
(see 1.2.1)  
Case outline  
(see 1.2.2)  
Lead finish  
(see 1.2.3)  
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows:  
Device type  
Generic number  
Circuit function  
01  
02  
03  
04  
05  
06  
07  
BUS65142, BUS65144  
BUS65143, BUS65145  
CT2542, CT2542-FP  
CT2543, CT2543-FP  
BU-65142X1  
Dual redundant remote terminal unit (RTU)  
Dual redundant remote terminal unit (RTU)  
Dual redundant remote terminal unit (RTU)  
Dual redundant remote terminal unit (RTU)  
Dual redundant remote terminal unit (RTU), +5/-15 V transceiver  
Dual redundant remote terminal unit (RTU), +5/-12 V transceiver  
Dual redundant remote terminal unit (RTU), +5/+5 V transceiver  
BU-65142X2  
BU-65142X3  
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:  
Outline letter  
Descriptive designator  
Terminals  
Package style  
T
X
Y
Z
See figure 1  
See figure 1  
See figure 1  
See figure 1  
78  
78  
82  
78  
Dual-in-line, ceramic, staggered pins  
Dual-in-line, staggered pins  
Flat pack  
Flat pack  
1.2.3 Lead finish. The lead finish shall be as specified in MIL-PRF-38534.  
1.3 Absolute maximum ratings. 1/  
Logic supply voltage (VL)...........................................................  
Negative supply voltage (VEE) ...................................................  
Storage temperature .................................................................  
Thermal rise, case to junction(TJ)............................................  
Lead temperature (soldering, 10 seconds)................................  
Power dissipation (TC = +125°C)...............................................  
5.5 V dc  
-18.0 V dc  
-65°C to +150°C  
13.9°C  
+300°C  
Duty cycle dependent (see table I power supplies)  
1.4 Recommended operating conditions.  
Logic supply voltage (VL):  
Device types 01 through 04 ...................................................  
Device types 05 through 07 ...................................................  
Negative supply voltage (VEE):  
+4.5 V dc to +5.5 V dc  
+4.75 V dc to +5.25 V dc  
Device types 01, 03, and 05 ..................................................  
Device types 02, 04, and 06 ..................................................  
Maximum differential input voltage .............................................  
Case operating temperature range (TC)......................................  
-14.25 V dc to -15.75 V dc  
-11.4 V dc to -12.6 V dc  
40 Vp-p  
-55°C to +125°C  
1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the  
maximum levels may degrade performance and affect reliability.  
SIZE  
STANDARD  
5962-89798  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
2
DSCC FORM 2234  
APR 97  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a  
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in  
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the  
solicitation.  
SPECIFICATION  
DEPARTMENT OF DEFENSE  
MIL-PRF-38534 - Hybrid Microcircuits, General Specification for.  
STANDARDS  
DEPARTMENT OF DEFENSE  
MIL-STD-883 - Test Method Standard Microcircuits.  
MIL-STD-1553 - Interface Standard for Digital Time Division Command/Response Multiplex Data Bus  
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.  
HANDBOOKS  
DEPARTMENT OF DEFENSE  
MIL-HDBK-103 - List of Standard Microcircuit Drawings.  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization  
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)  
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text  
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a  
specific exemption has been obtained.  
3. REQUIREMENTS  
3.1 Item requirements. The individual item performance requirements for device class H shall be in accordance with  
MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the  
device manufacturer's Quality Management (QM) plan or as designated for the applicable device class. Therefore, the tests  
and inspections herein may not be performed for the applicable device class (see MIL-PRF-38534). Furthermore, the  
manufacturer may take exceptions or use alternate methods to the tests and inspections herein and not perform them.  
However, the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class.  
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified  
in MIL-PRF-38534 and herein.  
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.  
3.2.2 Terminal connections and pin functions. The terminal connections and pin functions shall be as specified on figure 2.  
3.2.3 Block diagram. The block diagram shall be as specified on figure 3.  
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are  
as specified in table I and shall apply over the full specified operating temperature range.  
SIZE  
STANDARD  
5962-89798  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
3
DSCC FORM 2234  
APR 97  
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical  
tests for each subgroup are defined in table I.  
3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked  
with the PIN listed in 1.2 herein. In addition, the manufacturer's vendor similar PIN may also be marked.  
3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described  
herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot  
sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for  
those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer  
and be made available to the preparing activity (DSCC-VA) upon request.  
3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this  
drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturer's product meets  
the performance requirements of MIL-PRF-38534 and herein.  
3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of  
microcircuits delivered to this drawing.  
4. QUALITY ASSURANCE PROVISIONS  
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as  
modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the  
form, fit, or function as described herein.  
4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply:  
a. Burn-in test, method 1015 of MIL-STD-883.  
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level  
control and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit  
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent  
specified in test method 1015 of MIL-STD-883.  
(2) T as specified in accordance with table I of method 1015 of MIL-STD-883.  
A
(3) Burn-in test shall be for 320 hours. (For device types 05, 06, and 07, only.)  
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter  
tests prior to burn-in are optional at the discretion of the manufacturer.  
c. 100% Nondestructive bond pull test. (For device types 05, 06, and 07, only.)  
SIZE  
STANDARD  
5962-89798  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
4
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
Test  
Symbol  
Conditions 1/  
Group A  
subgroups type  
Device  
Limits  
Unit  
-55°C T +125°C  
C
unless otherwise specified  
Min  
4
Max  
Receiver  
Differential input impedance  
Differential input voltage  
Input threshold  
ZIN diff  
VIN diff  
VTH  
DC to 1 MHz 2/  
2/  
1,2,3  
1,2,3  
4,5,6  
All  
All  
All  
kΩ  
40  
Vp-p  
Vp-p  
Direct coupled (across  
1.2  
35load)  
Transformer coupled (across  
0.86  
70load)  
Common mode rejection  
ratio  
CMRR  
CMV  
DC to 2 MHz 2/ 3/  
DC to 2 MHz 2/ 3/  
1,2,3  
1,2,3  
All  
All  
40  
dB  
Common mode voltage  
-10  
+10  
V dc  
Transmitter  
Differential output voltage  
VOUT diff Direct coupled (across  
4,5,6  
All  
All  
6.0  
9.0  
Vp-p  
ns  
35load)  
Transformer coupled (across  
70load)  
18.0  
27.0  
Output rise and fall time  
tr, tf  
Transformer coupled (across  
70load) 10 to 90 percent of  
full waveform peak to peak.  
In accordance with MIL-STD-  
1553.  
9,10,11  
100  
300  
Output noise  
NOUT  
Direct coupled  
4,5,6  
All  
5
mV RMS  
mV RMS  
Transformer coupled 2/ 3/  
14  
Logic  
High level input voltage  
VIH  
VL = 5.5 V  
VL = 5.25 V  
VL = 5.5 V  
VL = 5.25 V  
1,2,3  
1,2,3  
01-04  
05-07  
01-04  
05-07  
2.4  
2.0  
V
V
Low level input voltage  
VIL  
0.7  
0.8  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
5
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol  
Conditions 1/  
Group A  
Device  
Limits  
Unit  
-55°C T +125°C  
subgroups type  
C
unless otherwise specified  
Min  
-0.2  
Max  
Logic - Continued.  
High level input current 4/  
IIH  
VL = 5.5 V, VIH = 2.7 V  
VL = 5.25 V, VIH = 2.7 V  
1,2,3  
1,2,3  
01-04  
-0.04  
-50  
mA  
05-07  
01-04  
-200  
-20  
-0.4  
µA  
µA  
High level input current  
IIH  
VL = 5.5 V,  
IH = 2.7 V  
5/  
+20  
V
6/  
5/  
-0.02  
mA  
VL = 5.25 V,  
IH = 2.7 V  
05-07  
-10  
+10  
-20  
µA  
V
6/  
-160  
µA  
mA  
µA  
µA  
mA  
Low level input current 4/  
Low level input current  
IIL  
VL = 5.5 V, VIL = 0.4 V  
VL = 5.25 V, VIL = 0.4 V  
1,2,3  
1,2,3  
01-04  
05-07  
01-04  
-0.4  
-0.08  
-360  
-20  
-100  
+20  
IIL  
VL = 5.5 V,  
VIL = 0.4 V  
5/  
6/  
5/  
6/  
-0.4  
-0.04  
VL = 5.25 V,  
VIL = 0.4 V  
05-07  
-10  
+10  
-50  
µA  
µA  
V
-250  
High level output voltage  
Low level output voltage 7/  
Low level output voltage 6/  
VOH  
VOL  
VOL  
VL = 4.5 V, IOH = -0.4 mA  
VL = 4.75 V, IOH = -4.0 mA  
VL = 4.5 V, IOL = 2.0 mA  
VL = 4.75 V, IOL = 4.0 mA  
VL = 4.5 V, IOL = 4.0 mA  
VL = 4.75 V, IOL = 4.0 mA  
1,2,3  
1,2,3  
1,2,3  
01-04  
05-07  
01-04  
05-07  
01-04  
05-07  
All  
2.7  
4.0  
0.4  
V
V
0.5  
0.4  
0.5  
Functional test 8/  
7,8  
4
pass/  
fail  
Input capacitance  
CI  
All  
50  
pF  
f = 1 MHz, TA = +25°C,  
see 4.3.1b  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
6
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol  
CIO  
Conditions 1/  
Group A  
Device  
Limits  
Unit  
-55°C T +125°C  
subgroups type  
C
unless otherwise specified  
Min  
Max  
50  
Input/output capacitance 6/  
f = 1 MHz, TA = +25°C,  
see 4.3.1b  
4
All  
pF  
Power supplies.  
+5 V dc current drain  
IL  
VL = 5.5 V dc, inputs = 0 V  
dc, except 12 MHz. Clock  
input active. All outputs open  
1,2,3  
01-04  
05,06  
115  
115  
mA  
VL = 5.25 V dc, inputs = 0 V  
dc, except 12 MHz. Clock  
input active. All outputs open  
+5 V dc current drain  
- idle  
IL  
VL = 5.25 V dc, inputs = 0 V  
dc, except 12 MHz. Clock  
input active. All outputs open  
1,2,3  
1,2,3  
07  
240  
mA  
mA  
- 50% transmit  
- 100% transmit  
472  
705  
-15 V dc current drain  
- idle  
IEE  
VEE = -15.75 V dc  
01,03  
05  
70  
50  
- 50% transmit  
- 100% transmit  
01,03,  
05  
175  
01,03  
05  
270  
300  
-12 V dc current drain 9/  
- idle  
IEE  
VEE = -12.6 V dc  
1,2,3  
02,04  
06  
70  
50  
mA  
- 50% transmit  
- 100% transmit  
02,04,  
06  
185  
02,04  
06  
305  
320  
1/ VEE = -15.0 V for device types 01, 03, and 05. VEE = -12.0 V for device types 02, 04, and 06. VL = +5.0 V,  
unless otherwise specified.  
2/ Parameter shall be tested as part of device characterization and after design and process changes and therefore shall be  
guaranteed to the limits specified in table I.  
3/ Receiver and transmitter parameters are specified with transformer.  
4/ IIH and IIL for input pins BRO ENA, ADDRE, ADDRC, ADDRA, ADDRD, ADDRB, and ADDRP.  
(These inputs have internal pull up resistors connected.)  
5/ IIH and IIL for all input pins other than in notes 4 and 6.  
6/ IO parameters for pins DB0 through DB15.  
7/ VOH for all output pins other than in note 6.  
8/ Functional tests performed to verify functionally to MIL-STD-1553 RTU protocol.  
9/ The dc current drain is only tested at 50% duty cycle with a maximum limit of 130 mA.  
SIZE  
STANDARD  
5962-89798  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
7
DSCC FORM 2234  
APR 97  
Case outline T.  
FIGURE 1. Case outline(s).  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
8
DSCC FORM 2234  
APR 97  
Case outline T - Continued.  
Symbol  
Millimeters  
Inches  
Min  
Max  
Min  
Max  
0.210  
0.020  
1.800  
1.655  
1.505  
2.100  
1.905  
1.805  
A
øb  
D
5.33  
0.51  
0.41  
0.016  
45.72  
42.04  
38.23  
53.34  
48.39  
45.85  
D1  
D2  
E
41.78  
37.97  
1.645  
1.495  
E1  
E2  
e
48.13  
45.59  
1.895  
1.795  
2.54 TYP  
0.100 TYP  
e1  
e2  
L
2.41  
1.14  
6.10  
1.78  
2.67  
1.40  
6.60  
2.03  
0.095  
0.045  
0.240  
0.070  
0.105  
0.055  
0.260  
0.080  
S
S1  
1.91 TYP  
0.075 TYP  
NOTES:  
1. The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of  
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound  
units shall rule.  
FIGURE 1. Case outline(s) - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
9
DSCC FORM 2234  
APR 97  
Case outline X.  
FIGURE 1. Case outline(s) - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
10  
DSCC FORM 2234  
APR 97  
Case outline X - Continued.  
Symbol  
Millimeters  
Inches  
Min  
Max  
Min  
Max  
0.250  
0.023  
1.870  
1.655  
1.505  
2.100  
1.905  
1.805  
A
øb  
D
6.35  
0.58  
0.33  
0.013  
47.50  
42.04  
38.23  
53.34  
48.39  
45.85  
D1  
D2  
E
41.78  
37.97  
1.645  
1.495  
E1  
E2  
e
48.13  
45.59  
1.895  
1.795  
2.54 TYP  
0.100 TYP  
e1  
e2  
L
2.41  
1.14  
6.10  
2.54  
2.67  
1.40  
6.60  
3.05  
0.095  
0.045  
0.240  
0.100  
0.105  
0.055  
0.260  
0.120  
S
S1  
1.91 TYP  
0.075 TYP  
NOTES:  
1. The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of  
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound  
units shall rule.  
2. Pin 1 is indicated by either a contrasting color bead on the bottom or by ESD triangle on top of the case or both.  
FIGURE 1. Case outline(s) - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
11  
DSCC FORM 2234  
APR 97  
Case outline Y.  
Symbol  
Millimeters  
Inches  
Min Max  
Min  
Max  
4.72  
A
A1  
b
0.186  
2.03 REF  
0.080 REF  
0.30  
0.20  
0.46  
0.30  
0.012  
0.008  
1.595  
2.185  
0.018  
0.012  
1.605  
2.195  
c
D
E
40.51  
55.50  
40.77  
55.75  
e
1.27 TYP  
10.16  
2.41 REF  
0.050 TYP  
0.400  
0.095 REF  
L
S1  
NOTES:  
1. The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of  
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound  
units shall rule.  
FIGURE 1. Case outline(s) - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
12  
DSCC FORM 2234  
APR 97  
Case outline Z.  
FIGURE 1. Case outline(s) - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
13  
DSCC FORM 2234  
APR 97  
Case outline Z - Continued.  
Symbol  
Millimeters  
Inches  
Min  
Max  
Min  
Max  
0.210  
0.110  
A
A1  
A2  
A3  
b
5.33  
2.79  
2.29  
0.090  
1.27 TYP  
0.050 TYP  
0.76  
0.41  
0.20  
1.02  
0.51  
0.030  
0.016  
0.008  
0.040  
0.020  
0.012  
1.800  
1.824  
0.012  
2.100  
c
0.30  
D
45.72  
46.33  
0.30  
D1  
D2  
E
53.34  
e
1.27 TYP  
0.050 TYP  
L
25.40  
14.10  
10.29  
0.600  
0.555  
0.405  
L1  
L2  
15.11  
11.30  
0.595  
0.445  
NOTES:  
1. The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of  
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound  
units shall rule.  
FIGURE 1. Case outline(s) - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
14  
DSCC FORM 2234  
APR 97  
All device types  
Terminal number  
Function  
Description  
Case  
Case  
Case  
outline  
Y
outline  
Z
outlines  
T and X  
1
3
5
1
2
3
2
4
6
A9  
A7  
A5  
Latched output of the most significant bit (MSB) in the subaddress  
field of the command word.  
Latched output of the third most significant bit in the subaddress field  
of the command word.  
Latched output of the least significant bit (LSB) in the subaddress  
field of the command word.  
7
4
5
8
DB1  
DB3  
Bidirectional parallel data bus bit 1.  
Bidirectional parallel data bus bit 3.  
Bidirectional parallel data bus bit 5.  
Bidirectional parallel data bus bit 7.  
Bidirectional parallel data bus bit 9.  
Bidirectional parallel data bus bit 11.  
Bidirectional parallel data bus bit 13.  
Bidirectional parallel data bus bit 15 (MSB).  
9
10  
12  
14  
16  
18  
20  
22  
24  
11  
13  
15  
17  
19  
21  
23  
6
DB5  
7
DB7  
8
DB9  
9
DB11  
DB13  
DB15  
BRO ENA  
10  
11  
12  
Broadcast enable - When HIGH, this input allows recognition of an  
RT address of all ones in the command word as a broadcast  
message. When LOW, it prevents response to RT address 31  
unless it was the assigned terminal address.  
25  
27  
29  
31  
13  
14  
15  
16  
26  
28  
30  
32  
ADDRE  
ADDRC  
Input of the MSB of the assigned terminal address.  
Input of the 3rd MSB of the assigned terminal address.  
Input of the 3rd MSB of the assigned terminal address.  
ADDRA  
RTADD ERR  
Output signal used to inform subsystem of an address parity error. If  
LOW, indicates parity error and the RT will not respond to any  
command address to a single terminal. It will still receive broadcast  
commands if BRO ENA is HIGH.  
33  
17  
34  
TXDATAOUT B  
LOW output to the primary side of the coupling transformer that  
connects to the B channel of the 1553 bus.  
See footnotes at end of table.  
FIGURE 2. Terminal connections and pin functions.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
15  
DSCC FORM 2234  
APR 97  
All device types  
Terminal number  
Function  
Description  
Case  
Case  
Case  
outline  
Y
outline  
Z
outlines  
T and X  
35  
37  
39  
18  
19  
20  
36  
38  
40  
N/C  
No connection.  
GND B  
Power supply return connection for the B channel transceiver.  
RXDATAIN B  
Input from the HIGH side of the primary side of the coupling  
transformer that connects to the B channel of the 1553 bus.  
78  
21  
81  
A3  
Multiplexed address line output. When INCMD is LOW, or A5  
through A9 are all zeroes or all ones (mode command), it represents  
the latched output of the 2nd MSB in the word count field of the  
command word. When INCMD is HIGH and A5 through A9 are not  
all zeroes or all ones, it represents the 2nd MSB of the current word  
counter. (See note 1).  
76  
22  
79  
A1  
Multiplexed address line output. When INCMD is LOW, or A5  
through A9 are all zeroes or all ones (mode command), it represents  
the latched output of the 2nd LSB in the word count field of the  
command word. When INCMD is HIGH and A5 through A9 are not  
all zeroes or all ones, it represents the 2nd LSB of the current word  
counter. (See note 1).  
74  
72  
23  
24  
77  
75  
DTGRT  
INCMD  
Data transfer grant - Active LOW input signal from the subsystem  
that informs the RT, when DTREQ is asserted, to start the transfer.  
Once the transfer is started, DTGRT can be removed.  
In command - HIGH level output signal used to inform the subsystem  
that the RT is presently servicing a command. When low, A0-A4  
(see note 1) represent the word count of the present command.  
When high, A0-A4 represent the current word counter of non-mode  
commands.  
70  
68  
25  
26  
73  
71  
HS FAIL  
DTSTR  
Handshake fail - Output signal that goes LOW and stays LOW  
whenever the subsystem fails to supply DTGRT in time to do a  
successful transfer. Cleared by the next NBGT.  
DATA strobe - A LOW level output pulse ( 166 ns ) present in the  
middle of every data word transfer over the parallel data bus. Used  
to latch or strobe the data into memory, FIFOs, registers, etc.  
Recommend using the rising edge to clock data in. (See note 2).  
66  
64  
27  
28  
69  
67  
DAT/CMD  
RT FAIL  
Address line output that is LOW whenever the command word is  
being transferred to the subsystem over the parallel data bus, and is  
HIGH whenever data words are being transferred.  
Remote terminal failure - Latched active LOW output signal to the  
subsystem to flag detection of a remote terminal continuous self-test  
failure. Also set if the watchdog timeout circuit is activated. Cleared  
by the start of the next message transmission (status word) and set if  
problem is again detected.  
See footnotes at end of table.  
FIGURE 2. Terminal connections and pin functions - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
16  
DSCC FORM 2234  
APR 97  
All device types  
Terminal number  
Function  
DTREQ  
Description  
Case  
outline  
Z
Case  
outlines  
T and X  
Case  
outline  
Y
62  
29  
30  
65  
Data transfer request - Active LOW output signal to the subsystem  
indicating that the RT has data for or needs data from the subsystem  
and requests a data transfer over the parallel data bus. Will stay  
LOW until transfer is completed or transfer until transfer is completed  
or transfer timeout has occurred.  
60  
63  
ADBC  
Accept dynamic bus control - Active LOW input signal from  
subsystem used to set the dynamic bus control acceptance bit in the  
status register if the command word was a valid, legal mode  
command for dynamic bus control.  
58  
56  
54  
31  
32  
33  
61  
59  
57  
TEST 2  
A10  
Factory test point - DO NOT USE. (See note 3).  
Latched output of the T/R bit in the command word.  
ILL CMD(ME)  
Illegal command - Active LOW input signal from the subsystem,  
strobed in on the rising edge of INCMD. Used to define the  
command word as illegal and to set the message error bit in the  
status register.  
52  
34  
55  
SS REQ  
BITEN  
Subsystem service request - Input from the subsystem used to  
control the service request bit in the status register. If LOW when  
the status word is updated, the service request bit will be set; if  
HIGH, it will be cleared.  
50  
48  
35  
36  
53  
51  
Built-in-test word enable - LOW level output pulse ( 500 ns ), present  
when the built-in-test word is enabled on the parallel data bus.  
(See note 4).  
RXDATAIN A  
VLA  
Input from the LOW side of the primary side of the coupling  
transformer that connects to the A channel of the 1553 bus.  
46  
44  
37  
38  
49  
47  
+5 volt input power supply connection for the A channel transceiver.  
VEEA  
-15 / -12 volt input power supply connection for the A channel  
transceiver. (See note 7).  
42  
40  
39  
40  
45  
43  
TXDATAOUT A  
NBGT  
HIGH output to the primary side of the coupling transformer that  
connects to the A channel of the 1553 bus.  
New bus grant - LOW level output pulse ( 166 ns ) used to indicate  
the start of a new protocol sequence in response to the command  
word just received. (See note 2).  
2
41  
3
A8  
Latched output of the 2nd MSB in the subaddress field of the  
command word.  
See footnotes at end of table.  
FIGURE 2. Terminal connections and pin functions - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
17  
DSCC FORM 2234  
APR 97  
All device types  
Terminal number  
Function  
A6  
Description  
Case  
outline  
Z
Case  
outlines  
T and X  
Case  
outline  
Y
4
42  
5
Latched output of the 2nd LSB in the subaddress field of the  
command word.  
6
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
7
DB0  
DB2  
Bidirectional parallel data bus bit 0 (LSB).  
Bidirectional parallel data bus bit 2.  
8
9
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
DB4  
Bidirectional parallel data bus bit 4.  
DB6  
Bidirectional parallel data bus bit 6.  
DB8  
Bidirectional parallel data bus bit 8.  
DB10  
DB12  
DB14  
VL  
Bidirectional parallel data bus bit 10.  
Bidirectional parallel data bus bit 12.  
Bidirectional parallel data bus bit 14.  
+5 volt input power supply connection for RTU digital logic section.  
Power supply return for RTU digital logic section.  
Input of the 2nd MSB of the assigned terminal address.  
Input of the 2nd LSB of the assigned terminal address.  
GND  
ADDRD  
ADDRB  
ADDRP  
Input of address parity bit. The combination of assigned terminal  
address and ADDRP must be odd parity for the RT to work.  
32  
34  
56  
57  
33  
35  
TXDATAOUT B  
HIGH, output to the primary side of the coupling transformer that  
connects to the B channel of the 1553 bus.  
VEEB  
-15 / -12 volt input power supply connection for the B channel  
transceiver. (See note 7).  
36  
38  
58  
59  
37  
39  
VLB  
+5 volt input power supply connection for the B channel transceiver.  
RXDATAIN B  
Input from the LOW side of primary side of the coupling transformer  
that connects to the B channel of the 1553 bus.  
See footnotes at end of table.  
FIGURE 2. Terminal connections and pin functions - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
18  
DSCC FORM 2234  
APR 97  
All device types  
Terminal number  
Function  
A2  
Description  
Case  
outline  
Z
Case  
outlines  
T and X  
Case  
outline  
Y
77  
75  
73  
60  
61  
62  
80  
78  
76  
Multiplexed address line output. When INCMD is LOW, or A5  
through A9 are all zeroes or all ones (mode command), it represents  
the latched output of the 3rd MSB in the word count field of the  
command word. When INCMD is HIGH and A5 through A9 are not  
all zeroes or all ones, it represents the 3rd MSB of the current word  
counter. (See note 1).  
A0  
Multiplexed address line output. When INCMD is LOW, or A5  
through A9 are all zeroes or all ones (mode command), it represents  
the latched output of the LSB in the word count field of the  
command. When INCMD is HIGH and A5 through A9 are not all  
zeroes or all ones, it represents the LSB of the current word counter.  
(See note 1).  
DTACK  
Data transfer acknowledge - Active LOW output signal during data  
transfers to or from the subsystem indicating the RTU has received  
the DTGRT in response to DTREQ and is presently doing the  
transfer. Can be connected directly to pin 63 on case Z, pins 67 on  
cases T and X or pin 66 on case Y (BUF ENA) for control of 3-state  
data buffers; and to 3-state address buffer control lines, if they are  
used.  
71  
63  
74  
A4  
Multiplexed address line output. When INCMD is LOW or A5  
through A9 are all zeroes or all ones (mode command), it represents  
the latched output of the MSB in the word count field of the  
command word. When INCMD is HIGH and A5 through A9 are not  
all zeroes or all ones, it represents the MSB of the current word  
counter. (See note 1).  
69  
67  
64  
65  
72  
70  
R/W  
Read/Write - Output signal that controls the direction of the internal  
data bus buffers. Normally, the signal is LOW and the buffers drive  
the data bus. When data is needed from the subsystem, it goes  
HIGH to turn the buffers around and the RT now appears as an  
input. The signal is HIGH only when DTREQ is active (LOW).  
GBR  
Good block received - LOW level output pulse ( 500 ns ) used to flag  
the subsystem that a valid, legal, non-mode receive command with  
the correct number of data words has been received without a  
message error and successfully transferred to the subsystem.  
(See note 4).  
65  
63  
66  
67  
68  
66  
16 MHz  
16 MHz clock input - Input for the master clock used to run RTU  
circuits.  
BUF ENA  
Buffer enable - Input used to enable or 3-state the internal data bus  
buffers when they are driving the bus. When LOW, the data bus  
buffers are enabled. Could be connected to DTACK (pin 73 case Z),  
(pin 62, cases T and X), (pin 76, case Y) if RT is sharing the same  
data bus as the subsystem. (See note 5).  
See footnotes at end of table.  
FIGURE 2. Terminal connections and pin functions - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
19  
DSCC FORM 2234  
APR 97  
All device types  
Terminal number  
Function  
Description  
Case  
Case  
Case  
outline  
Y
outline  
Z
outlines  
T and X  
61  
59  
68  
69  
64  
62  
RESET  
Input resets entire RT when LOW.  
RT FLAG  
Remote terminal flag - Input signal used to control the terminal flag  
bit in the status register. If LOW when the status word is updated,  
the terminal flag bit would be set; if HIGH, it would be cleared.  
Normally connected to RTFAIL (pin 64, case Z), (pin 28, cases T  
and X),( pin 67, case Y).  
57  
55  
70  
71  
60  
58  
TEST 1  
Factory test point - DO NOT USE. (See note 6).  
SS BUSY  
Subsystem busy - Input from the subsystem used to control the busy  
bit in the status register. If LOW when the status word is updated,  
the busy bit will be set; if HIGH, it will be cleared. If the busy bit is  
set in the status register, no data will be requested from the  
subsystem in response to a transmit command. On receive  
commands, data will still be transferred to subsystem.  
53  
72  
56  
SS FLAG  
Subsystem flag - Input from the subsystem used to control the  
subsystem flag bit in the status register. If LOW when the status  
word is updated, the subsystem flag will be set; if HIGH, it will be  
cleared.  
51  
49  
73  
74  
54  
52  
MESS ERR  
Message error - Output signal that goes LOW and stays low  
whenever there is a format or word error with the received message  
over the 1553 data bus. Cleared by the next NBGT.  
RXDATAIN A  
Input from the HIGH side of the primary side of the coupling  
transformer that contacts to the A channel of the 1553 bus.  
47  
45  
43  
75  
76  
77  
50  
48  
46  
GND A  
N/C  
Power supply return connection for the A channel transceiver.  
No connection. (See note 8).  
TXDATAOUT A  
LOW output to the primary side of the coupling transformer that  
connects to the A channel of the 1553 bus.  
41  
78  
44  
STATEN  
Status word enable - LOW level active output signal present when  
the status word is enabled on the parallel data bus.  
See footnotes are on next sheet.  
FIGURE 2. Terminal connections and pin functions - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
20  
DSCC FORM 2234  
APR 97  
NOTES:  
1. Device types 03 and 04:  
When INCMD is LOW during the DTSTR immediately following NBGT, A0 through A4 are valid and equal to WC0  
through WC4 of the received command word. The remaining time while INCMD is LOW and A5 through A9 are  
not all zeros or ones (i.e. MODE), A0 through A4 are equal to the last current word count plus one. When INCMD  
is HIGH and A5 through A9 are not MODE, A0 through A4 represent the current word counter. If A5 through A9  
are equal to MODE, A0 through A4 are equal to WC0 through WC4 of the received command word, independent  
of the state of INCMD.  
2. Device type 03 and 04, pulse width is typically 125 ns.  
3. Pin 58 for case T, pin 31 for cases X and Z, and pin 61 for case Y - (TEST 2) factory test point output: This pin  
provides the output of the device BIT comparison output. It indicates the loop test results for every word transmitted  
by the device. A test can be performed by actuating the RTU to transmit while the test fixture opens the receiver  
lines to force an error condition. A logic 1 (high) indicates the loop test passed. Normally this pin is left open. For  
device types 03 and 04, (TEST 2) is not implemented and should be left open.  
4. Device type 03 and 04, pulse width is typically 375 ns.  
5. Pin 63 for case T, pin 67 for cases X and Z, and pin 66 for case Y - BUF ENA: This pin is typically tied to DTACK,  
causing the device to drive the shared data bus only while DTACK is active. If desired BUF ENA can be gounded.  
The data will remain latched on the data bus pins for 18 µs from DTSRB and 3.5 µs, (device types 03 and 04 are 19  
µs and 4 µs, respectively) for the last word of a message as the devices status word or BIT word is transferred to the  
BC (STATEN or BITEN low). Once the STATUS or BIT word transfer is complete, the data bus will automatically  
again contain the last data word. The device will automatically switch the direction of the internal buffers during a  
transmit operation.  
6. Pin 57 for case T, pin 70 for cases X and Z, and pin 60 for case Y - (TEST 1) factory test point: This test allows the  
user to force the active channel to transmit indefinitely, in order to test the built-in watchdog timer feature of the  
device. When this pin is grounded and the active channel is stimulated with a valid transmit command, the device  
will respond with a status word and contiguous data (last data word loaded or STATUS WORD if none is loaded) until  
the built-in timeout occurs. Normally this pin is left open or an optional pull-up can be used. For device types 03 and  
04, (TEST 1) is not implemented and should be left open.  
7. For device type 07, VEEA and VEEB are not connected.  
8. For case Y, pins 1, 41, 42, and 82 are no connections.  
FIGURE 2. Terminal connections and pin functions - Continued.  
SIZE  
STANDARD  
5962-89798  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
21  
DSCC FORM 2234  
APR 97  
FIGURE 3. Block diagram.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
22  
DSCC FORM 2234  
APR 97  
TABLE II. Electrical test requirements.  
MIL-PRF-38534 test requirements  
Subgroups  
(in accordance with  
MIL-PRF-38534, group A  
test table)  
Interim electrical parameters  
Final electrical parameters  
Group A test requirements  
1,4,9  
1*,2,3,4,5,6,7,8,9,10,11  
1,2,3,4,5,6,7,8,9,10,11  
1,2,3  
Group C end-point electrical  
parameters  
End-point electrical parameters  
for radiation hardness assurance  
(RHA) devices  
Not applicable  
* PDA applies to subgroup 1.  
4.3 Conformance and periodic inspections. Conformance inspection (CI) and periodic inspection (PI) shall be in accordance  
with MIL-PRF-38534 and as specified herein.  
4.3.1 Group A inspection (CI). Group A inspection shall be in accordance with MIL-PRF-38534 and as follows:  
a. Tests shall be as specified in table II herein.  
b. Subgroup 4 (CI and CIO measurement) shall be measured only for the initial test and after process or design changes  
which may affect input and output capacitance.  
4.3.2 Group B inspection (PI). Group B inspection shall be in accordance with MIL-PRF-38534.  
4.3.3 Group C inspection (PI). Group C inspection shall be in accordance with MIL-PRF-38534 and as follows:  
a. End-point electrical parameters shall be as specified in table II herein.  
b. Steady-state life test, method 1005 of MIL-STD-883.  
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level  
control and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit  
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent  
specified in test method 1005 of MIL-STD-883.  
(2) T as specified in accordance with table I of method 1005 of MIL-STD-883.  
A
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.  
4.3.4 Group D inspection (PI). Group D inspection shall be in accordance with MIL-PRF-38534.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89798  
A
REVISION LEVEL  
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
F
23  
COLUMBUS, OHIO 43216-5000  
DSCC FORM 2234  
APR 97  
4.3.5 Radiation Hardness Assurance (RHA) inspection. RHA inspection is not currently applicable to this drawing.  
5. PACKAGING  
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38534.  
6. NOTES  
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications  
(original equipment), design applications, and logistics purposes.  
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-  
prepared specification or drawing.  
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for  
the individual documents. This coordination will be accomplished in accordance with MIL-PRF-38534.  
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus when a system application  
requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for  
coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962)  
should contact DSCC-VA, telephone (614) 692-0544.  
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Post Office Box 3990, Columbus, Ohio 43216-  
5000, or telephone (614) 692-0536.  
6.6 Sources of supply. Sources of supply are listed in MIL-HDBK-103 and QML-38534. The vendors listed in MIL-HDBK-  
103 and QML-38534 have submitted a certificate of compliance (see 3.7 herein) to DSCC-VA and have agreed to this drawing.  
SIZE  
STANDARD  
5962-89798  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
F
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
24  
DSCC FORM 2234  
APR 97  
STANDARD MICROCIRCUIT DRAWING BULLETIN  
DATE: 02-05-24  
Approved sources of supply for SMD 5962-89798 are listed below for immediate acquisition information only and  
shall be added to MIL-HDBK-103 and QML-38534 during the next revisions. MIL-HDBK-103 and QML-38534 will be  
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a  
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next  
dated revisions of MIL-HDBK-103 and QML-38534.  
Standard  
microcircuit drawing  
PIN 1/  
Vendor  
CAGE  
number  
Vendor  
similar  
PIN 2/  
5962-8979801XA  
5962-8979801XA  
5962-8979801XA  
5962-8979801XC  
5962-8979801XC  
5962-8979801XC  
19645  
19645  
19645  
19645  
19645  
19645  
BUS-65142-607  
BUS-65142-150  
BUS-65142-140  
BUS-65142-604  
BUS-65142-130  
BUS-65142-110  
5962-8979801YA  
5962-8979801YA  
5962-8979801YC  
5962-8979801YC  
19645  
19645  
19645  
19645  
BUS-65144-150  
BUS-65144-140  
BUS-65144-130  
BUS-65144-110  
5962-8979802XC  
5962-8979802XC  
5962-8979802YA  
5962-8979802YA  
5962-8979802YC  
5962-8979802YC  
19645  
19645  
19645  
19645  
19645  
19645  
BUS-65143-130  
BUS-65143-110  
BUS-65145-150  
BUS-65145-140  
BUS-65145-130  
BUS-65145-110  
5962-8979803XA  
5962-8979803XC  
5962-8979803YA  
5962-8979803YC  
88379  
88379  
88379  
88379  
CT2542  
CT2542  
CT2542-FP  
CT2542-FP  
5962-8979804XA  
5962-8979804XC  
5962-8979804YA  
5962-8979804YC  
88379  
88379  
88379  
88379  
CT2543  
CT2543  
CT2543-FP  
CT2543-FP  
5962-8979805TA  
5962-8979805TA  
5962-8979805TC  
5962-8979805TC  
5962-8979805ZA  
5962-8979805ZA  
5962-8979805ZC  
5962-8979805ZC  
19645  
19645  
19645  
19645  
19645  
19645  
19645  
19645  
BU-65142D1-150  
BU-65142D1-140  
BU-65142D1-130  
BU-65142D1-110  
BU-65142F1-150  
BU-65142F1-140  
BU-65142F1-130  
BU-65142F1-110  
See footnotes at end of table.  
1 of 2  
STANDARD MICROCIRCUIT DRAWING BULLETIN - Continued.  
DATE: 02-05-24  
Standard  
microcircuit drawing  
PIN 1/  
Vendor  
CAGE  
number  
Vendor  
similar  
PIN 2/  
5962-8979806TA  
5962-8979806TA  
5962-8979806TC  
5962-8979806TC  
5962-8979806ZA  
5962-8979806ZA  
5962-8979806ZC  
5962-8979806ZC  
19645  
19645  
19645  
19645  
19645  
19645  
19645  
19645  
BU-65142D2-150  
BU-65142D2-140  
BU-65142D2-130  
BU-65142D2-110  
BU-65142F2-150  
BU-65142F2-140  
BU-65142F2-130  
BU-65142F2-110  
5962-8979807TA  
5962-8979807TA  
5962-8979807TC  
5962-8979807TC  
5962-8979807ZA  
5962-8979807ZA  
5962-8979807ZC  
5962-8979807ZC  
19645  
19645  
19645  
19645  
19645  
19645  
19645  
19645  
BU-65142D3-150  
BU-65142D3-140  
BU-65142D3-130  
BU-65142D3-110  
BU-65142F3-150  
BU-65142F3-140  
BU-65142F3-130  
BU-65142F3-110  
1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the  
manufacturer listed for that part. If the desired lead finish is not listed contact the Vendor to determine its  
availability.  
2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the  
performance requirements of this drawing.  
Vendor CAGE  
number  
Vendor name  
and address  
19645  
Data Device Corporation  
105 Wilbur Place  
Bohemia, NY 11716-2482  
88379  
Aeroflex Laboratories, Incorporated  
35 South Service Road  
Plainview, NY 11803-4193  
The information contained herein is disseminated for convenience only and the  
Government assumes no liability whatsoever for any inaccuracies in the  
information bulletin.  
2 of 2  

相关型号:

5962-8979806ZC

Controller Miscellaneous - Datasheet Reference
ETC

5962-8979807TA

Controller Miscellaneous - Datasheet Reference
ETC

5962-8979807TC

Controller Miscellaneous - Datasheet Reference
ETC

5962-8979807ZA

Controller Miscellaneous - Datasheet Reference
ETC

5962-8979807ZC

Controller Miscellaneous - Datasheet Reference
ETC

5962-8979901XX

Transceiver
ETC

5962-8979902XX

Transceiver
ETC

5962-89801012A

Quad Matched 741-Type Operational Amplifiers
ADI

5962-89801012X

Voltage-Feedback Operational Amplifier
ETC

5962-8980101CA

Quad Matched 741-Type Operational Amplifiers
ADI

5962-8980101CX

Voltage-Feedback Operational Amplifier
ETC

5962-8980101VCA

Operational Amplifier
ETC