5962-9074701MSX [ETC]
Octal D-Type Flip-Flop ; 八D型触发器\n
| 型号： | 5962-9074701MSX |
| 厂家： | 
ETC |
| 描述： | Octal D-Type Flip-Flop
|
| 文件： | 总15页 (文件大小：520K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REVISIONS
LTR
A
DESCRIPTION
Drawing updated to reflect current requirements. - lgt
DATE (YR-MO-DA)
02-04-18
APPROVED
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
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A
9
A
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PREPARED BY
Dan Wonnell
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
CHECKED BY
Sandra Rooney
STANDARD
MICROCIRCUIT
DRAWING
http://www.dscc.dla.mil
APPROVED BY
Michael A. Frye
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
MICROCIRCUIT, LINEAR, CMOS, 16-BIT,
20 KHz, A/D CONVERTER, MONOLITHIC
SILICON
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
92-12-16
AMSC N/A
REVISION LEVEL
A
SIZE
A
CAGE CODE
5962-91692
67268
SHEET
1
OF
14
DSCC FORM 2233
APR 97
5962-E355-02
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
91692
01
M
X
X
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
Circuit function
Linearity error
01
02
SEI5102A-S
SEI5102A-T
16-bit, 20 kHz analog to digital converter
16-bit, 20 kHz analog to digital converter
±3.0 LSB
±2.0 LSB
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-
JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
Terminals
Package style
X
3
GDIP1-T28 or CDIP2-T28
CQCC1-N28
28
28
Dual-in-line
Square leadless chip carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
SIZE
STANDARD
5962-91692
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
A
SHEET
2
DSCC FORM 2234
APR 97
1.3 Absolute maximum ratings. 1/ 2/
Positive digital supply (+VD) voltage range...........................................-0.3 V dc to +6.0 V dc 3/
Negative digital supply (-VD) voltage range ..........................................+0.3 V dc to -6.0 V dc
Positive analog supply (+VA) voltage range..........................................-0.3 V dc to +6.0 V dc
Negative analog supply (-VA) voltage range.........................................+0.3 V dc to -6.0 V dc
Input current, any pin except supplies ..................................................±10 mA 4/
Analog input voltage (AIN and VREF pins)...........................................(-VA) – 0.3 V dc to (+VA) + 0.3 V dc
Digital input voltage ..............................................................................-0.3 V dc to (+VA) + 0.3 V dc
Storage temperature range...................................................................-65°C to +150°C
Lead temperature (soldering, 10 seconds)...........................................+260°C
Junction temperature (TJ).....................................................................+160°C
Power dissipation (PD)..........................................................................72 mW
Thermal resistance, junction-to-case (θJC) ...........................................See MIL-STD-1835
Thermal resistance, junction-to-ambient (θJA
)
Case J...............................................................................................40°C/W
Case 3...............................................................................................60°C/W
1.4 Recommended operating conditions. 1/
Ambient operating temperature range (TA)...........................................-55°C to +125°C
Positive digital supply voltage (+VD) .....................................................+4.50 V dc to +VA
Negative digital supply voltage (-VD).....................................................-4.50 V dc to -5.50 V dc
Positive analog supply voltage (+VA)....................................................+4.50 V dc to +5.50 V dc
Negative analog supply voltage (-VA) ...................................................-4.50 V dc to -5.50 V dc
Analog reference voltage (VREF).........................................................+2.50 V dc to (+VA) -0.5 V dc
Analog input voltage range:
Unipolar.............................................................................................AGND V dc to VREF
Bipolar...............................................................................................-VREF to VREF
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883
-
Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
1/
2/
All voltages referenced to AGND and DGND tied together.
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended
operation at the maximum levels may degrade performance and affect reliability.
In addition, +VD must not be greater than (+VA) + 0.3 V dc.
3/
4/
Transient currents of up to 100 mA will not cause latch-up.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-91692
A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
A
SHEET
3
DSCC FORM 2234
APR 97
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Block diagram. The block diagram shall be as specified on figure 2.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
SIZE
STANDARD
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A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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REVISION LEVEL
A
SHEET
4
DSCC FORM 2234
APR 97
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 81 (see MIL-PRF-38535, appendix A).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be
in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015.
(2) TA = +125°C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein.
4.2.2 Additional criteria for device classes Q and V.
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b. Interim and final electrical test parameters shall be as specified in table II herein.
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
SIZE
STANDARD
5962-91692
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
A
SHEET
5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Conditions
1/
-55°C ≤ TA ≤+125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
Bits
Test
Symbol
RES
Min Max
Resolution for which no
missing codes is
guaranteed
2/
1, 2, 3
All
16
Integral linearity error
INL
2/
2/
1, 2, 3
1, 2, 3
01
02
01
02
All
01
02
All
01
02
All
01
LSB
LSB
±3.0
±2.0
±5.0
±3.0
±4.0
±5.0
±3.0
±4.0
±5.0
±3.0
±4.0
±5.0
Full-scale error
FSE
Full-scale error drift
Unipolar offset error
2/ 3/ 4/
2/
2, 3
LSB
LSB
∆FSE/∆t
VOFF
1, 2, 3
Unipolar offset error drift
Bipolar offset error
2/ 3/ 4/
2/
2, 3
LSB
LSB
∆VOFF/∆t
BOFF
1, 2, 3
Bipolar offset error drift
2/ 3/ 4/
2/
2, 3
LSB
LSB
∆BOFF/∆t
Bipolar negative full-scale
error
BNFSE
1, 2, 3
02
All
±3.0
±4.0
Bipolar negative full-scale
error drift
Digital input voltage
2/ 3/ 4/
5/ 6/ 7/
2, 3
LSB
V
∆BNFSE/∆t
1, 2, 3
All
2.0
VIH
VIL
IIN
0.8
±10
0.4
Digital input current
Digital output voltage
5/ 6/
1, 2, 3
1, 2, 3
All
All
µA
5/ 6/
Logic “0”,
V
VOL
I
SINK = -1.6 mA
5/ 6/
Logic “1”,
+VD
-1.0
VOH
I
SOURCE = 100 µA
Positive analog supply
current
Negative analog supply
current
Positive digital supply
current
Negative digital supply
current
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
4
All
All
All
All
All
3.5
-3.5
3.5
mA
mA
mA
mA
pF
IA+
IA-
2/ 6/ 8/ +VA = 5.5 V dc
2/ 6/ 8/ -VA = -5.5 V dc
2/ 6/ 8/ +VD = 5.5 V dc
2/ 6/ 8/ -VD = -5.5 V dc
2/ 3/ Unipolar mode
ID+
ID-
-2.5
425
Analog input
CIN
capacitance in fine
charge mode
2/ 3/ Bipolar mode
265
See footnotes at end of table.
SIZE
STANDARD
5962-91692
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
A
SHEET
6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics – Continued.
Conditions
1/
-55°C ≤ TA ≤+125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
dB
Test
Symbol
Min Max
Peak harmonic or
spurious noise
S/PN
2/
2/
4, 5, 6
4, 5, 6
01
94
02
01
02
All
All
All
All
98
87
90
Signal to noise ratio
S/(N+D)
dB
Acquisition time
Conversion time
Throughput
2/ 3/ 9/
9
9.375
40.63
tACQ
tC
µs
µs
2/ 6/
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
2/ 6/
20
kHz
ns
ftp
3/ 5/ 10/ (see figure 3)
150
tRST
tDFSH4
RST pulse width
CH1/ 2 edge to TRK1,
TRK2 , falling
5/ 6/ 10/ 11/
(see figure 4a)
All
ns
68 tclk
+260
5/ 6/ 10/ 12/
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
All
All
All
All
All
All
All
All
All
All
All
All
All
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tDFSH1
tHOLD
tDHLRI
tHCF
66 tclk 68 tclk
+260
HOLD to TRK1, TRK2 ,
falling
(see figure 4b)
5/ 6/ 10/ 12/
1 tclk 63 tclk
+20
HOLD pulse width
(see figure 5)
5/ 6/ 10/ 12/
15
64 tclk
HOLD to CH1/ 2 edge
(see figure 5)
5/ 6/ 10/ 12/
95
1 tclk
+10
HOLD falling to CLKIN
falling
(see figure 6)
SCLK input pulse
period
5/ 6/ 10/ (see figure 7a)
PDT and RBT modes
5/ 6/ 10/ (see figure 7)
PDT and RBT modes
5/ 6/ 10/ (see figure 7)
PDT and RBT modes
5/ 6/ 10/ (see figures 7
and 8) PDT and RBT modes
5/ 6/ 10/ (see figure 8b)
FRN and SSC modes
5/ 6/ 10/ (see figure 7b)
FRN and SSC modes
5/ 6/ 10/ (see figure 7b)
FRN and SSC modes
5/ 6/ 10/ (see figure 7b)
FRN and SSC modes
5/ 6/ 10/ (see figure 8a)
PDT mode
200
50
tSCLK
tSCLKL
tSCLKH
tDSS
SCLK input pulse width
low
SCLK input pulse width
high
50
SCLK input falling to
SDATA valid
150
SDATA valid before
rising SCLK
tSS
2 tclk
-100
2 tclk
-100
SDATA valid after
rising SCLK
tSH
Last rising SCLK to
SDL rising
tRSDL
tHFS
2 tclk
+200
8 tclk
+200
230
HOLD falling to 1st
falling SCLK
6 tclk
tDHS
HOLD falling to SDATA
valid
See footnotes at end of table.
SIZE
STANDARD
5962-91692
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
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SHEET
7
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics – Continued.
Conditions
1/
-55°C ≤ TA ≤+125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
Test
Symbol
Min Max
125
5/ 6/ 10/ 13/
9, 10, 11
9, 10, 11
All
All
ns
tDTS
tCLK
TRK1, TRK2 falling to
SDATA valid
(see figure 8b)
CLKIN period
3/ 5/ 6/ 10/ 14/
(see figure 6)
0.5
10
µs
CLKIN low time
CLKIN high time
5/ 6/ 10/ (see figure 6)
5/ 6/ 10/ (see figure 6)
9, 10, 11
9, 10, 11
All
All
200
200
ns
ns
tCLKL
tCLKH
1/ The limiting terms “min” (minimum) and “max” (maximum) shall be considered to apply to magnitudes only.
Negative current shall be defined as conventional current flow out of a device terminal.
2/
Unless otherwise specified, +VA, +VD = +5.0 V dc; -VA, -VD = -5.0 V dc; VREF = +4.5 V dc; CLKIN = 1.6
MHz; fs = 20 kHz; bipolar mode; FRN mode; AIN1 and AIN2 tied together; each channel tested separately;
analog source impedance = 50 Ω with 1000 pF to AGND; 200 Hz full scale input sine wave; error tests are
done after calibration at the temperature of interest; logic “0” inputs are 0 V dc; logic “1” inputs are +VD.
3/ This parameter shall be measured only for initial characterization and after process or design changes
which may affect this parameter.
4/
5/
6/
7/
8/
Total drift over -55°C to +125°C since calibration at power-up at +25°C .
+VA, +VD = +5.0 V dc ±10 percent; -VA, -VD = -5.0 V dc ±10 percent.
This parameter is guaranteed, if not tested, at TA = +25°C. This parameter is tested at TA = -55°C to +125°C.
Guaranteed at VIH = 2.0 V dc, VIL = 0.8 V dc. Tested at VIH = +VD, VIL = 0 V dc.
All outputs unloaded; inputs: Logic “0” = 0 V dc, Logic “1” = +VD.
9/ Acquisition time is the time allowed by the converter for acquisition of the input voltage prior to conversion.
10/
Inputs: Logic “0” = 0 V dc, Logic “1” = +VD; CL = 50 pF.
11/ These times are for FRN mode.
12/ These times are for SSC, PDT and RBT mode.
13/
Only valid for TRK1, TRK2 falling when SCLK is low. If SCLK is high when TRK1, TRK2 falls, then SDATA
is valid tDSS time after the next falling clock.
14/
Clock speeds of less than 1.6 MHz, at temperatures > +100°C, will degrade DNL performance. Minimum
CLKIN period is 0.625 µs in FRN mode (20 kHz sample rate).
SIZE
STANDARD
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A
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REVISION LEVEL
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DSCC FORM 2234
APR 97
Device type
01 and 02
X, 3
Case outline
Terminal number
Terminal symbol
-VD
1
2
RST
3
CLKIN
4
XOUT
5
STBY
6
DGND
7
+VD
8
TRK1
TRK2
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CRS/FIN
SSH/SDL
HOLD
CH1/ 2
SCLK
SDATA
CODE
BP/UP
OUTMOD
AIN1
VREF
REFBUF
AGND
-VA
AIN2
+VA
TEST
SCKMOD
SLEEP
FIGURE 1. Terminal connections.
SIZE
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DSCC FORM 2234
APR 97
FIGURE 2. Block diagram.
SIZE
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APR 97
FIGURE 3. Reset timing.
FIGURE 4. Control output timing.
FIGURE 5. Channel selection timing.
FIGURE 6. Start conversion timing.
NOTE: All measurements taken at 50 percent of the rise and fall edges.
SIZE
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APR 97
FIGURE 7. Serial data timing.
FIGURE 8. Data transmission timing.
NOTE: All measurements taken at 50 percent of the rise and fall edges.
SIZE
STANDARD
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DSCC FORM 2234
APR 97
TABLE II. Electrical test requirements.
Test requirements
Subgroups
Subgroups
(in accordance with
(in accordance with
MIL-STD-883, method
5005, table I)
MIL-PRF-38535, table III)
Device
class M
1, 4
Device
class Q
1, 4
Device
class V
1, 4
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
1/ 1, 2, 3, 4, 5, 6, 10, 1/
11
1, 2, 3, 4, 5,
6, 10, 11
1/
2/
1, 2, 3, 4, 5, 6,
10, 11
2/
1, 2, 3, 4, 5, 6, 9,
10, 11
2/
1, 2, 3, 4, 5,
6, 9, 10, 11
1, 2, 3, 4, 5, 6, 9,
10, 11
1, 4, 9
1, 4, 9
-------
1, 4, 9
1, 4, 9
-------
1, 2, 3, 4, 5, 6, 9, 10,
11
1, 4, 9
-------
1/ PDA applies to subgroup 1.
2/ Subgroup 9 will be guaranteed if not tested.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and
shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
b. TA = +125°C, minimum.
b. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
SIZE
STANDARD
5962-91692
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
A
SHEET
13
DSCC FORM 2234
APR 97
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a. End-point electrical parameters shall be as specified in table II herein.
b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All
device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C
±5°C, after exposure, to the subgroups specified in table II herein.
c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
SIZE
STANDARD
5962-91692
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
A
SHEET
14
DSCC FORM 2234
APR 97
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 02-04-18
Approved sources of supply for SMD 5962-91692 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
68911
68911
68911
68911
Vendor
similar
PIN 2/
5962-9169201MXA
5962-9169201M3A
5962-9169202MXA
5962-9169202M3A
SEI5102A-SDB
SEI5102A-SEB
SEI5102A-TDB
SEI5102A-TEB
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
Vendor name
and address
68911
Maxwell Technologies Electronics
Components Group, Inc.
9244 Balboa Ave.
San Diego, CA 92123
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
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