74HCT1G04GW/T1 [ETC]
IC-SM-CMOS LOGIC ; IC- SM- CMOS逻辑\n
| 型号： | 74HCT1G04GW/T1 |
| 厂家： | 
ETC |
| 描述： | IC-SM-CMOS LOGIC
|
| 文件： | 总12页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74HC1G04; 74HCT1G04
Inverter
1998 Aug 31
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
FEATURES
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns.
• Wide operating voltage:
2.0 to 6.0 V
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
• Symmetrical output impedance
• High noise immunity
HC1G HCT1G
tPHL, tPLH propagation delay
inA to outY
CL = 15 pF;
VCC = 5 V
7
8
ns
• Low power dissipation
• Balanced propagation delays
• Very small 5 pins package
• Output capability: standard.
CI
input capacitance
1.5
notes 1 and 2 16
1.5
18
pF
pF
CPD
power dissipation
capacitance
Notes
DESCRIPTION
1. CPD is used to determine the dynamic power dissipation PD (µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
The 74HC1G/HCT1G04 is a
high-speed Si-gate CMOS device.
The 74HC1G/HCT1G04 provides the
inverting buffer. The standard output
currents are half the values compared
to the 74HC/HCT04.
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
∑ (CL × VCC2 × fo) = sum of outputs.
2. For HC1G the condition is VI = GND to VCC.
For HCT1G the condition is VI = GND to VCC − 1.5 V.
FUNCTION TABLE
See note 1.
INPUT
inA
OUTPUT
outY
PINNING
PIN
SYMBOL
DESCRIPTION
not connected
L
H
L
1
2
3
4
5
n.c.
inA
H
data input A
Note
GND
outY
VCC
ground (0 V)
data output
1. H = HIGH voltage level;
L = LOW voltage level.
DC supply voltage
1998 Aug 31
2
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
ORDERING AND PACKAGE INFORMATION
OUTSIDE NORTH
PACKAGES
TEMPERATURE
AMERICA
PINS
PACKAGE
MATERIAL
CODE
MARKING
RANGE
74HC1G04GW
−40 to +125 °C
74HCT1G04GW
5
5
SC-88A
SC-88A
plastic
plastic
SOT353
SOT353
HC
TC
handbook, halfpage
n.c.
inA
1
2
3
5
4
V
CC
handbook, halfpage
inA
outY
4
2
04
outY
GND
MNA108
MNA107
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1
2
handbook, halfpage
4
outY
inA
MNA110
MNA109
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
1998 Aug 31
3
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
RECOMMENDED OPERATING CONDITIONS
74HC1G04
TYP.
74HCT1G04
MIN. TYP. MAX.
SYMBOL
PARAMETER
UNIT
CONDITIONS
MIN.
2.0
MAX.
6.0
VCC
VCC
VI
DC supply voltage
input voltage
5.0
−
4.5
0
5.0
−
5.5
V
0
VCC
VCC
V
V
VO
output voltage
0
−
VCC
0
−
Tamb
operating ambient
temperature
−40
+25
+125
−40
+25
+125 °C
see DC and AC
characteristics
per device
tr, tf
input rise and fall times
except for Schmitt
trigger inputs
−
−
−
−
−
−
1000
500
−
−
−
−
−
−
−
ns
ns
ns
VCC = 2.0 V
500
−
VCC = 4.5 V
400
VCC = 6.0 V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+7.0
UNIT
VCC
±IIK
±IOK
±IO
V
DC input diode current
DC output diode current
VI < −0.5 V or VI > VCC + 0.5 V; note 1
−
−
−
20
mA
mA
mA
V
O < −0.5V or VO > VCC + 0.5 V; note 1
20
DC output source or sink
current standard outputs
−0.5V < VO < VCC + 0.5 V; note 1
12.5
±ICC
DC VCC or GND current for
types with standard outputs
note 1
−
25
mA
Tstg
PD
storage temperature
−65
+150
200
°C
power dissipation per package temperature range: −40 to +125 °C; note 2 −
mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above +55 °C the value of PD derates linearly with 2.5 mW/K.
1998 Aug 31
4
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
DC CHARACTERISTICS FOR 74HC1G04
Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb (°C) TEST CONDITIONS
−40 to +85
MIN. TYP.(1) MAX.
SYMBOL
PARAMETER
−40 to +125
MIN. MAX.
1.5
UNIT
VCC (V)
OTHER
VIH
HIGH-level input
voltage
1.5
3.15
4.2
−
1.2
2.4
3.2
0.8
2.1
2.8
2.0
4.5
6.0
4.32
−
−
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
−
3.15
4.2
−
−
−
−
VIL
LOW-level input voltage
0.5
1.35
1.8
−
0.5
1.35
1.8
−
V
V
V
−
−
−
−
VOH
HIGH-level output
voltage; all outputs
1.9
4.4
5.9
4.13
1.9
4.4
5.9
3.7
VI = VIH or VIL:
−IO = 20 µA
−
−
−
−
VOH
HIGH-level output
voltage; standard
outputs
−
−
VI = VIH or VIL;
−IO = 2.0 mA
5.63
5.81
−
5.2
−
6.0
VI = VIH or VIL;
−IO = 2.6 mA
VOL
LOW-level output
voltage; all outputs
−
−
−
−
0
0.1
0.1
−
−
−
−
0.1
0.1
0.1
0.4
V
V
2.0
4.5
6.0
4.5
VI = VIH or VIL;
IO = 20 µA
0
0
0.1
VOL
LOW-level output
voltage; standard
outputs
0.15
0.33
VI = VIH or VIL;
IO = 2.0 mA
−
0.16
0.33
−
0.4
6.0
VI = VIH or VIL;
IO = 2.6 mA
II
input leakage current
−
−
−
−
1.0
10
−
−
1.0
20
µA
µA
6.0
6.0
VI = VCC or GND
ICC
quiescent supply
current
VI = VCC or GND;
IO = 0
Note
1. All typical values are measured at Tamb = 25 °C.
1998 Aug 31
5
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
DC CHARACTERISTICS FOR 74HCT1G04
Additional type data to the recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
−40 to +85
−40 to +125
MIN. MAX.
2.0
UNIT
VCC (V)
OTHER
MIN. TYP.(1) MAX.
VIH
HIGH-level input
voltage
2.0
1.6
1.2
4.5
4.32
−
−
V
V
V
V
4.5 to 5.5
4.5 to 5.5
4.5
VIL
LOW-level input
voltage
−
0.8
−
−
0.8
−
VOH
VOH
HIGH-level output
voltage; all outputs
4.4
4.13
4.4
3.7
VI = VIH or VIL;
−IO = 20 µA
HIGH-level output
voltage; standard
outputs
−
−
4.5
VI = VIH or VIL;
−IO = 2.0 mA
VOL
VOL
LOW-level output
voltage; all outputs
−
−
0
0.1
−
−
0.1
0.4
V
V
4.5
4.5
VI = VIH or VIL;
IO = 20 µA
LOW-level output
voltage; standard
outputs
0.15
0.33
VI = VIH or VIL;
IO = 2.0 mA
II
input leakage current −
−
−
1.0
−
−
1.0
20
µA
µA
5.5
5.5
VI = VCC or GND
ICC
quiescent supply
current
−
10.0
VI = VCC or GND;
IO = 0
∆ICC
additional supply
current per input
−
−
500
−
850
µA
4.5 to 5.5 VI = VCC − 2.1;
IO = 0
Note
1. All typical values are measured at Tamb = 25 °C.
1998 Aug 31
6
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
AC CHARACTERISTICS FOR 74HC1G04
GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF.
T
amb (°C)
−40 to +85
MIN. TYP.(1) MAX. MIN. MAX.
TEST CONDITIONS
UNIT
SYMBOL
PARAMETER
−40 to +125
VCC (V)
WAVEFORMS
tPHL, tPLH propagation delay
inA to outY
−
−
−
25
9
105
21
−
−
−
135
27
ns
ns
ns
2.0
4.5
6.0
see Figs 5 and 6
8
18
23
Note
1. All typical values are measured at Tamb = 25 °C.
AC CHARACTERISTICS FOR 74HCT1G04
GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF.
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
−40 to +85
−40 to +125
UNIT
VCC (V)
4.5
WAVEFORMS
MIN. TYP.(1) MAX. MIN. MAX.
10 24 27
tPHL, tPLH propagation delay
−
−
ns
see Figs 5 and 6
inA to outY
Note
1. All typical values are measured at Tamb = 25 °C.
1998 Aug 31
7
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
AC WAVEFORMS
handbook, halfpage
V
(1)
handbook, halfpage
CC
V
inA input
M
V
V
O
I
PULSE
GENERATOR
D.U.T.
t
t
PHL
PLH
C
50 pF
R
L
T
(1)
outY output
V
M
MNA101
MNA111
Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance
(see “AC characteristics for 74HC1G04” and
“AC characteristics for 74HCT1G04”).
(1) HC1G04: VM = 50% and VI = GND to VCC
.
HCT1G04: VM = 1.3 V and VI = GND to 3.0 V.
RT = Termination resistance should be equal to the output
impedance Z0 of the pulse generator.
Fig.5 The input (inA) to output (outY) propagation
delays.
Fig.6 Load circuitry for switching times.
1998 Aug 31
8
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
PACKAGE OUTLINE
Plastic surface mounted package; 5 leads
SOT353
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
(2)
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SC-88A
97-02-28
SOT353
1998 Aug 31
9
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
SOLDERING
Introduction
Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SO
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
1998 Aug 31
10
Philips Semiconductors
Product specification
Inverter
74HC1G04; 74HCT1G04
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Aug 31
11
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© Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
245106/00/01/pp12
Date of release: 1998 Aug 31
Document order number: 9397 750 03659
相关型号：
74HCT1G08GW-Q100
HCT SERIES, 2-INPUT AND GATE, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1,TSSOP-5
NXP
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