8113BADC [ETC]
稳压器3A/18V输入同步降压芯片;型号: | 8113BADC |
厂家: | ETC |
描述: | 稳压器3A/18V输入同步降压芯片 稳压器 |
文件: | 总10页 (文件大小:1063K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Application Note: SY8113B
High Efficiency, 500kHz, 3A, 18V Input
Synchronous Step Down Regulator
General Description
Features
The SY8113B is
a high efficiency 500 kHz
•
low RDS(ON) for internal switches (top/bottom):
80m /40m
4.5-18V input voltage range
synchronous step-down DC-DC converter capable of
delivering 3A current. The SY8113B operates over a
wide input voltage range from 4.5V to 18V and
integrates main switch and synchronous switch with
very low RDS(ON) to minimize the conduction loss.
Ω
Ω
•
•
•
•
3A output current capability
500 kHz switching frequency
Instant PWM architecture to achieve fast transient
responses.
Cycle-by-cycle peak current limitation
Internal softstart limits the inrush current
Low output voltage ripple and small external inductor
and capacitor sizes are achieved with 500 kHz
switching frequency. It adopts the instant PWM
architecture to achieve fast transient responses for high
step down applications
•
•
• ±1.5% 0.6V reference
TSOT23-6 package
•
Ordering Information
□ □□ □
Applications
SY8113
(
)
•
•
•
•
•
Set Top Box
Portable TV
Access Point Router
DSL Modem
LCD TV
Temperature Code
Package Code
Optional Spec Code
Temperature Range:
-
40°C to 85°C
Ordering Number
SY8113BADC
Package type
TSOT23-6
Note
--
Typical Applications
Figure 1. Schematic Diagram
Figure 2. Efficiency Figure
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
1
AN_SY8113B
Pinout
(top view)
BS
GND
FB
LX
IN
EN
TSOT23-6(FC)
Top Mark: WCxyz
,
(Device code: WC, x=year code, y=week code, z= lot number code)
Pin Name
BS
Pin Number
1
Pin Description
Boot-Strap Pin. Supply high side gate driverDecouple this pin to LX pin with
0.1uF ceramic cap.
Ground pin
GND
FB
2
3
Output Feedback Pin. Connect this pin to the center point of the output resistor
divider (as shown in Figure 1) to program the output voltage:
Vout=0.6*(1+R1/R2)
EN
4
Enable control. Pull high to turn on. Do not float.
IN
LX
5
6
Input pin. Decouple this pin to GND pin with at least 1uF ceramic cap
Inductor pin. Conect this pin to the switching node of inductor
Absolute Maximum Ratings (Note 1)
Supply Input Voltage ------------------------------------------------------------------------------------------------ 19V
Enable Voltage-------------------------------------------------------------------------------------------- VIN + 0.3V
FB Voltage ----------------------------------------------------------------------------------------------------------- 4V
Power Dissipation, PD @ TA = 25°C, TSOT23-6(FC)----------------------------------------------------- 1W
Package Thermal Resistance (Note 2)
θ
θ
JA ------------------------------------------------------------------------------------------------------ 100°C /W
JC ----------------------------------------------------------------------------------------------------- 11.2°C /W
Junction Temperature Range ----------------------------------------------------------------------------------- 150°C
Lead Tempture (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C
Storage Temperature Range ------------------------------------------------------------------------- -65°C to 150°C
Recommended Operating Conditions (Note 3)
Supply Input Voltage ---------------------------------------------------------------------------------------------- 4.5V to 18V
Junction Temperature Range ----------------------------------------------------------------------------------- -40°C to 125°C
Ambient Temperature Range ----------------------------------------------------------------------------------- -40°C to 85°C
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
2
AN_SY8113B
Electrical Characteristics
(VIN = 12V, VOUT = 1.2V, L = 2.2uH, COUT = 47uF, TA = 25°C, IOUT = 1A unless otherwise specified)
Parameter
Symbol
VIN
Test Conditions
Min
4.5
Typ
Max
18
Unit
V
µA
µA
V
Input Voltage Range
Quiescent Current
Shutdown Current
Feedback Reference
Voltage
I
I
Q
IOUT=0
EN=0
,
VFB=VREF*105%
100
5
SHDN
10
0.609
VREF
0.591 0.6
FB Input Current
Top FET RON
Bottom FET RON
Top FET PeakCurrent
Limit
IFB
VFB=3.3V
-50
80
50
90
50
6
nA
mΩ
mΩ
A
RDS(ON)1
RDS(ON)2
ILIM,TOP
40
Bottom FET Valley
Current Limit
ILIM
3
4.25
A
EN Rising Threshold
EN Falling Threshold
Input UVLO Threshold
UVLO Hysteresis
Min ON Time
Min OFF Time
Switching Frequency
Soft-start Time
VENH
VENL
VUVLO
VHYS
1.5
V
V
V
V
ns
ns
kHz
uS
°C
0.4
4.5
0.3
80
170
500
800
150
50
140
120
220
tSS
TSD
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
THYS
15
°C
Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only. Functial operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Note 2:
θ
JA is measured in the natural convection at TA = 25°C on a low effective 4-layer thermal conductivity test
board of JEDEC 51-3 thermal measurement standard. Pin2 of TSOT23-6 packages is the case position for
measurement.
θ
JC
Note 3: The device is not guaranteed to function outside its operating conditions
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
3
AN_SY8113B
Block Diagram
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
4
AN_SY8113B
Typical Performance Characteristics
Efficiency vs. Load Current
100
95
90
85
80
VIN=6V,VOUT=5V
VIN=12V,VOUT=5V
75
70
VIN=16V,VOUT=5V
0.01
0.10
1.00
10.00
Load Current (A)
Efficiency vs. Load Current
95
90
85
80
75
70
VIN=5V,VOUT=1.2V
VIN=12V,VOUT=1.2V
VIN=16V,VUT=1.2V
65
60
0.01
0.10
1.00
10.00
Load Current (A)
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
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AN_SY8113B
Short Circuit Protection
Short Circuit Protection
(VIN=12V, VOUT=3.3V, Open to Short)
(VIN=12V, VOUT=3.3V, 3A to Short)
VOUT
2V/div
VOUT
2V/div
IL
1A/div
IL
1A/div
Time ms/div)
Time (2ms/div)
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
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AN_SY8113B
To minimize the potential noise problem, place a
typical X5R or better grade ceramic capacitor really
close to the IN and GND pins. Care should be taken to
minimize the loop area formed by CIN, and IN/GND
pins. In this case, a 10uF low ESR ceramic capacitor is
recommended.
Operation
SY8113B is a synchronous buck regulator IC that
integrates the PWM control, top and bottom switches
on the same die to minimize the switching transition
loss and conduction loss. With ultra low Rds(on) power
switches and proprietary PWM control, this regulator
IC can achieve the highest efficiency and the highest
switch frequency simultaneously to minimize the
external inductor and capacitor size, and thus achieving
the minimum solution footprint.
Output capacitor COUT
:
The output capacitor is selected to handle the output
ripple noise requirements. Both steady state ripple and
transient requirements must be taken into consideration
when selecting this capacitor. For the best performance,
it is recommended to use X5R or better grade ceramic
capacitor greater than 22uF capacitance.
SY8113B provides protection functions such as cycle
by cycle current limiting and thermal shutdown
protection. SY8113B will sense the output voltage
conditions for the fault protection.
Output inductor L:
There are several considerations in choosing this
inductor.
1) Choose the inductance to provide the desired
ripple current. It is suggested to choose the ripple
current to be about 40% of the maximum output
current. The inductance is calculated as:
Applications Information
Because of the high integration in the SY8113B IC, the
application circuit based on this regulator IC is rather
simple. Only input capacitor CIN, output capacitor COU
output inductor L and feedback resistors (R1 and R)
need to be selected for the targeted applications
specifications.
,
VOUT (1− VOUT/VIN,MAX
)
L =
FSW × IOUT,MAX × 40%
where Fsw is the switching frequency and IOUT,MAX is
the maximum load current.
Feedback resistor dividers R
1
and R
2:
The SY8113B regulator IC is quite tolerant of different
ripple current amplitude. Consequently, the final choice
of inductance can be slightly off the calculation value
without significantly impacting the performance.
2) The saturation current rating of the inductor must
be selected to be greater than the peak inductor
current under full load conditions.
Choose R and R to program the proper output voltage.
To minimize the power consumption under light loads,
it is desirable to choose large resistance values for both
1
2
R
1
and R
2
. A value of between 10kΩ and 1MΩ is
highly recommended for both resistors. If Vout is 3.3V,
R
1
=100k is chosen, then using following equation, R
2
can be calculated to be 22.1k:
VOUT
R1
V
OUT(1-VOUT/VIN
,
MAX
)
ISAT
,
MIN > IOUT
,
MAX
+
06V
2 FSW
L
R2 =
R1 .
0.6VFB
GND
VOUT − 0.6V
3) The DCR of the inductor and the core loss at the
switching frequency must be low enough to
achieve the desired efficiency requirement. It is
desirable to choose an inductor with DCR<50mΩ
to achieve a good overall efficiency.
R2
Input capacitor CIN
:
The ripple current through input capacitor is calculated
as:
External Boostrap Cap
This capacitor provides the gate driver voltage for
internal high side MOSEFET. A 100nF low ESR
ceramic capacitor connected between BS pin and LX
.
ICIN _ RMS = IOUT D(1− D)
pin is recommended.
BS
CB
100nF
LX
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
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AN_SY8113B
1) It is desirable to maximize the PCB copper area
connecting to GND pin to achieve the best thermal and
noise performance. If the board space allowed, a
ground plane is highly desirable.
Load Transient Considerations:
The SY8113B regulator IC integrates the compensation
components to achieve good stability and fast transient
responses. In some applications, adding a 22pF ceramic
cap in parallel with R1 may further speed up the load
transient responses and is thus recommended for
applications with large load transient step requirements.
2) CIN must be close to Pins IN and GND. The loop
area formed by CIN and GND must be minimized.
3) The PCB copper area associated with LX pin must
be minimized to avoid the potential noise problem.
4) The components R
1
and R , and the trace connecting
2
to the FB pin must NOT be adjacent to the LX net on
the PCB layout to avoid the noise problem.
5) If the system chinterfacing with the EN pin has a
high impedance ste at shutdown mode and the IN pin
is connected directly to a power source such as a Li-Ion
battery, it iesirable to add a pull down 1Mohm
resistor between the EN and GND pins to prevent the
noise om falsely turning on the regulator at shutdown
mode.
Layout Design:
The layout design of SY8113B regulator is relatively
simple. For the best efficiency and minimum noise
promblem, we should place the following components
close to the IC: CIN, L, R1 and R2.
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
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AN_SY8113B
TSOT23-6L (FC)Package outline & PCB layout
1.90
2.80 - 3.10
0.95
0.60
0.30 - 0.50
Recommended Pad Layout
1.00 (max)
0.95 TYP
1.90 TYP
0.3 - 0.6
Notes:
All dimension in MM
All dimension don’t not include mold flash & metal burr
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
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AN_SY8113B
Taping & Reel Specification
1. Taping orientation
TSOT23-6
3.9/4.1
1.45/1.55
Feeding direction
2. Carrier Tape & Reel specification for packages
Reel
Width
Reel
Size
Tape
width
(mm)
Package
types
Pocket
pitch(mm)
Reel size
(Inch)
Reel
Trailer
Leader length Qty per
width(mm) length(mm)
(mm)
reel
SOT23-6
8
4
7"
8.4 280
160
3000
3. Others: NA
AN_SY8113B Rev.0.1
Silergy Corp. Confidential-prepared for Internal Use Only
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