ADM666AN [ETC]
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| 型号： | ADM666AN |
| 厂家： | 
ETC |
| 描述： | IC
|
| 文件： | 总6页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
+5 V Fixed, Adjustable
Micropower Linear Voltage Regulators
a
ADM663/ADM666
FUNCTIO NAL BLO CK D IAGRAMS
FEATURES
5 V Fixed or +1.3 V to +16 V Adjustable
Low Pow er CMOS: 12 µA m ax Quiescent Current
40 m A Output Current
ADM663
Current Lim iting
V
V
V
Pin Com patible w ith MAX663/ 666
+2 V to +16.5 V Operating Range
Low Battery Detector ADM666
No Overshoot on Pow er-Up
OUT2
IN
OUT1
0.5V
C1
C2
SENSE
APPLICATIONS
Handheld Instrum ents
LCD Display System s
Pagers
A1
50mV
Rem ote Data Acquisition
V
SET
SHDN
GND
A2
V
GENERAL D ESCRIP TIO N
1.3V
REF
0.9V
TC
T he ADM663/ADM666 are precision voltage regulators featur-
ing a maximum quiescent current of 12 µA. T hey can be used to
give a fixed +5 V output with no additional external compo-
nents or can be adjusted from 1.3 V to 16 V using two external
resistors. Fixed or adjustable operation is automatically selected
via the VSET input. T he low quiescent current makes these de-
vices especially suitable for battery powered systems. T he input
voltage range is 2 V to 16.5 V and an output current up to
40 mA is provided. T he ADM663 can directly drive an external
pass transistor for currents in excess of 40 mA. Additional fea-
tures include current limiting and low power shutdown. T her-
mal shutdown circuitry is also included for additional safety.
V
V
OUT
IN
ADM666
0.5V
C1
C2
SENSE
T he ADM666 features additional low battery monitoring
circuitry to detect for low battery voltages.
A1
50mV
T he ADM663/ADM666 are pin-compatible replacements for
the MAX663/666. Both are available in 8-pin DIP and in nar-
row surface mount (SOIC) packages.
V
SET
SHDN
LBI
LBO
C3
O RD ERING GUID E
1.3V
REF
Model
Tem perature Range
P ackage O ption
GND
ADM663AN
ADM663AR
ADM666AN
ADM666AR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-8
R-8
N-8
R-8
REV. 0
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood. MA 02062-9106, U.S.A.
Tel: 617/ 329-4700 Fax: 617/ 326-8703
(V = +9 V, V = + 5 V, T = + 25°C unless otherwise noted)
ADM663/ADM666–SPECIFICATIONS IN
OUT
A
P aram eter
Min
Typ
Max
Units
Test Conditions/Com m ents
Input Voltage, VIN
2.0
16.5
V
TA = T MIN to T MAX
Quiescent Current, IQ
No Load, VIN = +16.5 V
6
12
15
µA
µA
V
%/V
Ω
Ω
Ω
V
T
T
A = +25°C
A = T MIN to T MAX
Output Voltage, VOUT
Line Regulation, ∆VOUT /∆VIN
Load Regulation, ∆VOUT /∆IOUT
4.75
1.27
1.4
5.0
0.03
3.0
1.0
3.0
5.25
0.35
7.0
5.0
7.0
1.33
TA = T MIN to T MAX, VSET = GND
+2 V ≤ VIN ≤ +15 V, VOUT = VREF
ADM663, 1 mA ≤ IOUT 2 ≤ 20 mA
ADM663, 50 µA ≤ IOUT 1 ≤ 5 mA
ADM666, 1 mA ≤ IOUT ≤ 20 mA
VOUT = VSET
Reference Voltage, VSET
Reference T empco, ∆VSET /∆T
VSET Internal T hreshold, VF/A
±100
50
ppm/°C
mV
TA = T MIN to T MAX
VSET < VF/A for +5 V Out;
VSET > VF/A for Adj. Out
TA = T MIN to T MAX
VSHDN High = Output Off
VSHDN Low = Output On
VSET Input Current, ISET
Shutdown Input Voltage, VSHDN
±0.01
±10
nA
V
V
0.3
Shutdown Input Current, ISHDN
SENSE Input T hreshold, VOUT –VSENSE
SENSE Input Resistance, RSENSE
Input-Output Saturation Resistance, RSAT
ADM663 VOUT 1
±0.01
0.5
3
±10
nA
V
MΩ
Current Limit T hreshold
200
70
50
500
150
150
Ω
Ω
Ω
VIN = +2 V, IOUT = 1 mA
VIN = +9 V, IOUT = 2 mA
VIN = +15 V, IOUT = 5 mA
+3 V ≤ VIN ≤ +16.5 V, VIN–VOUT = +1.5 V
TA = +25°C
TA = T MIN to T MAX
ADM666
ADM666
ADM666, ISAT = 2 mA
ADM666, LBI = 1.4 V
ADM663
ADM663
ADM663
Output Current from VOUT (2), IOUT
Minimum Load Current, IL (MIN)
40
mA
µA
µA
V
nA
Ω
nA
V
mA
mV/°C
1.0
5.0
1.37
±10
100
LBI Input T hreshold, VLBI
LBI Input Current, ILBI
LBO Output Saturation Resistance, RSAT
LBO Output Leakage Current
VT C Open Circuit Voltage, VT C
VT C Sink Current, IT C
1.21
1.28
±0.01
35
10
0.9
2.0
8.0
+2.5
VT C T emperature Coefficient
Specifications subject to change without notice.
Power Dissipation, N-8 . . . . . . . . . . . . . . . . . . . . . . . . 625 mW
(Derate 8.3 mW/°C above +50°C)
ABSO LUTE MAXIMUM RATINGS*
(
T A= +25°C unless otherwise noted)
θJA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . . 120°C/W
Power Dissipation R-8 . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
(Derate 6 mW/°C above +50°C)
θJA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . . 170°C/W
Operating T emperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage T emperature Range . . . . . . . . . . . . –65°C to +150°C
Lead T emperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >5000 V
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18 V
T erminal Voltage
(ADM663) Pins 1, 3, 5, 6, 7
. . . . . . . . . . . . . . . . . . . . (GND – 0.3 V) to (VIN + 0.3 V)
(ADM666) Pins 1, 2, 3, 5, 6
. . . . . . . . . . . . . . . . . . . . . (GND – 0.3 V) to (VIN + 0.3 V)
(ADM663) Pin 2 . . . . . . . (GND – 0.3 V) to (VOUT 1 + 0.3 V)
(ADM666) Pin 7 . . . . . . . . . . . . (GND – 0.3 V) to +16.5 V
Output Source Current
(ADM663, ADM666) Pin 2 . . . . . . . . . . . . . . . . . . . . 50 mA
(ADM663) Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Output Sink Current,
*T his is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
(ADM663, ADM666) Pin 7 . . . . . . . . . . . . . . . . . . . . –20 mA
–2–
REV. 0
ADM663/ADM666
P IN FUNCTIO N D ESCRIP TIO N
D IP & SO IC P IN CO NFIGURATIO NS
Mnem onic Function
SENSE
1
2
3
4
8
7
6
5
V
V
V
IN
VOUT (1) (2)
VIN
Voltage Regulator Output(s)
V
ADM663
OUT2
TC
SET
Voltage Regulator Input
TOP VIEW
(Not to Scale)
V
OUT1
SENSE
Current Limit Sense Input. (Referenced to
VOUT (2).) If not used it should be connected to
GND
SHDN
VOUT (2)
GND
LBI
Ground Pin. Must be connected to 0 V
Low Battery Detect Input. Compared with 1.3 V
Low Battery Detect Output. Open Drain Output
LBO
SENSE
1
2
3
4
8
7
6
5
V
IN
SHDN
Digital Input. May be used to disable the device
so that the power consumption is minimized
Voltage Setting Input. Connect to GND for +5 V
output or connect to resistive divider for adjust
able output
V
LBO
ADM666
OUT
TOP VIEW
(Not to Scale)
LBI
V
SET
VSET
GND
SHDN
VT C
T emperature-Proportional Voltage for negative
T C Output
an open drain FET connected to the Low Battery Output pin,
LBO. T he Low Battery T hreshold may be set using a suitable
voltage divider connected to LBI. When the voltage on LBI falls
below 1.3 V, the open drain output LBO is pulled low.
GENERAL INFO RMATIO N
T he ADM663/ADM666 contains a micropower bandgap refer-
ence voltage source, an error amplifier A1, two comparators
C1, C2 and a series pass output transistor. A P-channel FET
and an NPN transistor are used on the ADM663 while the
ADM666 uses an NPN output transistor.
Both the ADM663 and the ADM666 contain a shutdown
(SHDN) input which can be used to disable the error amplifier
and hence the voltage output. T he quiescent current in shut-
down is less than 12 µA.
CIRCUIT D ESCRIP TIO N
T he internal bandgap reference is trimmed to 1.3 V ± 30 mV.
T his is used as a reference input to the error amplifier A1. T he
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external re-
sistors. When VSET is at ground, the internal divider provides
the error amplifier’s feedback signal giving a +5 V output. When
VSET is at more than 50 mV above ground, the error amplifier's
input is switched directly to the VSET pin, and external resistors
are used to set the output voltage. T he external resistors are
ADM663
V
V
V
OUT2
OUT1
IN
0.5V
C1
C2
SENSE
selected so that the desired output voltage gives 1.3 V at VSET
.
Comparator C1 monitors the output current via the SENSE
input. T his input, referenced to VOUT (2), monitors the voltage
drop across a load sense resistor. If the voltage drop exceeds
0.5 V, then the error amplifier A1 is disabled and the output
current is limited.
A1
50mV
V
SET
SHDN
GND
T he ADM663 has an additional amplifier, A2, which provides a
temperature-proportional output, VT C. If this is summed into
the inverting input of the error amplifier, a negative temperature
coefficient results at the output. T his is useful when powering
liquid crystal displays over wide temperature ranges.
A2
V
1.3V
REF
0.9V
TC
Figure 1. ADM663 Functional Block Diagram
T he ADM666 has an additional comparator, C3 which com-
pares the voltage on the Low Battery Input, LBI, pin to the in-
ternal +1.3 V reference. T he output from the comparator drives
REV. 0
–3–
ADM663/ADM666
V
SENSE
+1.3V TO +15V
OUTPUT
V
V
IN
OUT
IN
R
+2V TO +16V
INPUT
CL
ADM666
V
ADM663
ADM666
OUT(2)
0.5V
R2
R1
SHDN
C1
C2
SENSE
V
SET
GND
A1
50mV
V
SET
Figure 4. ADM663/ADM666 Adjustable Output
Cur r ent Lim iting
SHDN
LBI
LBO
C3
Current limiting may be achieved by using an external current
sense resistor in series with VOUT (2). When the voltage across
the sense resistor exceeds the internal 0.5 V threshold, current
limiting is activated. T he sense resistor is therefore chosen such
that the voltage across it will be 0.5 V when the desired current
limit is reached.
1.3V
REF
GND
Figure 2. ADM666 Functional Block Diagram
Cir cuit Configur ations
0.5
ICL
RCL
=
For a fixed +5 V output the VSET input is grounded and no ex-
ternal resistors are necessary. T his basic configuration is shown
in Figure 3. Current limiting is not being utilized so the SENSE
input is connected to VOUT (2). T he input voltage can range from
+6 V to +16 V and output currents up to 40 mA are available
provided that the maximum package power dissipation is not
exceeded.
where RCL is the current sense resistor, ICL is the maximum
current limit.
T he value chosen for RCL should also ensure that the current is
limited to less than the 50 mA absolute maximum rating and
also that the power dissipation will also be within the package
maximum ratings.
If current limiting is employed, there will be an additional volt-
age drop across the sense resistor which must be considered
when determining the regulators dropout voltage.
VIN
SENSE
VOUT(2)
+6V TO +16V
INPUT
ADM663
ADM666
If current limiting is not used, the SENSE input should be con-
+5V
OUTPUT
nected to VOUT (2)
.
GND
VSET
SHDN
Shutdown Input (SH D N)
T he SHDN input allows the regulator to be switched off with a
logic level signal. T his will disable the output and reduce the
current drain to a low quiescent (12 µA maximum) current.
T his is very useful for low power applications. T he SHDN input
should be driven with a CMOS logic level signal since the input
threshold is 0.3 V. In T T L systems, an open collector driver
with a pull-up resistor may be used.
Figure 3. ADM663/ADM666 Fixed +5 V Output
O utput Voltage Setting
If VSET is not connected to GND, the output voltage is set ac-
cording to the following equation.
If the shutdown function is not being used, then SHDN should
be connected to GND.
R1 + R2
VOUT =VSET
×
whereVSET = 1. 30 V
R1
Low Supply or Low Batter y D etection
T he ADM666 contains on-chip circuitry for low power supply
or battery detection. If the voltage on the LBI pin falls below the
internal 1.3 V reference, then the open drain output LBO will
go low. T he low threshold voltage may be set to any voltage
above 1.3 V by appropriate resistor divider selection.
T he resistor values may be selected by firstly choosing a
value for R1 and then selecting R2 according to the following
equation.
VOUT
1. 30
R2 = R1 ×
– 1
VBATT
1. 30
R3 = R4 ×
– 1
T he input leakage current on VSET is 10 nA maximum. T his al-
lows large resistor values to be chosen for R1 and R2 with little
degradation in accuracy. For example, a 1 MΩ resistor may be
selected for R1 and then R2 may be calculated accordingly.
T he tolerance on VSET is guaranteed at less than ±30 mV so in
most applications, fixed resistors will be suitable.
where R3 and R4 are the resistive divider resistors and VBAT T is
the desired low voltage threshold.
–4–
REV. 0
ADM663/ADM666
Since the LBI input leakage current is less than 10 nA, large val-
ues may be selected for R3 and R4 in order to minimize loading.
For example, a 6 V low threshold, may be set using 10 MΩ for
R3 and 2.7 MΩ for R4.
SENSE
V
V
OUT2
OUT
R2
ADM663
V
SET
+2V TO +16V
INPUT
R3
R1
V
SENSE
+1.3V TO +15V
OUTPUT
IN
V
TC
R
CL
V
OUT
R3
R4
ADM666
R2
R1
LBI
Figure 7. ADM663 Tem perature Proportional Output
V
SET
LBO
SHDN
GND
R2
R1
R2
R3
LOW
BATTERY
OUTPUT
VOUT =VSET × 1 +
+
× V
(
–VTC
SET
)
–R2
R3
TCV OUT
=
×TVCTC
whereVSET = +1. 3 V , V TC = +0.9V, TCV TC = +2. 5 mV/°C
Figure 5. ADM666 Adjustable Output with Low Battery
Detection
H igh Cur r ent O per ation
AP P LICATIO N H INTS
T he ADM663 contains an additional output, VOUT 1, suitable
for directly driving the base of an external NPN transistor. Fig-
ure 6 shows a configuration which can be used to provide +5 V
with boosted current drive. A 1 Ω current sensing resistor limits
the current at 0.5 A.
Input-O utput (D r opout Voltage)
A regulator’s minimum input-output differential or dropout
voltage determines the lowest input voltage for a particular out-
put voltage. T he ADM663/ADM666 dropout voltage is 0.8 V at
its rated output current. For example when used as a fixed +5 V
regulator the minimum input voltage is +5.8 V. At lower output
currents, (IOUT < 5 mA), on the ADM663, VOUT 1 may be used
as the output driver in order to achieve lower dropout voltages.
Please refer to Figure 9. In this case the dropout voltage de-
pends on the voltage drop across the internal FET transistor.
T his may be calculated by multiplying the FET ’s saturation re-
sistance by the output current. As the current limit circuitry is
referenced to VOUT 2, VOUT 2 should be connected to VOUT 1. For
high current operation VOUT 2 should be used alone and VOUT 1
left unconnected.
VIN
VIN
2N4237
VOUT1
VOUT2
+
10µF
ADM663
100Ω
SHDN
1.0Ω
SHUTDOWN
VSET
GND
SENSE
+
10µF
+5V, 0.5A
OUTPUT
Bypass Capacitor s
T he high frequency performance of the ADM663/ADM666
may be improved by decoupling the output using a filter capaci-
tor. A capacitor value of 10 µF is suitable.
Figure 6. ADM663 Boosted Output Current (0.5 A)
An input capacitor helps reduce noise and improves dynamic
performance. A suitable input capacitor of 0.1 µF or greater
may be used.
Tem per atur e P r opor tional O utput
T he ADM663 contains a VT C output with a positive tempera-
ture coefficient of +2.5 mV/°C. T his may be connected to the
summing junction of the error amplifier (VSET) through a resis-
tor resulting in a negative temperature coefficient at the output
of the regulator.
T his is especially useful in multiplexed LCD displays to com-
pensate for the inherent negative temperature coefficient of the
LCD threshold. At 25°C the voltage at the VT C output is typi-
cally 0.9 V. T he equations for setting both the output voltage
and the tempco are given below. If this function is not being
used, then VT C should be left unconnected.
REV. 0
–5–
–Typical Performance Characteristics
ADM663/ADM666
80
12
V
V
V
T
DC = +9V
p-p = +2V
DC = +5V
IN
IN
T
= +25°C
A
OUT
10
8
= +25°C
60
40
20
0
A
V
V
= +5V
OUT
6
= +3.3V
OUT
4
2
0
0.01
0.1
1
10
100
1000
10000
2
4
6
8
10
12
14
16
FREQUENCY – Hz
V
– Volts
IN
Figure 8. Power Supply Rejection Ratio vs. Frequency
Figure 10. Quiescent Current vs. Input Voltage
2.0
1.8
1.0
TA = +25°C
0.9
VIN = +2V
TA = +25°C
VIN = +2V
0.8
1.6
1.4
1.2
1.0
0.8
0.7
0.6
VIN = +15V
0.5
VIN = +9V
0.4
0.3
0.2
0.1
0
0.6
VIN = +9V
0.4
VIN = +15V
0.2
0
0
2
4
6
8
10
12
14
16
18
20
10
20
30
40
50
0
IOUT2 – mA
IOUT1 – mA
Figure 9. VOUT1 Input-Output Differential vs. Output
Current
Figure 11. VOUT(2) Input-Output Differential vs. Output
Current
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
8-Lead P lastic D IP
(N- 8)
8-Lead Nar r ow-Body
(R- 8)
8
5
0.280 (7.11)
0.240 (6.10)
8
1
5
PIN 1
0.1574 (4.00)
0.1497 (3.80)
1
4
PIN 1
0.2440 (6.20)
0.2284 (5.80)
4
0.325 (8.25)
0.430 (10.92)
0.300 (7.62)
0.348 (8.84)
0.060 (1.52)
0.015 (0.38)
0.1968 (5.00)
0.1890 (4.80)
0.0196 (0.50)
0.0099 (0.25)
0.195 (4.95)
0.115 (2.93)
0.210
(5.33)
MAX
x 45
°
0.102 (2.59)
0.094 (2.39)
0.0098 (0.25)
0.0040 (0.10)
0.130
(3.30)
MIN
0.015 (0.381)
0.008 (0.204)
0.160 (4.06)
0.115 (2.93)
8
0
°
°
0.0500 (1.27)
0.0160 (0.41)
0.0500 0.0192 (0.49)
0.0098 (0.25)
0.0075 (0.19)
(1.27)
BSC
0.0138 (0.35)
SEATING
PLANE
0.100
(2.54)
0.070 (1.77)
0.045 (1.15)
0.022 (0.558)
0.014 (0.356)
BSC
–6–
REV. 0
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