AHF2812D-SLV [ETC]
Analog IC ; 模拟IC\n
| 型号： | AHF2812D-SLV |
| 厂家： | 
ETC |
| 描述： | Analog IC
|
| 文件： | 总9页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
l
LAMBDA ADVANCED ANALOG INC.
AHE281XD Series
Dual Output, Hybrid - High Reliability
DC/DC Converter
DESCRIPTION
FEATURES
The AHE Series of DC/DC converters feature high
power density and an extended temperature range
for use in military and industrial applications.
Designed to MIL-STD-704 input requirements, these
devices have nominal 28VDC inputs with ±12V and
±15V dual outputs to satisfy a wide range of
requirements. The circuit design incorporates a
pulse width modulated push-pull topology operating
in the feed-forward mode at a nominal switching
frequency of 250KHz. Input to output isolation is
achieved through the use of transformers in the
forward and feedback circuits.
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17 To 40 Volt Input Range (28VDC Nominal)
± 12 and ± 15 Volt Outputs Available
Indefinite Short Circuit and Overload
Protection
12.9W/in3 Power Density
n
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15 Watts Output Power
Fast Loop Response For Superior Transient
Characteristics
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Operating Temperature Range From -55°C to
+125°C Available
The advanced feedback design provides fast loop
response for superior line and load transient
characteristics and offers greater reliability and
radiation tolerance than devices incorporating
optical feedback circuits.
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Popular Industry Standard Pin-Out
Resistance Seam Welded Case For Superior
Long Term Hermeticity
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Efficiencies Up to 82%
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are available in four
screening grades to satisfy a wide range of
requirements. The CH grade is fully compliant to
the requirements of MIL-PRF-38534 for class H.
The HB grade is processed and screened to the
class H requirement, but may not necessarily meet
all of the other MIL-PRF-38534 requirements, e.g.,
element evaluation and Periodic Inspection (P.I.)
not required. Both grades are tested to meet the
complete group "A" test specification over the full
military temperature range without output power
deration. Two grades with more limited screening
are also available for use in less demanding
applications. Variations in electrical, mechanical
and screening can be accommodated. Contact
Lambda Advanced Analog for special requirements.
Shutdown From External Signal
Military Screening
314,000 Hour MTBF at 85°C, AUC
SPECIFICATIONS
AHE2812D
ABSOLUTE MAXIMUM RATINGS
Input Voltage
-0.5V to 50V
Soldering Temperature
Case Temperature
300°C for 10 seconds
Operating-55°C to +125°C
Storage -65°C to +135°C
TABLE I. Electrical Performance Characteristics
Test
Symbol
Conditions
-55°C £ TC £ +125°C
Group A
subgroups
Device
types
Limits
Unit
VIN = 28 V dc ±5%, CL = 0 unless
otherwise specified
Min
±11.88
Max
Output voltage
VOUT
IOUT = 0
1
All
±12.12
±12.24
V
2,3
±11.76
0.0
Output current 9/ 11/
IOUT
VRIP
VIN = 17, 28, and 40 V dc
1,2,3
1,2,3
All
All
±625 mA
Output ripple voltage 8/ 9/
VIN = 17, 28, and 40 V dc
B.W. = dc to 2 mHz
60 mV p-p
Output power 4/ 9/ 11/
POUT
VIN = 17, 28, and 40 V dc
1,2,3
1
All
All
15
W
Line
9/
VRLINE
VIN = 17, 28, and 40 V dc
30 mV
regulation 10/
IOUT = 0, ±313, and ±625 mA
2,3
60
Load
regulation 9/
VRLOAD
VIN = 17, 28, and 40 V dc
IOUT = 0, ±313, and ±625 mA
1,2,3
All
All
120 mV
IOUT = 0, inhibit (pin 2) tied to input
return (pin 10)
Input current
IIN
1,2,3
18 mA
IOUT = 0,
40
inhibit (pin 2) = open
Input ripple current 8/
Efficiency
IRIP
EFF
ISO
IOUT = ±625 mA
B.W. = dc to 2 MHz
1,2,3
All
All
All
50 mA p-p
IOUT = ±625 mA,
TC = +25°C
1
1
80
%
Isolation
Input to output or any pin
to case (except pin 8) at 500 V dc, TC
+25°C
100
MW
=
Capacitive load 6/ 12/
No effect on dc performance,
TC = +25°C
CL
PD
4
1
All
All
200 µF
Power dissipation
load fault
6
6
W
Overload, TC = +25°C 3/
Short circuit, TC = +25°C
See footnotes at end of table
2
AHE2812D
TABLE I. Electrical Performance Characteristics - Continued
Test
Symbol
Conditions
-55°C £ TC £ +125°C
Group A
Subgroups
Device
Type
Limits
Unit
VIN = 28 V dc ±5%, CL = 0 unless
otherwise specified
Min
225
Max
9/
Switching
frequency
FS
IOUT = ±625 mA
4,5,6
01
275 KHz
02
03
225
250
245
275
Output response to step transient
load changes
VOTLOAD
50 percent load to/from 100 percent load
4
All
-300
+300 mV pk
7/
5,6
4
-450
-500
-750
+450
No load to/from 50 percent load
All
All
+500
5,6
4
+750
Recovery time step transient load
changes
TTLOAD
50 percent load to/from 100 percent load
70 µs
1/ 7/
5,6
100
No load to 50 percent load
50 percent load to no load
Input step 17 TO 40 V dc
4,5,6
4,5,6
4,5,6
All
All
All
1500
5
ms
Output response to transient step
line changes 5/ 12/
VOTLINE
1200 mV pk
-1500
Input step 40 TO 17 V dc
Input step 17 TO 40 V dc
4,5,6
4,5,6
All
All
Recovery time transient step
line changes 1/ 5/ 12/
TTLINE
4
4
ms
Input step 40 TO 17 V dc
IOUT = 0 and ±625 mA
IOUT = 0 and ±625 mA
4,5,6
4,5,6
4,5,6
4,5,6
All
All
All
All
9/
Turn on overshoot
VTonOS
TonD
600 mV pk
10 ms
Turn on delay 2/ 9/
Load fault recovery 12/
TrLF
10 ms
Notes:
1/ Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load.
2/ Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the
input.
3/ An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum
power dissipation.
4/ Total power at both outputs. For operation at 16 V dc input, derate output power by 33 percent.
5/ Input step transition time between 2 and 10 microseconds.
6/ Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of the maximum limit will not
disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on.
7/ Load step transition time between 2 and 10 microseconds.
8/ Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
9/ Tested at each output.
10/ When operating with unbalanced loads, at least 25 percent of the load must be on the positive output to maintain regulation.
11/ Parameter guaranteed by line and load regulation tests.
12/ Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified in Table I.
3
SPECIFICATIONS
AHE2815D
ABSOLUTE MAXIMUM RATINGS
Input Voltage
-0.5V to 50V
Soldering Temperature
Case Temperature
300°C for 10 seconds
Operating-55°C to +125°C
Storage -65°C to +135°C
TABLE II. Electrical Performance Characteristics
Test
Symbol
Conditions
-55°C £ TC £ +125°C
Group A
subgroups
Device
types
Limits
Unit
VIN = 28 V dc ±5%, CL = 0 unless
otherwise specified
Min
±14.85
Max
±15.15
±15.30
Output voltage
VOUT
IOUT = 0
1
All
V
2,3
±14.70
0.0
Output current 9/
11/
IOUT
VIN = 17, 28, and 40 V dc
1,2,3
All
All
±500 mA
Output ripple 8/
VIN = 17, 28, and 40 V dc
B.W. = dc to 2 mHz
VRIP
1,2,3
60 mV p-p
voltage
Output power 4/
Line 9/
9/
9/ 11/
POUT
VIN = 17, 28, and 40 V dc
1,2,3
1
All
All
15
W
VRLINE
VIN = 17, 28, and 40 V dc
35 mV
regulation 10/
IOUT = 0, ±250, and ±500 mA
2,3
75
Load
regulation 9/
VRLOAD
VIN = 17, 28, and 40 V dc
IOUT = 0, ±250, and ±500 mA
1,2,3
All
All
150 mV
IOUT = 0, inhibit (pin 2) tied to input return
(pin 10)
Input current
IIN
1,2,3
1,2,3
18 ma
IOUT = 0,
inhibit (pin 2) = open
40
Input ripple 8/
current
IRIP
IOUT = ±500 mA
B.W. = dc to 2 MHz
All
50 mA p-p
Efficiency
Isolation
EFF
IOUT = ±500 mA,
TC = +25°C
1
1
All
All
80
%
ISO
Input to output or any pin
100
MW
to case (except pin 8) at 500 V dc, TC
=
+25°C
Capacitive load 6/ 12/
CL
PD
No effect on dc performance,
TC = +25°C
4
1
All
All
200 µF
Power dissipation
load fault
6
W
Overload, TC = +25°C 3/
4
AHE2815D
TABLE II. Electrical Performance Characteristics - Continued.
Test
Symbol
Conditions
-55°C £ TC £ +125°C
Group A
Subgroups
Device
Type
Limits
Unit
VIN = 28 V dc ±5%, CL = 0 unless
otherwise specified
Min
Max
Switching
frequency
9/
FS
IOUT = ±500 mA
4,5,6
01
225
275 KHz
02
03
225
250
245
275
Output response to step transient
load changes 7/
VOTLOAD
50 percent load to/from 100 percent load
4
All
-300
+300 mV pk
5,6
4
-450
-500
-750
+450
No load to/from 50 percent load
All
All
+500
5,6
4
+750
Recovery time step transient load
TTLOAD
50 percent load to/from 100 percent load
70 µs
changes transient load changes 1/ 7/
5,6
4,5,6
4,5,6
4,5,6
100
No load to 50 percent load
50 percent load to no load
Input step 17 to 40 V dc
All
All
All
1500
5
ms
Output response to transient step line
changes 5/ 12/
VOTLINE
1500 mV pk
-1500
Input step 40 to 17 V dc
Input step 17 to 40 V dc
4,5,6
4,5,6
All
All
Recovery time transient step line
changes 1/ 5/ 12/
TTLINE
4
4
ms
Input step 40 to 17 V dc
IOUT = 0 and ±500 mA
IOUT = 0 and ±500 mA
4,5,6
4,5,6
4,5,6
4,5,6
All
All
All
All
Turn on overshoot 9/
Turn on delay 2/ 9/
VTonOS
TonD
600 mV pk
10 ms
Load fault recovery 12/
TrLF
10 ms
Notes:
1/ Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load.
2/ Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input.
3/ An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation.
4/ Total power at both outputs. For operation at 16 V dc input, derate output power by 33 percent.
5/ Input step transition time between 2 and 10 microseconds.
6/ Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may
interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn on.
7/ Load step transition time between 2 and 10 microseconds.
8/ Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
9/ Tested at each output.
10/ When operating with unbalanced loads, at least 25 percent of the load must be on the positive output to maintain regulation.
11/ Parameter guaranteed by line and load regulation tests.
12/ Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified in Table II.
5
BLOCK DIAGRAM (Single Output)
INPUT
FILTER
1
OUTPUT
FILTER
3
5
2
CONTROLLER
REGULATOR
& OUTPUT
FILTER
9
ERROR
AMP
& REF
10
4
APPLICATION INFORMATION
designer must assign one of the converters as the
master. Then, by definition, the remaining
converters become slaves and will operate at the
masters' switching frequency. The user should
be aware that the synchronozation system is fail-safe;
that is, the slaves will continue operating should the
master frequency be interrupted for any reason.
The layout must be such that the synchronozation
output (Pin 9) of the master device is connected to
the synchronozation input (Pin 9) of each slave
device. It is advisable to keep this run short to
minimize the possibilty of radiating the 250KHz
switching frequency.
Inhibit Function
Connecting the inhibit input (Pin 2) to input
common (Pin 10) will cause the converter to shut
down. It is recommended that the inhibit pin be
driven by an open collector device capable of
sinking at least 400µA of current. The open circuit
voltage of the inhibit input is 11.5 +1 VDC.
EMI Filter
An optional EMI filter (AFC461) will reduce the
input ripple current to levels below the limits
imposed by MIL-STD-461 CEO3.
Device Synchronization
Whenever multiple DC/DC converters are utilized
in a single system, significant low frequency noise
may be generated due to slight difference in the
switching frequencies of the converters (beat
frequency noise). Because of the low frequency
nature of this noise (typically less than 10 KHz), it
is difficult to filter out and may interfere with
proper operation of sensitive systems (communi-
cations, radar or telemetry). Lambda Advanced
Analog offers an option which provides synchroniza-
tion of multiple AHE/ATW converters, thus eliminat-
ing this type of noise.
The appropriate parts must be ordered to utilize
this feature. After selecting the converters
required for the system, an ‘MSTR’ suffix is
added for the master converter part number and
an ‘SLV’ suffix is added for slave part number.
To take advantage of this capability, the system
6
1
5
4
+5V
AHE2805S/ES-MSTR
MASTER
FILTER
10
COMM
3
4
5
+15V
COMM
-15V
1
AHE2815D/ES-SLV
SLAVE
10
SYSTEM
BUS
1
5
4
+12V
AHE2812S/ES-SLV
SLAVE
10
COMM
Typical Synchronization Connection Diagram
HB Screening Process
PIN DESIGNATION
Per MIL-PRF-38534
AHE2812D
AHE2815D
TestInspection
Method
Conditlon
Pre-SealInternalVisual
StabilizationBake
TemperatureCycling
ConstantAcceleration
Burn-in
Final Electrical Test
Gross Leak
FineLeak
2017
1008
1010
2001
1015
C
C
Pin 1 Positive input
Pin 2 Inhibit input
Pin 3 Positive output
Pin 4 Output common
Pin 5 Negative output
Pin 10 Input common
Pin 9 N/C or sync.
Pin 8 Case ground
Pin 7 N/C
A, Y1 direction
TC = +125°C
Tc = -55,+25,+125°C
1014
1014
2009
C
A
Pin 6 N/C
ExternalVisual
ES Screening Process
Same as HB screening except as follows:
TestInspection
Method
ConstantAcceleration
Burn-in
FinalElectrical
2001,500g’s
1015,96hrs.
25°C only
PART NUMBER
AHF 28 xx D x / x - xxx
Model
Input Voltage
Synchronization Option
MSTR—Master
SLV—Slave
Output Voltage
12–12 VDC
Temperature Range
15–15 VDC
Omit for -55°C to +85°C
ES— -55°C to +105°C
HB— -55°C to +125°C
Dual Output
Package Option
F—Flange
Omit for standard
7
MECHANICAL OUTLINE
.090R max.
.090R max.
1.120 max.
(28.194)
0.800
(20.320)
Pin 1
0.040D x 0.260L
(1.016) (6.604)
2.120 max.
(53.594)
Input
Common
10
1
Pos. Input
0.495 max.
(12.573)
N/C or
synchronization
Inhibit
Input
Case
Ground
Pos. Output
4 x 0.400 = 1.600
(10.160) (40.640)
Bottom
View
Output
Common
6
5
Neg. Output
2.880 max.
(73.152)
.090R max.
1.110
0.800
(28.194)
(20.320)
Pin 1
±.010
2.550
(64.770)
0.162D 2 places
(4.115)
2.120 max.
(53.594)
0.495 max.
(12.573)
4 x 0.400 = 1.600
(10.160) (40.640)
0.040D x 0.260L
(1.016) (6.604)
Weight
Standard—55 grams max.
Flange—58 grams max.
8
AHE2815D EFFICIENCY
STANDARDIZED MILITARY DRAWING
CROSS REFERENCE
Standardized
militarydrawing
PIN
Vendor
CAGE
number
Vendor
similar
PIN
5962-9157501HXX
5962-9157501HZX
5962-9157502HXX
5962-9157502HZX
5962-9157503HXX
5962-9157503HZX
52467
52467
52467
52467
52467
52467
AHE2815D/CH
AHE2815DF/CH
AHE2815D/CH-SLV
AHE2815DF/CH-SLV
AHE2815D/CH-MSTR
AHE2815DF/CH-MSTR
Standardized
militarydrawing
PIN
Vendor
CAGE
number
Vendor
similar
PIN
AHE2812D EFFICIENCY
5962-9204001HXX
5962-9204001HZX
5962-9204002HXX
5962-9204002HZX
5962-9204003HXX
5962-9204003HZX
52467
52467
52467
52467
52467
52467
AHE2812D/CH
AHE2812DF/CH
AHE2812D/CH-SLV
AHE2812DF/CH-SLV
AHE2812D/CH-MSTR
AHE2812DF/CH-MSTR
Output Power (Watts)
The information in this data sheet has been carefully checked and is believed to be accurate, however, no
responsibility is assumed for possible errors. The specifications are subject to change without notice.
©Lambda Advanced Analog
9849
2270 Martin Avenue
Santa Clara CA 95050-2781
(408) 988-4930 FAX (408) 988-2702
MIL-PRF-38534 Certified
ISO9001 Rgstrd
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