AM29200? [ETC]
Am29200? and Am29205? Controller Data Sheet ; Am29200 ？和Am29205 ？控制器数据表\n
| 型号： | AM29200? |
| 厂家： | 
ETC |
| 描述： | Am29200? and Am29205? Controller Data Sheet
|
| 文件： | 总33页 (文件大小：326K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
Advanced
Micro
Am29200 and Am29205
RISC Microcontrollers
Devices
DISTINCTIVE CHARACTERISTICS
Am29200 Microcontroller
Glueless system interfaces with on-chip wait
state control
Completely integrated system for embedded
applications
Four banks of ROM, each separately
programmable for 8-, 16-, or 32-bit interface
Full 32-bit architecture
Four banks of DRAM, each separately
programmable for 16- or 32-bit interface
CMOS technology/TTL-compatible
16- and 20-MHz operating frequencies
Burst-mode and page-mode access support
On-chip DRAM mapping
8 million instructions per second (MIPS)
sustained at 16 MHz
Two-channel DMA controller with
queuing on one channel
304-Mbyte address space
192 general-purpose registers
Three-address instruction architecture
Fully pipelined
6-port peripheral interface adapter
16-line programmable I/O port
Am29200 MICROCONTROLLER BLOCK DIAGRAM
Clock/
Control
Lines
2 DREQ
2 DACK
GREQ/GACK/TDMA
Parallel Port
Control/Status
Lines
4
5
7
5
STAT
MEMCLK
6
JTAG
4
4
6
16
Parallel Port
Controller
2-Channel DMA
Controller
Serial
Data
I/O
Programmable
I/O Port
Serial Port
Printer/Scanner
Video
Interrupts, Traps
Serializer/
Deserializer
Interrupt
Controller
Am29000 CPU
ROM
Chip Selects
RAS/CAS
4/4
ROM
Controller
DRAM Controller
Timer/Counter
4
PIA
Controller
ROM
Space
6
24
32
Instruction/Data
Bus
DRAM
Address
Bus
PIA
Chip Selects
Memory
Peripherals
Publication# 16361 Rev. C Amendment /0
Issue Date: January 1994. WWW: 5/4/95.
This document contains information on a product under development at Advanced Micro Devices, Inc. The information is intended
to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
P R E L I M I N A R Y
Binary compatibility with all 29K Family
AMD
Bidirectional bit serializer/deserializer
(video interface)
microcontrollers and microprocessors
Serial port (UART)
Advanced debugging support
Bidirectional parallel port controller
Interrupt controller
IEEE Std 1149.1-1990 (JTAG) compliant
Standard Test Access Port and Boundary Scan
Architecture
On-chip timer
DISTINCTIVE CHARACTERISTICS
Am29205 Microcontroller
The low-cost Am29205 microcontroller is similar to the
Am29200 microcontroller, with a 16-bit instruction/data
bus, fewer peripheral ports, and no JTAG interface. It in-
cludes the following features:
Fully functional 16-bit DRAM interface
complete with address MUXing, Refresh, and
RAS/CAS generation
—Page-mode access support
—On-chip DRAM mapping
Completely integrated system for embedded
applications
Two-port peripheral interface adapter
Eight-line programmable I/O port
Full 16-bit external, 32-bit internal architecture
Bidirectional bit serializer/deserializer
(video interface)
Upgradeable to the Am29200 32-bit RISC
microcontroller
Serial port (UART)
12- and 16-MHz operating frequencies
68-Mbyte address space
Bidirectional parallel port controller
Interrupt controller
Two-channel DMA controller (one external)
On-chip timer
Three separately programmable ROM banks
with 8- and 16-bit ROM interface
Binary compatibility with all 29K Family
microcontrollers and microprocessors
Am29205 MICROCONTROLLER BLOCK DIAGRAM
Clock/
Control
Lines
Parallel Port
Control/Status
Lines
3
2
DREQ
DACK
6
MEMCLK
4
2
2
8
Parallel Port
Controller
DMA
Controller
Serial
Data
I/O
Programmable
I/O Port
Serial Port
Printer/Scanner
Video
Interrupts
Serializer/
Deserializer
Interrupt
Controller
Am29000 CPU
ROM
Chip Selects
RAS/CAS
4/2
ROM
Controller
DRAM Controller
Timer/Counter
3
PIA
Controller
ROM
Space
2
22
16
Instruction/Data
Bus
DRAM
Address
Bus
PIA
Chip Selects
Memory
Peripherals
2
Am29200 and Am29205 RISC Microcontrollers
A D V A N C E I N F O R M A T I O N
AMD
TABLE OF CONTENTS
DISTINCTIVE CHARACTERISTICS
1
Am29200 MICROCONTROLLER
Block Diagram
1
1
Am29205 MICROCONTROLLER
Block Diagram
2
2
GENERAL DESCRIPTION
5
RELATED AMD PRODUCTS
5
7
7
29K FAMILY DEVELOPMENT SUPPORT PRODUCTS
THIRD-PARTY DEVELOPMENT SUPPORT PRODUCTS
KEY FEATURES AND BENEFITS
Complete Set of Common SystemPeripherals
Wide Range of Price/Performance Points
Glueless System Interfaces
7
7
8
8
Bus- and Binary-Compatibility
Performance Overview
8
9
Debugging And Testing
10
CONNECTION DIAGRAMS
11
Am29200 MICROCONTROLLER
11
11
12
13
168-Lead Plastic Quad Flat Pack (PQR 168)
PQFP Pin Designations by Pin Number
PQFP Pin Designations by Pin Name
Am29205 MICROCONTROLLER
14
14
15
16
100-Lead Plastic Quad Flat Pack (PQB 100)
PQFP Pin Designations by Pin Number
PQFP Pin Designations by Pin Name
LOGIC SYMBOLS
17
Am29200 MICROCONTROLLER
Am29205 MICROCONTROLLER
17
18
ORDERING INFORMATION
19
Am29200 MICROCONTROLLER
Am29205 MICROCONTROLLER
19
20
ABSOLUTE MAXIMUM RATINGS
21
21
21
OPERATING RANGES
DC CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 MICROCONTROLLER
Am29205 MICROCONTROLLER
21
23
CAPACITANCE
21
Am29200 MICROCONTROLLER
Am29205 MICROCONTROLLER
21
23
3
Am29200 and Am29205 RISC Microcontrollers
AMD
A D V A N C E I N F O R M A T I O N
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 MICROCONTROLLER
Am29205 MICROCONTROLLER
22
24
SWITCHING WAVEFORMS
SWITCHING TEST CIRCUIT
THERMAL CHARACTERISTICS
PHYSICAL DIMENSIONS
25
26
26
28
Am29200 MICROCONTROLLER
28
28
29
30
PQR 168—Plastic Quad Flat Pack; Molded Carrier Ring
PQR 168—Plastic Quad Flat Pack; Trimmed and Formed
Solder Land Recommendations
Am29205 MICROCONTROLLER
31
31
32
33
PQB 100—Plastic Quad Flat Pack; Molded Carrier Ring
PQB 100—Plastic Quad Flat Pack; Trimmed And Formed
Solder Land Recommendations
4
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
GENERAL DESCRIPTION
The Am29200 and Am29205 RISC microcontrollers are
highly integrated, 32-bit embedded processors imple-
mented in complementary metal-oxide semiconductor
(CMOS) technology. Based on the 29K architecture, the
Am29200 and Am29205 microcontrollers are part of a
growing family of RISC microcontrollers, which also in-
cludes the high-performance Am29240 , Am29245 ,
and Am29243 RISC microcontrollers. A feature sum-
mary of the Am29200 RISC microcontroller family is in-
cluded in Table 1.
tners, the Am29200 and Am29205 microcontrollers
provide very quick time-to-market.
Am29200 Microcontroller
The Am29200 microcontroller meets the common re-
quirements of embedded applications such as industrial
control, graphics processing, imaging applications, la-
ser printers, and general purpose applications requiring
high performance in a compact design.
The Am29200 microcontroller is available in a 168-lead
PlasticQuadFlatPack(PQFP)package. ThePQFPhas
140 signal pins and 28 power/ground pins.
Through submicron technology, the Am29200 and
Am29205 microcontrollers incorporate a complete set
of system facilities commonly found in printing, imaging,
graphics, and other embedded applications. The on-
chip functions include: a ROM controller, a DRAM con-
troller, a peripheral interface adapter, a DMA controller,
aserializer/deserializer, a programmable I/O port, a par-
allel port, a serial port, and an interrupt controller. For a
complete description of the technical features, on-chip
peripherals, programming interface, and instruction set,
please refer to the Am29200 and Am29205 RISC Micro-
controllers User’s Manual (order #16362).
Am29205 Microcontroller
The Am29205 RISC microcontroller is a highly inte-
grated, low-cost derivative of the Am29200 32-bit RISC
microcontroller. The Am29205 microcontroller is func-
tionally very similar to an Am29200 microcontroller op-
erating with 16-bit external memories.
The Am29205 microcontroller is designed specifically
for low-cost general purpose embedded applications,
as well as graphics processors, mass storage control-
lers, network interfaces, application program interface
(API) accelerators, scanners, and laser printers.
The Am29200 and Am29205 RISC microcontrollers are
well suited for embedded applications since they provide
better performance than the CISC processors typically
used in these applications. Compared to the CISC pro-
cessors, the Am29200 and Am29205 microcontrollers
offer superior price/performance and design flexibility for
the designer. Coupled with hardware and software devel-
opment tools from AMD and the AMD Fusion29K Par-
The Am29205 microcontroller is available in a 100-lead
PQFP package. The PQFP has 84 signal pins and 16
power/ground pins.
RELATED AMD PRODUCTS
29K Family Devices
Part No.
Description
Am29000
Am29005
Am29030
Am29035
Am29050
Am29240
Am29245
Am29243
32-bit RISC microprocessor
Low-cost 32-bit RISC microprocessor with no MMU and no branch target cache
32-bit RISC microprocessor with 8-Kbyte instruction cache
32-bit RISC microprocessor with 4-Kbyte instruction cache
32-bit RISC microprocessor with on-chip floating point
32-bit RISC microcontroller with 4-Kbyte instruction cache and 2-Kbyte data cache
Low-cost 32-bit RISC microcontroller with 4-Kbyte instruction cache
32-bit RISC data microcontroller with instruction and data caches and DRAM parity
5
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Table 1. Product Comparison—Am29200 Microcontroller Family
FEATURE
Am29205
Am29200
Am29245
Am29240
Am29243
Microcontroller Microcontroller Microcontroller Microcontroller Microcontroller
Instruction Cache
Data Cache
—
—
—
—
4 Kbytes
—
4 Kbytes
2 Kbytes
32 x 32-bit
4 Kbytes
2 Kbytes
32 x 32-bit
Integer Multiplier
Software
—
Software
—
Software
Memory Management
Unit (MMU)
1 TLB
16 Entry
1 TLB
16 Entry
2 TLBs
32 Entry
Data Bus Width
Internal
External
32 bits
16 bits
32 bits
32 bits
32 bits
32 bits
32 bits
32 bits
32 bits
32 bits
ROM Interface
Banks
Width
ROM Size (Max/Bank)
Boot-Up ROM Width
Burst-Mode Access
3
4
4
4
4
8, 16 bits
4 Mbytes
16 bits
8, 16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
8, 16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
8, 16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
Not Supported
DRAM Interface
Banks
Width
Size: 32-Bit Mode
Size: 16-Bit Mode
Video DRAM
Access Cycles
Initial/Burst
4
4
4
4
4
16 bits only
16, 32 bits
16, 32 bits
16, 32 bits
8, 16, 32 bits
16 Mbytes/bank
8 Mbytes/bank
Not Supported
—
16 Mbytes/bank
8 Mbytes/bank
Supported
16 Mbytes/bank
8 Mbytes/bank
Supported
16 Mbytes/bank
8 Mbytes/bank
Supported
8 Mbytes/bank
Not Supported
3/2
No
3/2
No
2/1
No
2/1
No
2/1
Yes
DRAM Parity
On-Chip DMA
Width (ext. peripherals)
Externally Controlled
External Master Access
External Master Burst
External Terminate Signal
8, 16 bits
1 Channel
No
8, 16, 32 bits
2 Channels
Yes
8, 16, 32 bits
2 Channels
Yes
8, 16, 32 bits
4 Channels
Yes
8, 16, 32 bits
4 Channels
Yes
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Double-Frequency
CPU Option
No
No
No
No
No
Yes
Yes
Yes
Yes
Low Voltage Operation
Yes
Peripheral Interface
Adapter (PIA)
PIA Ports
Data Width
Min. Cycles Access
2
8, 16 bits
3
6
6
6
6
8, 16, 32 bits
3
8, 16, 32 bits
2
8, 16, 32 bits
2
8, 16, 32 bits
2
Programmable I/O Port
(PIO)
Signals
Signals programmable
for interrupt generation
8
8
16
8
16
8
16
8
16
8
Serial Ports
Ports
DSR/DTR
1 Port
PIO signals
1 Port
Supported
1 Port
Supported
2 Ports
2 Ports
1 Port Supported 1 Port Supported
Interrupt Controller
External Interrupt Pins
External Trap and Warn
Pins
2
0
4
3
4
3
4
3
4
3
Parallel Port Controller
32-Bit Transfer
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
JTAG Debug Support
Serializer/Deserializer
Pin Count and Package
Processor Clock Rate
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
100 PQFP
12, 16 MHz
168 PQFP
16, 20 MHz
196 PQFP
16 MHz
196 PQFP
20, 25, 33 MHz
196 PQFP
20, 25, 33 MHz
6
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
29K FAMILY DEVELOPMENT SUPPORT PRODUCTS
Contact your local AMD representative for information
on the complete set of development support tools. The
following software and hardware development products
are available on several hosts:
Assembler and utility packages
Source- and assembly-level software debuggers
Target-resident development monitors
Simulators
Optimizing compilers for common high-level
languages
Execution boards
THIRD-PARTY DEVELOPMENT SUPPORT PRODUCTS
The Fusion29K Program of Partnerships for Application
Solutions provides the user with a vast array of products
designed to meet critical time-to-market needs. Prod-
ucts and solutions available from the AMD Fusion29K
Partners include
Board level products
Laser printer solutions
Networking and communication solutions
Multiuser, kernel, and real-time operating systems
Graphics solutions
Silicon products
Manufacturing support
Software generation and debug tools
Hardware development tools
Custom software consulting, support, and training
KEY FEATURES AND BENEFITS
DRAM Controller
Complete Set of Common System
Peripherals
The DRAM controller supports four separate banks of
dynamic memory. On the Am29200 microcontroller,
each bank can be a different size: either 16 or 32 bits
wide. DRAM banks on the Am29205 microcontroller are
16 bits wide. The DRAM banks can appear as a contigu-
ous memory area of up to 64 Mbytes in size on the
Am29200 microcontroller and 32 Mbytes on the
Am29205 microcontroller. To support system functions
such as on-the-fly data compression and decompres-
sion, four 64-Kbyte regions of the DRAM can be mapped
into a 16-Mbyte virtual address space.
The Am29200 and Am29205 microcontrollers minimize
system cost by incorporating a complete set of system
facilities commonly found in embedded applications,
eliminating the cost of additional components.
The on-chip functions include: a ROM controller, a
DRAM controller, a peripheral interface adapter, a DMA
controller, a programmable I/O port, a parallel port, a se-
rialport, andaninterruptcontroller. Aserializer/deserial-
izer (video interface) is also included for printer,
scanner, and other imaging applications.
DMA Controller
By providing glueless interfacing to external memories
and a complete set of common system peripherals on-
chip, these microcontrollers let product designers ca-
pitalize on the very low system cost made possible by
the integration of processor and peripherals. Many sim-
ple systems can be built using only the Am29200 or
Am29205 microcontroller and external ROM and/or
DRAM memory.
The DMA controller in the Am29200 microcontroller pro-
vides two channels for transfer of data between the
DRAM and internal or external peripherals. One of the
DMA channels is double buffered to relax the
constraints on the reload time. On the Am29205 micro-
controller, internal 32-bit transfers are supported on two
DMA channels; external transfers are limited to 8- or
16-bit data accesses on one DMA channel.
ROM Controller
Peripheral Interface Adapter (PIA)
The ROM controller supports four individual banks of
ROM or other static memory in the Am29200 microcon-
troller and three banks in the Am29205 microcontroller.
Each ROM bank has its own timing characteristics, and
each bank may be of a different size: either 8, 16, or 32
bits wide in the Am29200 microcontroller and 8 or 16 bits
wide in the Am29205 microcontroller. The ROM banks
can appear as a contiguous memory area of up to 64
Mbytes in size on the Am29200 microcontroller. The
ROM controller also supports writes to the ROM memory
space for devices such as flash EPROMs and SRAMs.
The peripheral interface adapter allows for additional
system features implemented by external peripheral
chips. The PIA permits glueless interfacing from the
Am29200 microcontroller to as many as six external pe-
ripheral regions and from the Am29205 microcontroller
to two external peripherals.
Interrupt Controller
The interrupt controller generates and reports the status
of interrupts caused by on-chip peripherals.
7
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
I/O Port
Glueless System Interfaces
The Am29200 microcontroller’s I/O port permits direct
access to 16 individually programmable external input/
output signals. Eight signals are available on the
Am29205 microcontroller. These eight signals can be
configured to cause interrupts on either microcontroller.
The Am29200 and Am29205 microcontrollers minimize
system cost by providing a glueless attachment to exter-
nal ROMs, DRAMs, and other peripheral components.
Processor outputs have edge-rate control that allows
them to drive a wide range of load capacitances with low
noise and ringing. This eliminates the cost of external
logic and buffering.
Serializer/Deserializer
The bidirectional bit serializer/deserializer (video inter-
face) permits direct connection to a number of laser
marking engines, video displays, or raster input devices
such as scanners.
Bus- and Binary-Compatibility
Compatibility within a processor family is critical for
achieving a rational, easy upgrade path. The Am29200
and Am29205 microcontrollers are members of a bus-
compatible family of RISC microcontrollers, which also
includes the high-performance Am29240, Am29245,
and Am29243 microcontrollers. Future members of this
family will improve in price and performance and system
capabilities without requiring that users redesign their
systemhardwareorsoftware. Buscompatibilityensures
a convenient upgrade path for future systems.
Serial Port
The serial port implements a full-duplex UART.
Parallel Port
The parallel port implements a bidirectional IBM PC-
compatible parallel interface to a host processor.
Wide Range of Price/Performance Points
The Am29200 microcontroller is binary compatible with
the Am29240, Am29245, and Am29243 microcontrollers,
as well as the Am29000, Am29005, Am29030, Am29035,
and Am29050 microprocessors. The Am29200 microcon-
troller family provides a migration path to low-cost, highly
integrated systems for products based on other 29K
Family microprocessors, without requiring expensive re-
writes of application software.
To reduce design costs and time-to-market, one basic
system design can be used as the foundation for an en-
tire product line. From this design, numerous imple-
mentations of the product at various levels of price and
performance may be derived with minimum time, effort,
and cost.
The Am29200 and Am29205 microcontrollers provide
this capability through programmable memory widths,
burst-mode and page-mode access support, program-
mable wait states, and hardware and 29K Family soft-
ware compatibility. A system can be upgraded without
hardware and software redesign using various memory
architectures.
Complete Development and
Support Environment
A complete development and support environment is vi-
tal for reducing a product’s time-to-market. Advanced
Micro Devices has created a standard development en-
vironment for the 29K Family of processors. In addition,
theFusion29Kthird-partysupportorganizationprovides
the most comprehensive customer/partner program in
the embedded processor market.
The ROM controller on the Am29205 microcontroller ac-
commodates memories that are either 8 or 16 bits wide,
while that of the Am29200 microcontroller supports either
8-, 16-, or 32-bit memories. The DRAM controller on
the Am29205 microcontroller accommodates dynamic
memories that are 16 bits wide; the Am29200 micro-
controller supports either 16- or 32-bit memories.
Advanced Micro Devices offers a complete set of hard-
ware and software tools for design, integration, debug-
ging, and benchmarking. These tools, which are
available now for the 29K Family, include the following:
These unique features provide a flexible interface to
low-cost memory as well as a convenient, flexible up-
gradepath. Forexample, asystemcanstartwitha16-bit
memory design and can subsequently improve perfor-
mancebymigratingtoa32-bitmemorydesign. Onepar-
ticular advantage is the ability to add memory in
half-megabyte increments. This provides significant
cost savings for applications that do not require larger
memory upgrades.
High CR 29K optimizing C compiler with assem-
bler, linker, ANSI library functions, and 29K archi-
tectural simulator
XRAY29KTM source-level debugger
MiniMON29KTM debug monitor
A complete family of demonstration and develop-
ment boards
In addition, Advanced Micro Devices has developed a
standard host interface (HIF) specification for operating
system services, the Universal Debug Interface (UDI) for
seamless connection of debuggers to ICEs and target
The Am29200 microcontroller family allows users to ad-
dress a wide range of cost performance points, with
higher performance and lower cost than existing de-
signs based on CISC microprocessors.
8
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
hardware, and extensions for the UNIX common object
AMD
Instruction Set Overview
file format (COFF).
The Am29200 and Am29205 microcontrollers employ a
three-address instruction set architecture. The compiler
or assembly-language programmer is given complete
freedom to allocate register usage. There are 192 gen-
eral-purpose registers, allowing the retention of inter-
mediate calculations and avoiding needless data
destruction. Instruction operands may be contained in
any of the general-purpose registers, and the results
may be stored into any of the general-purpose registers.
This support is augmented by an engineering hotline, an
on-line bulletin board, and field application engineers.
PERFORMANCE OVERVIEW
The Am29200 and Am29205 microcontrollers offer a
significant margin of performance over CISC micropro-
cessors in existing embedded designs, since the majority
of processor features were defined for the maximum
achievable performance at a very low cost. This sec-
tion describes the features of the Am29200 and
Am29205 microcontrollers from the point of view of
system performance.
The instruction set contains 117 instructions that are di-
vided into nine classes. These classes are integer arith-
metic, compare, logical, shift, data movement, constant,
floating point, branch, and miscellaneous. The floating-
point instructions are not executed directly, but are emu-
lated by trap handlers.
Instruction Timing
The Am29200 and Am29205 microcontrollers use an
arithmetic/logic unit, a field shift unit, and a prioritizer to
execute most instructions. Each of these is organized to
operate on 32-bit operands and provide a 32-bit result.
All operations are performed in a single cycle.
All directly implemented instructions are capable of
executing in one processor cycle, with the exception of
interrupt returns, loads, and stores.
Data Formats
The performance degradation of load and store opera-
tions is minimized in the Am29200 and Am29205 micro-
controllers by overlapping them with instruction
execution, by taking advantage of pipelining, and by or-
ganizing the flow of external data into the processor so
that the impact of external accesses is minimized.
The Am29200 and Am29205 microcontrollers define a
word as 32 bits of data, a half-word as 16 bits, and a byte
as8bits. Thehardwareprovidesdirectsupportforword-
integer (signed and unsigned), word-logical, word-bool-
ean, half-word integer (signed and unsigned), and
character data (signed and unsigned).
Word-boolean data is based on the value contained in
the most significant bit of the word. The values TRUE
and FALSE are represented by the MSB values 1 and 0,
respectively.
Pipelining
Instruction operations are overlapped with instruction
fetch, instruction decode and operand fetch, instruction
execution, and result write-back to the register file.
Pipeline forwarding logic detects pipelinedependencies
and routes data as required, avoiding delays that might
arise from these dependencies.
Other data formats, such as character strings, are sup-
ported by instruction sequences. Floating-point formats
(single and double precision) are defined for the proces-
sor; however, there is no direct hardware support for these
formats in the Am29200 or Am29205 microcontroller.
Pipeline interlocks are implemented by processor hard-
ware. Except for a few special cases, it is not necessary
to rearrange programs to avoid pipeline dependencies,
although this is sometimes desirable for performance.
Protection
The Am29200 and Am29205 microcontrollers offer two
mutually exclusive modes of execution, the user and
supervisor modes, that restrict or permit accesses to
certain processor registers and external storage locations.
Burst-Mode and Page-Mode Memories
The Am29200 microcontroller directly supports burst-
mode memories in ROM address space. The burst-
mode memory supplies instructions at the maximum
bandwidth, without the complexity of an external cache
or the performance degradation due to cache misses.
The register file may be configured to restrict accesses
to supervisor-mode programs on a bank-by-bank basis.
DRAM Mapping
Both the Am29200 and Am29205 microcontrollers can
also use the page-mode capability of common DRAMs
to improve the access time in cases where page-mode
accesses can be used. This is particularly useful in very
low-cost systems with 16-bit-wide DRAMs, where the
DRAM must be accessed twice for each 32-bit operand.
The Am29200 and Am29205 microcontrollers provide a
16-Mbyteregionofvirtualmemorythatismappedtoone
of four 64-Kbyte blocks in the physical DRAM memory.
This supports system functions such as on-the-fly data
compression and decompression, allowing a large data
9
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
structure such as a frame buffer to be stored in a com-
pressed format while the application software operates
on a region of the structure that is decompressed. Using
a mechanism that is analogous to demand paging, sys-
tem software moves data between the compressed and
decompressed formats in a way that is invisible to the
applicationsoftware. Thisfeaturecangreatlyreducethe
amount of memory required for printing, imaging, and
graphics applications.
processor performs a vector fetch every time an inter-
rupt or trap is taken. The vector fetch requires at least
three cycles, in addition to the number of cycles required
for the basic memory access.
DEBUGGING AND TESTING
Software debugging on the Am29200 and Am29205 mi-
crocontrollers is facilitated by the instruction trace facil-
ity and instruction breakpoints. Instruction tracing is
accomplishedby forcing the processor to trap after each
instruction has been executed. Instruction breakpoints
are implemented by the HALT instruction or by a soft-
ware trap.
Interrupts and Traps
When the microcontroller takes an interrupt or trap, it
does not automatically save its current state information
in memory. This lightweight interrupt and trap facility
greatly improves the performance of temporary inter-
ruptions such as simple operating-system calls that re-
quire no saving of state information.
The Am29200 microcontroller provides two additional
features to assist system debugging and testing:
The test/development interface is composed of a
group of pins that indicate the state of the proces-
sor and control the operation of the processor.
In cases where the processor state must be saved, the
saving and restoring of state information is under the
control of software. The methods and data structures
used to handle interrupts—and the amount of state in-
formation saved—may be tailored to the needs of a par-
ticular system.
An IEEE Std. 1149.1–1990 (JTAG) compliant Stan-
dard Test Access Port and Boundary-Scan Archi-
tecture provides a scan interface for testing system
hardware in a production environment. It contains
extensions that allow a hardware-development
system to control and observe the processor with-
out interposing hardware between the processor
and system.
Interrupts and traps are dispatched through a 256-entry
vector table which directs the processor to a routine that
handles a given interrupt or trap. The vector table may
be relocated in memory by the modification of a proces-
sor register. There may be multiple vector tables in the
system, though only one is active at any given time.
Hardware testing and debugging on the Am29205 micro-
controller are supported by using an Am29200 microcon-
troller to emulate an Am29205 microcontroller.
The vector table is a table of pointers to the interrupt and
trap handlers and requires only 1 Kbyte of memory. The
10
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
CONNECTION DIAGRAMS
168-Lead Plastic Quad Flat Pack (PQR 168)—Am29200 Microcontroller
Top View
1
2
3
4
5
6
7
8
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
Note:
Pin 1 is marked for orientation.
11
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Number)—Am29200 Microcontroller
Pin No.
1
Pin Name
VCC
Pin No.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Pin Name
VCC
Pin No.
85
Pin Name
GND
VCC
Pin No.
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Pin Name
PIO12
PIO11
PIO10
PIO9
2
GND
MEMCLK
INCLK
VCC
GND
86
3
DTR
87
A23
4
RXD
88
A22
5
UCLK
VCC
89
A21
PIO8
6
GND
GND
VCC
90
A20
PIO7
7
GND
91
A19
VCC
8
DSR
92
A18
GND
9
ID31
ID30
ID29
ID28
GND
ID27
ID26
ID25
ID24
ID23
ID22
ID21
ID20
ID19
VCC
TXD
93
A17
PIO6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
ROMCS3
ROMCS2
ROMCS1
ROMCS0
BURST
RSWE
ROMOE
RAS3
94
A16
PIO5
95
A15
PIO4
96
A14
PIO3
97
A13
PIO2
98
A12
PIO1
99
A11
PIO0
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
A10
TDO
A9
STAT2
STAT1
STAT0
VDAT
PSYNC
GND
RAS2
A8
RAS1
A7
RAS0
A6
CAS3
A5
CAS2
A4
VCC
A3
VCC
ID18
ID17
ID16
ID15
ID14
ID13
ID12
ID11
ID10
ID9
GND
A2
GREQ
DREQ1
DREQ0
TDMA
TRAP0
TRAP1
INTR0
INTR1
INTR2
INTR3
WARN
GND
CAS1
A1
CAS0
A0
TR/OE
WE
VCC
GND
BOOTW
WAIT
PAUTOFD
PSTROBE
VCC
GACK
PIACS5
PIACS4
PIACS3
PIACS2
PIACS1
PIACS0
PIAWE
PIAOE
R/W
ID8
GND
PWE
POE
PACK
PBUSY
PIO15
PIO14
PIO13
GND
ID7
ID6
VCLK
LSYNC
TMS
ID5
ID4
ID3
DACK1
DACK0
GND
TRST
TCK
ID2
ID1
TDI
ID0
VCC
RESET
12
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Name)—Am29200 Microcontroller
Pin Name
A0
Pin No.
110
109
108
107
106
105
104
103
102
101
100
99
Pin Name
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GREQ
ID0
Pin No.
49
Pin Name
ID31
Pin No.
9
Pin Name
RAS2
RAS3
RESET
ROMCS0
ROMCS1
ROMCS2
ROMCS3
ROMOE
RSWE
RXD
Pin No.
60
A1
66
INCLK
INTR0
INTR1
INTR2
INTR3
LSYNC
MEMCLK
PACK
PAUTOFD
PBUSY
PIACS0
PIACS1
PIACS2
PIACS3
PIACS4
PIACS5
PIAOE
PIAWE
PIO0
4
59
A2
83
156
157
158
159
163
3
168
55
A3
85
A4
112
118
126
134
148
161
150
42
54
A5
53
A6
52
A7
58
A8
121
115
122
77
57
A9
46
A10
STAT0
STAT1
STAT2
TCK
145
144
143
166
167
153
142
164
69
A11
A12
98
ID1
41
76
A13
97
ID2
40
75
A14
96
ID3
39
74
TDI
A15
95
ID4
38
73
TDMA
TDO
A16
94
ID5
37
72
A17
93
ID6
36
79
TMS
A18
92
ID7
35
78
TR/OE
TRAP0
TRAP1
TRST
TXD
A19
91
ID8
34
141
140
139
138
137
136
135
132
131
130
129
128
127
125
124
123
120
116
147
119
80
154
155
165
51
A20
90
ID9
33
PIO1
A21
89
ID10
ID11
ID12
ID13
ID14
ID15
ID16
ID17
ID18
ID19
ID20
ID21
ID22
ID23
ID24
ID25
ID26
ID27
ID28
ID29
ID30
32
PIO2
A22
88
31
PIO3
A23
87
30
PIO4
UCLK
VCC
47
BOOTW
BURST
CAS0
CAS1
CAS2
CAS3
DACK0
DACK1
DREQ0
DREQ1
DSR
DTR
GACK
GND
GND
GND
GND
GND
113
56
29
PIO5
1
28
PIO6
VCC
5
68
27
PIO7
VCC
8
67
26
PIO8
VCC
23
64
25
PIO9
VCC
43
63
24
PIO10
PIO11
PIO12
PIO13
PIO14
PIO15
POE
VCC
48
82
22
VCC
65
81
21
VCC
84
152
151
50
20
VCC
86
19
VCC
111
117
133
149
162
146
114
160
70
18
VCC
45
17
VCC
71
16
PSTROBE
PSYNC
PWE
VCC
2
15
VCLK
VDAT
WAIT
WARN
WE
6
14
7
12
R/W
13
11
RAS0
62
44
10
RAS1
61
13
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
CONNECTION DIAGRAMS (continued)
100-Lead Plastic Quad Flat Pack (PQB 100)—Am29205 Microcontroller
Top View
1
2
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Note:
Pin 1 is marked for orientation.
14
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Number)—Am29205 Microcontroller
Pin No.
1
Pin Name
WAIT/TRIST
RESET
MEMCLK
INCLK
VCC
Pin No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin Name
RXD
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Pin Name
A21
Pin No.
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin Name
PAUTOFD
PSTROBE
PWE
2
UCLK
TXD
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
GND
VCC
GND
A9
3
4
VCC
VCC
5
GND
GND
6
GND
ROMCS2
ROMCS1
ROMCS0
RSWE
ROMOE
RAS3
POE
7
GND
PACK
8
ID31♦
ID30♦
ID29♦
ID28♦
ID27♦
ID26♦
VCC
PBUSY
PIO15♦
PIO14♦
PIO13♦
PIO12♦
PIO11♦
PIO10♦
PIO9♦
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
RAS2
RAS1
RAS0
GND
CAS3♦
CAS2♦
WE
ID25♦
ID24♦
ID23♦
ID22♦
ID21♦
ID20♦
ID19♦
ID18♦
ID17♦
ID16♦
PIO8♦
A8
VDAT
PIACS1
PIACS0
PIAWE
PIAOE
GND
A7
PSYNC
VCC
A6
A5
GND
A4
DREQ1♦
INTR2♦
INTR3♦
VCLK
A3
VCC
A2
R/W
A1
DACK1♦
A0
LSYNC
Note:
♦ The nomenclature of these pins is consistent with the functionally equivalent pins on the Am29200 microcontroller. This is done to
simplify the ease of system design and to guarantee software compatibility between the Am29205 and Am29200 microcontrollers.
ID31 is the most significant data bit and ID16 is the least significant.
15
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Name)—Am29205 Microcontroller
Pin Name
A0
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
RSWE
Pin No.
75
74
73
72
71
70
69
68
67
66
62
61
60
59
58
57
56
55
54
53
52
51
41
40
50
DREQ1♦
ID16♦
96
25
24
23
22
21
20
19
18
17
16
13
12
11
10
9
PIACS0
PIACS1
PIAOE
PIAWE
PIO8♦
44
43
46
45
91
90
89
88
87
86
85
84
81
77
93
78
39
38
37
36
2
34
26
49
28
27
5
A1
RXD
R/W
TXD
A2
ID17♦
A3
ID18♦
A4
ID19♦
UCLK
VCC
A5
ID20♦
PIO9♦
A6
ID21♦
PIO10♦
PIO11♦
PIO12♦
PIO13♦
PIO14♦
PIO15♦
POE
VCC
29
48
79
94
64
14
99
92
7
A7
ID22♦
VCC
A8
ID23♦
VCC
A9
ID24♦
VCC
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
CAS2♦
CAS3♦
DACK1♦
ID25♦
VCC
ID26♦
VCC
ID27♦
VCLK
VDAT
GND
GND
GND
GND
GND
GND
GND
GND
GND
WAIT/TRIST
WE
ID28♦
PSTROBE
PSYNC
PWE
ID29♦
ID30♦
30
47
63
80
95
65
15
6
ID31♦
8
RAS0
INCLK
INTR2♦
INTR3♦
LSYNC
MEMCLK
PACK
PAUTOFD
PBUSY
4
RAS1
97
98
100
3
RAS2
RAS3
RESET
ROMCS0
ROMCS1
ROMCS2
ROMOE
33
32
31
35
82
76
83
1
42
Note:
♦ The nomenclature of these pins is consistent with the functionally equivalent pins on the Am29200 microcontroller. This is done to
simplify the ease of system design and to guarantee software compatibility between the Am29205 and Am29200 microcontrollers.
ID31 is the most significant data bit and ID16 is the least significant.
16
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Am29200 MICROCONTROLLER LOGIC SYMBOL
INCLK
MEMCLK
RESET
WARN
3
STAT2–STAT0
INTR3–INTR0
4
24
A23–A0
R/W
2
TRAP1–TRAP0
WAIT
ROMCS3–ROMCS0
4
ROMOE
RSWE
BOOTW
BURST
RAS3–RAS0
CAS3–CAS0
4
4
WE
TR/OE
Am29200 Microcontroller
PIACS5–PIACS0
6
PIAOE
PIAWE
2
2
DACK1–DACK0
GACK
DREQ1–DREQ0
TDMA
GREQ
PBUSY
PACK
POE
PSTROBE
PAUTOFD
PWE
UCLK
RXD
DTR
TXD
DSR
VCLK
LSYNC
TCK
TDI
TDO
TMS
TRST
VDAT PSYNC
ID31–ID0
32
PIO15–PIO0
16
17
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Am29205 MICROCONTROLLER LOGIC SYMBOL
INCLK
MEMCLK
A21–A0
R/W
RESET
22
INTR3–INTR2
WAIT/TRIST
2
3
ROMCS2–ROMCS0
ROMOE
RSWE
4
2
RAS3–RAS0
CAS3–CAS2
WE
Am29205 Microcontroller
PIACS1–PIACS0
2
PIAOE
PIAWE
DREQ1
DACK1
PSTROBE
PAUTOFD
PBUSY
PACK
POE
PWE
UCLK
RXD
TXD
VCLK
LSYNC
VDAT PSYNC PIO15–PIO8 ID31–ID16
8
16
18
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
ORDERING INFORMATION
Standard Products—Am29200 Microcontroller
AMD standard products are available in several packages and operating ranges. Valid order numbers are formed by a
combination of the elements below.
AM29200
–16
K
C
/W
SHIPPING OPTION
/W = Trimmed and Formed
Blank = with Molded Carrier Ring
TEMPERATURE RANGE
C = Commercial (TC = 0°C to +85°C)
I = Industrial (TC = –40°C to +85°C)
PACKAGE TYPE
K = 168-Lead Plastic Quad Flat Pack (PQR 168)
SPEED OPTION
–16 = 16.67 MHz
–20 = 20 MHz
DEVICE NUMBER/DESCRIPTION
Am29200 RISC Microcontroller
Valid Combinations
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume. Consult the local AMD
sales office to confirm availability of specific valid
combinations, and check on newly released
combinations.
AM29200–16
AM29200–20
KC, KI
KC/W, KI/W
19
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
ORDERING INFORMATION
Standard Products—Am29205 Microcontroller
AMD standard products are available in several packages and operating ranges. Valid order numbers are formed by a
combination of the elements below.
AM29205
–16
K
C
\W
SHIPPING OPTION
\W =Trimmed and Formed
Blank = with Molded Carrier Ring
TEMPERATURE RANGE
C = Commercial (TC = 0°C to +85°C)
I = Industrial (TC = –40°C to +85°C)
PACKAGE TYPE
K = 100-Lead Plastic Quad Flat Pack (PQB 100)
SPEED OPTION
–12 = 12.5 MHz
–16 = 16.67 MHz
DEVICE NUMBER/DESCRIPTION
Am29205 RISC Microcontroller
Valid Combinations
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume. Consult the local AMD
sales office to confirm availability of specific valid
combinations, and check on newly released
combinations.
AM29205–12
AM29205–16
KC, KI,
KC\W, KI\W
20
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Am29200 and Am29205 Microcontrollers
Am29200 and Am29205 Microcontrollers
Storage Temperature . . . . . . . . . . . . –65°C to +125°C
Voltage on any Pin
Commercial (C) and Industrial (I) Devices
Case Temperature (T ) . . . . . . . . . . 0°C to +85°C (C)
C
with Respect to GND . . . . . . . . . . –0.5 to V +0.5 V
CC
Case Temperature (T ) . . . . . . . . . –40°C to +85°C (I)
C
Maximum V
. . . . . . . . . . . . . . . . . . . . . . . . . 6.0 V DC
CC
Supply Voltage (V ) . . . . . . . . . . . . . +4.75 to +5.25 V
CC
Stresses outside the stated ABSOLUTE MAXIMUM RATINGS
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to absolute maximum rat-
ings for extended periods may affect device functionality.
Operating ranges define those limits betweenwhich thefunc-
tionality of the device is guaranteed.
DC CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 Microcontroller
Preliminary
Symbol Parameter Description
Test Conditions
Notes
Min
–0.5
2.0
Max
0.8
Unit
V
VIL
Input Low Voltage
1
1
VIH
Input High Voltage
VCC +0.5
0.8
V
VILINCLK
VIHINCLK
INCLK Input Low Voltage
INCLK Input High Voltage
–0.5
2.4
V
VCC +0.5
V
Output Low Voltage for
All Outputs except MEMCLK
VOL
VOH
ILI
IOL = 3.2 mA
0.45
V
V
Output High Voltage for
All Outputs except MEMCLK
IOH = –400 µA
2.4
±10 or
+10/–200
Input Leakage Current
Output Leakage Current
0.45 V ≤ VIN ≤ VCC –0.45 V
0.45 V ≤ VOUT ≤ VCC –0.45 V
2
µA
µA
ILO
±10
ICCOP
Operating Power
Supply Current
VCC = 5.25 V, Outputs Floating;
Holding RESET active
3
4
234
280
mA
mA
VOLC
MEMCLK Output Low Voltage
MEMCLK Output High Voltage
IOLC = 20 mA
0.6
V
V
VOHC
IOHC = –20 mA
VCC –0.6
Notes:
1. All inputs except INCLK.
2. The Low input leakage current is –200 µA for the following inputs: TCK, TDI, TMS, TRST, DREQ1–DREQ0, WAIT, WARN,
INTR3–INTR0, TRAP1–TRAP0, and GREQ. These pins have weak internal pull-up transistors.
3. ICC measured at 16.7 MHz, Vcc=5.25 V, Reset Condition.
4. ICC measured at 20.0 MHz, Vcc=5.25 V, Reset Condition.
CAPACITANCE—Am29200 Microcontroller
Preliminary
Symbol Parameter Description
Test Conditions
Min
Max
15
Unit
pF
CIN
Input Capacitance
CINCLK
INCLK Input Capacitance
15
pF
CMEMCLK MEMCLK Capacitance
fC = 10 MHz
20
pF
COUT
CI/O
Output Capacitance
I/O Pin Capacitance
20
pF
20
pF
Note:
Limits guaranteed by characterization.
21
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 Microcontroller
Preliminary
20 MHz
16 MHz
Max
Test Conditions
(Note 1)
No. Parameter Description
Min
25
9
Max
Min
30
9
Unit
ns
1
2
3
4
5
6
7
INCLK Period (=0.5T)
INCLK High Time
Note 2, 9
Note 2
Note 2
Note 2
Note 2
62.5
53.5
53.5
4
62.5
53.5
53.5
4
ns
INCLK Low Time
9
9
ns
INCLK Rise Time
ns
INCLK Fall Time
4
4
ns
MEMCLK Delay from INCLK
0
1
10
0
1
10
ns
Synchronous Output Valid Delay
from MEMCLK Rising Edge
Note 3a
Note 3a
Note 3b
11
11
ns
7a Synchronous Output Valid Delay
from MEMCLK Rising Edge
1
1
1
12
10
10
1
1
1
12
10
10
ns
ns
ns
7b Synchronous Output Valid Delay
from MEMCLK Falling Edge
8
Synchronous Output Disable Delay from Note 8
MEMCLK Rising Edge
9
Synchronous Input Setup Time
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10 Synchronous Input Hold Time
11 Asynchronous Pulse Width
11a Asynchronous Pulse Width
12 MEMCLK High Time
0
0
Note 4a, 9
Note 4b
Note 5
4T
4T
Note 4b
Note 4b
0.5T–3
0.5T+3
0.5T–3
0.5T+3
13 MEMCLK Low Time
Note 5
0.5T–3
0.5T+3
0.5T–3
0.5T+3
14 MEMCLK Rise Time
Note 5
0
0
4
4
0
0
4
4
15 MEMCLK Fall Time
Note 5
16 UCLK, VCLK Period
Note 2
25
9
30
9
17 UCLK, VCLK High Time
18 UCLK, VCLK Low Time
19 UCLK, VCLK Rise Time
20 UCLK, VCLK Fall Time
Note 2, 8
Note 2, 8
Note 2
9
9
4
4
4
4
Note 2
21 Synchronous Output Valid Delay from
VCLK Edge
Note 6
1
15
1
15
22 Input Setup Time to VCLK Edge
23 Input Hold Time to VCLK Edge
Note 6, 7
Note 6, 7
10
0
10
0
ns
ns
24 TCK Frequency
2
2
MHz
Notes:
1. All outputs driving 80 pF, measured at VOL=1.5 V and VOH=1.5 V.
2. INCLK, VCLK, and UCLK can be driven with TTL inputs. If not used, UCLK must be tied High.
3. a. Parameter 7a applies only to the outputs PIO15–PIO0, STAT2–STAT0, and DACK1–DACK0. Parameter 7 applies to the
remaining outputs.
b. Parameter 7b applies only to the outputs RASx, CASx, A2–A0, RSWE, TR/OE, and ROMOE. Some of these signals can
also be asserted during the rising edge of MEMCLK, depending on the type of access being performed.
4. a. Parameter 11 applies to all asynchronous inputs except LSYNC and PSYNC.
b. The LSYNC and PSYNC minimum width time is two bit-times. One bit-time corresponds to one internal video clock period.
The internal video clock period is a function of the VCLK period and the programmed VCLK divisor.
5. MEMCLK can drive an external load of 100 pF.
22
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Notes: (continued)
6. Active VCLK edge depends on the CLKI bit in the Video Control Register.
7. LSYNC and PSYNC may be treated as synchronous signals by meeting setup and hold times. The synchrononization delay
still applies.
8. Not production tested but guaranteed by design or characterization.
9. T=1 MEMCLK period, as defined by the actual frequency on the MEMCLK pin.
DC CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29205 Microcontroller
Preliminary
Symbol Parameter Description
Test Conditions
Notes
Min
–0.5
2.0
Max
0.8
Unit
V
VIL
Input Low Voltage
1
1
VIH
Input High Voltage
VCC +0.5
0.8
V
VILINCLK
VIHINCLK
INCLK Input Low Voltage
INCLK Input High Voltage
–0.5
2.4
V
VCC +0.5
V
Output Low Voltage for
All Outputs except MEMCLK
VOL
VOH
ILI
IOL = 3.2 mA
0.45
V
V
Output High Voltage for
All Outputs except MEMCLK
IOH = –400 µA
2.4
±10 or
+10/–200
Input Leakage Current
Output Leakage Current
0.45 V ≤ VIN ≤ VCC –0.45 V
0.45 V ≤ VOUT ≤ VCC –0.45 V
2
µA
µA
ILO
±10
ICCOP
Operating Power
Supply Current with respect to
MEMCLK
VCC = 5.25 V, Outputs Floating;
Holding RESET active
3
4
234
175
mA
mA
VOLC
VOHC
MEMCLK Output Low Voltage
MEMCLK Output High Voltage
IOLC = 20 mA
0.6
V
V
IOHC = –20 mA
VCC –0.6
Notes:
1. All inputs except INCLK.
2. The Low input leakage current is –200 µA for the following inputs: INTR3, INTR2, DREQ1, and WAIT/TRIST. These pins have
weak internal pull-up transistors.
3. ICC measured at 16.7 MHz, Vcc=5.25 V, Reset Condition.
4. ICC measured at 12.5 MHz, Vcc=5.25 V, Reset Condition.
CAPACITANCE—Am29205 Microcontroller
Preliminary
Symbol Parameter Description
Test Conditions
Min
Max
15
Unit
pF
CIN
Input Capacitance
CINCLK
INCLK Input Capacitance
15
pF
CMEMCLK MEMCLK Capacitance
fC = 10 MHz
20
pF
COUT
CI/O
Output Capacitance
I/O Pin Capacitance
20
pF
20
pF
Note:
Limits guaranteed by characterization.
23
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29205 Microcontroller
Preliminary
16 MHz
Max
12 MHz
Max
1
No. Parameter Description
Test Conditions
Min
30
9
Min
40
Unit
ns
1
2
3
4
5
6
7
INCLK Period (= 0.5T)
INCLK High Time
Note 2, 9
Note 2
Note 2
Note 2
Note 2
62.5
53.5
53.5
4
62.5
53.5
53.5
4
12
ns
INCLK Low Time
9
12
ns
INCLK Rise Time
ns
INCLK Fall Time
4
4
ns
MEMCLK Delay from INCLK
0
1
10
0
1
10
ns
Synchronous Output Valid Delay
from MEMCLK Rising Edge
Note 3a
Note 3b
Note 3c
Note 3d
Note 8
11
15
ns
ns
ns
ns
ns
7a Synchronous Output Valid Delay
from MEMCLK Rising Edge
1
1
1
1
12
12
10
10
1
1
1
1
15
15
15
15
7a′
Synchronous Output Valid Delay
from MEMCLK Rising Edge
7b Synchronous Output Valid Delay
from MEMCLK Falling Edge
8
Synchronous Output Disable Delay
from MEMCLK Rising Edge
9
Synchronous Input Setup Time
8
12
ns
ns
ns
10 Synchronous Input Hold Time
11 Asynchronous Pulse Width
11a Asynchronous Pulse Width
12 MEMCLK High Time
0
0
4T
Note 4a, 9
Note 4b
Note 5
4T
Note 4b
Note 4b
0.5T –3
0.5T –3
0
0.5T –3
0.5T +3
0.5T +3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13 MEMCLK Low Time
Note 5
0.5T –3
0.5T +3
0.5T +3
14 MEMCLK Rise Time
Note 5
0
0
4
4
5
5
15 MEMCLK Fall Time
Note 5
0
16 UCLK, VCLK Period
Note 2, 8
Note 2, 8
Note 2
30
9
40
17 UCLK, VCLK High Time
18 UCLK, VCLK Low Time
19 UCLK, VCLK Rise time
20 UCLK, VCLK Fall Time
12
9
12
Note 2
4
4
4
4
Note 2
21 Synchronous Output Valid Delay from
VCLK Edge
Note 6
1
15
1
20
22 Input Setup Time to VCLK Edge
23 Input Hold Time to VCLK Edge
Notes:
Notes 6, 7
Notes 6, 7
10
0
15
0
ns
ns
1. All outputs driving 80 pF, measured at VOL = 1.5 V and VOH = 1.5 V.
2. INCLK, VCLK, and UCLK can be driven with TTL inputs. If not used, UCLK must be tied High.
3. a. Parameter 7 applies to all outputs except PIO15–PIO8, PIACS1– PIACS0, DACK1, and A21–A0.
b. Parameter 7a applies to PIO15–PIO8, PIACS1– PIACS0, and DACK1.
c. Parameter 7a′ applies to A21–A0.
d. Parameter 7b applies only to the outputs RASx, CASx, A2–A0, RSWE, and ROMOE. Some of these signals can
also be asserted during the rising edge of MEMCLK, depending on the type of access being performed.
4. a. Parameter 11 applies to all asynchronous inputs except LSYNC and PSYNC.
b. LSYNC and PSYNC minimum width is two bit-times. A bit-time corresponds to one internal video clock period. The internal
video clock period is a function of the VCLK period and the programmed VCLK divisor.
5. MEMCLK can drive an external load of 100 pF.
6. Active VCLK edge depends on CLKI bit in Video Control Register.
7. LSYNC and PSYNC may be treated as synchronous signals by meeting setup and hold times. The synchronization delay still applies.
8. Not production tested but guaranteed by design or characterization.
9. T=1 MEMCLK period, as defined by the actual frequency on the MEMCLK pin.
24
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
SWITCHING WAVEFORMS—Am29200 and Am29205 Microcontrollers
1
2
3
5
4
2.4 V
1.5 V
0.8 V
INCLK
6
12
13
14
15
V
CC – 0.6 V
MEMCLK
1.5 V
0.6 V
7b
8
Synchronous
Outputs
1.5 V
1.5 V
7
7a
7a′
9
10
Synchronous
Inputs
1.5 V
1.5 V
11 11a
Asynchronous
Inputs
1.5 V
1.5 V
16
17
18
20
19
2.0 V
1.5 V
0.8 V
UCLK, VCLK
21
Note: Video Timing may be relative
to VCLK falling edge if CLKI = 1.
VCLK-Relative
Outputs
1.5 V
22
23
VCLK-Relative
Inputs
1.5 V
1.5 V
25
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
SWITCHING TEST CIRCUIT—Am29200 and Am29205 Microcontrollers
VL
Model of Dynamic Test Load
IOL max = 3.2 mA
Am29200 or Am29205
Microcontroller
CL
Pin Under Test
V
VREF = 1.5 V
IOH max = 400 µA
VH
Note:
CL is guaranteed to be a minimum 80-pF parasitic load. It represents the distributed load parasitic
attributed to the test hardware and instrumentation present during production testing.
THERMAL CHARACTERISTICS—Am29200 and Am29205 Microcontrollers
PQFP Package
The Am29200 and Am29205 microcontrollers are spe-
cified for operation with case temperature ranges for a
commercial or industrial temperature device. Case tem-
perature is measured at the top center of the package as
shown in the figure below.
The various temperatures and thermal resistances can
be determined using the following equations along with
information given in Table 2.
θ
= θ + θ
CA
JA
JC
CCOP
P = I
V
CC
θ
θ
CA
JA
T = T + P
θ
θ
J
C
JC
T
T = T + P
C
J
A
JA
θ
JC
T = T – P
θ
JC
C
J
T = T + P
θ
C
A
CA
T = T – P
θ
A
J
JA
T = T – P
θ
A
C
CA
θ
= θ + θ
JC CA
JA
Allowable ambient temperature curves for various air-
flows are given in Figures 1–3. These graphs assume a
Thermal Resistance — °C/Watt
maximum V
and a maximum power supply current
. All calculations made using the above
CC
equal to I
CCOP
information should guarantee that the operating case
temperature does not exceed the maximum case tem-
perature. Since P is a function of operating frequency,
calculations can also be made to determine the ambient
temperature at various operating speeds.
26
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Table 2. PQFP Thermal Characteristics (°C/Watt) Surface Mounted
Airflow—ft./min. (m/sec)
Am29200 Microcontroller
0 (0)
200 (1.01) 400 (2.03) 600 (3.04) 800 (4.06)
36
32
8
29
8
27
8
—
—
—
θJA
θJC
θCA
Junction-to-Ambient
Junction-to-Case
Case-to-Ambient
8
28
24
21
19
Am29205 Microcontroller
41
8
35
8
30
8
27
8
25
8
θJA
θJC
θCA
Junction-to-Ambient
Junction-to-Case
Case-to-Ambient
33
27
22
19
17
20 MHz
16.67 MHz
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
Maximum
Ambient
(°C)
T
C
at 85°C
T
C
at 85°C
0
200
400
600
800
0
200
400
600
800
800
800
Air Flow (ft./min.)
Air Flow (ft./min.)
Figure 1. Am29200 Microcontroller—Maximum Allowable Ambient Temperature
(Data Sheet Limit, ICCOPmax, VCC=+5.25 V, Average Thermal Impedance)
16.67 MHz
12.5 MHz
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
Maximum
Ambient
(°C)
T
C
at 85°C
T
C
at 85°C
0
200
400
600
800
0
200
400
600
Air Flow (ft./min.)
Air Flow (ft./min.)
Figure 2. Am29205 Microcontroller—Maximum Allowable Ambient Temperature
(Data Sheet Limit, ICCOPmax, VCC=+5.25 V, Average Thermal Impedance)
Am29200 Microcontroller
Am29205 Microcontroller
45
40
35
30
25
20
15
10
5
45
40
35
30
25
20
15
10
5
Thermal
Resistance
[θJA (°C/W)]
0
0
0
200
400
600
800
0
200
400
600
Air Flow (ft./min.)
Air Flow (ft./min.)
Figure 3. Thermal Impedance
Am29200 and Am29205 RISC Microcontrollers
27
P R E L I M I N A R Y
AMD
PHYSICAL DIMENSIONS
PQR 168—Am29200 Microcontroller
Plastic Quad Flat Pack; Molded Carrier Ring
(Inner device measured in inches; outer ring measured in millimeters)
45.87
46.13
45.50
45.90
41.37
41.63
37.87
38.13
35.15
35.25
32.15
32.25
27.80
28.10
Pin 42
Pin 84
45.50 37.87 32.15
45.90 38.13 32.25
41.37 35.15 27.80
41.63 35.25 28.10
Pin 126
45.87
Pin 1 I.D.
46.13
Top View
Pin 168
0.45 Typ.
0.650 Typ.
2.00 4.80
0.65 Pitch
20019A
CJ87
1.80
Side View
08/12/93 MH
Note:
Not to scale. For reference only.
28
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQR 168—Am29200 Microcontroller
Plastic Quad Flat Pack; Trimmed and Formed
(All measurements are in millimeters)
31.00
31.40
27.90
28.10
Pin 42
Pin 84
26.65
REF
0.22
0.38
26.65
REF
27.90
28.10
31.00
31.40
Pin 1 I.D.
Pin 126
Pin 168
Pin 1
Top View
3.20
3.60
0.65
Basic
3.95
MAX
0.25
MIN
Side View
20028A
CL90
10/27/93 PM
Note:
Not to scale. For reference only.
29
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Solder Land Recommendations
168-Lead PQFP—Am29200 Microcontroller
Top View
32.22 mm
0.65 mm
32.22 mm
0.40 mm
1.98 mm
0.25 mm
08/13/93 MH
Note:
Not to scale. For reference only.
30
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQB 100—Am29205 Microcontroller
English Plastic Quad Flat Pack; Molded Carrier Ring
(Outer ring measured in millimeters)
45.87
46.13
41.37
41.63
35.15
35.25
45.50
45.90
37.87
38.13
32.15
32.25
0.897
Pin 50
0.903
0.744
0.752
Pin 25
45.50 37.87 32.15 0.744
45.90 38.13 32.25 0.752
45.87
46.13
41.37 35.15 0.897
41.63 35.25 0.903
Pin 1
256
Pin 100
Pin 75
Top View
2.00 4.80
1.80
20009A
CJ83
12/13/93 PLM
Side View
Note:
Not to scale. For reference only.
31
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
PQB 100—Am29205 Microcontroller
English Plastic Quad Flat Pack; Trimmed and Formed
(All measurements are in inches)
0.897
0.903
0.875
0.885
0.747
0.753
Pin 50
Pin 25
0.747
0.753
0.008
0.012
0.875
0.885
0.897
0.903
Pin 1 ID
0.008
0.016
Pin 2
Pin 75
Pin 100
Top View
0.130
0.150
0.025 Basic
0.160
0.180
0.60
REF
0.020
0.040
Side View
20010A
CL85
10/27/93 PM
Note:
Not to scale. For reference only.
32
Am29200 and Am29205 RISC Microcontrollers
P R E L I M I N A R Y
AMD
Solder Land Recommendations
100-Lead PQFP—Am29205 Microcontroller
(All measurements are in inches)
0.920
0.016
0.025
0.895
0.078
Top View
10/27/93 PM
Note:
Not to scale. For reference only.
AMD and Am29000 are registered trademarks; Fusion29K is a service mark; and 29K, Am29005, Am29030, Am29035, Am29050, Am29200,
Am29205, Am29240, Am29243, Am29245, XRAY29K, and MiniMON29K are trademarks of Advanced Micro Devices, Inc.
High C is a registered trademark of MetaWare, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
1994 Advanced Micro Devices, Inc.
33
Am29200 and Am29205 RISC Microcontrollers
相关型号：
AM29205-16KCW
RISC Microcontroller, 32-Bit, MROM, 16.67MHz, CMOS, PQFP100, PLASTIC, QFP-100
ROCHESTER
©2020 ICPDF网 联系我们和版权申明