AN-24 [ETC]
A Simplified Test Set for Op Amp Characterization; 简化测试仪的运算放大器特性
| 型号： | AN-24 |
| 厂家： | 
ETC |
| 描述： | A Simplified Test Set for Op Amp Characterization |
| 文件： | 总10页 (文件大小：414K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
National Semiconductor
Application Note 24
M. Yamatake
A Simplified Test Set for Op
Amp Characterization
April 1986
INTRODUCTION
POWER SUPPLY
The test set described in this paper allows complete quanti-
tative characterization of all dc operational amplifier param-
eters quickly and with a minimum of additional equipment.
The method used is accurate and is equally suitable for lab-
oratory or production testÐfor quantitative readout or for
limit testing. As embodied here, the test set is conditioned
for testing the LM709 and LM101 amplifiers; however, sim-
ple changes discussed in the text will allow testing of any of
the generally available operational amplifiers.
Basic waveforms and dc operating voltages for the test set
are derived from a power supply section comprising a posi-
tive and a negative rectifier and filter, a test set voltage
regulator, a test circuit voltage regulator, and a function gen-
erator. The dc supplies will be discussed in the section deal-
ing with detailed circuit description.
The waveform generator provides three output functions, a
a
b
g
19V square wave, a 19V to 19V pulse with a 1% duty
g
cycle, and a 5V triangular wave. The square wave is the
basic waveform from which both the pulse and triangular
wave outputs are derived.
Amplifier parameters are tested over the full range of com-
mon mode and power supply voltages with either of two
output loads. Test set sensitivity and stability are adequate
for testing all presently available integrated amplifiers.
The square wave generator is an operational amplifier con-
nected as an astable multivibrator. This amplifier provides
g
The paper will be divided into two sections, i.e., a functional
description, and a discussion of circuit operation. Complete
construction information will be given including a layout for
the tester circuit boards.
an output of approximately 19V at 16 Hz. This square
wave is used to drive junction FET switches in the test set
and to generate the pulse and triangular waveforms.
The pulse generator is a monostable multivibrator driven by
the output of the square wave generator. This multivibrator
is allowed to swing from negative saturation to positive satu-
ration on the positive going edge of the square wave input
and has a time constant which will provide a duty cycle of
FUNCTIONAL DESCRIPTION
The test set operates in one of three basic modes. These
are: (1) Bias Current Test; (2) Offset Voltage, Offset Current
Test; and (3) Transfer Function Test. In the first two of these
tests, the amplifier under test is exercised throughout its full
common mode range. In all three tests, power supply volt-
b
approximately 1%. The output is approximately 19V to
a
19V.
g
g
ages for the circuit under test may be set at 5V, 10V,
g
g
15V, or 20V.
TL/H/7190–1
FIGURE 1. Functional Diagram of Bias Current Test Circuit
C
1995 National Semiconductor Corporation
TL/H/7190
RRD-B30M115/Printed in U. S. A.
The triangular wave generator is a dc stabilized integrator
driven by the output of the square wave generator and pro-
g
vides a 5V output at the square wave frequency, inverted
with respect to the square wave.
The bias current display of Figure 2 has the added advan-
tage that incipient breakdown of the input stage of the de-
vice under test at the extremes of the common mode range
is easily detected.
The purpose of these various outputs from the power supply
section will be discussed in the functional description.
If either or both the upper or lower trace in the bias current
display exhibits curvature near the horizontal ends of the
oscilloscope face, then the bias current of that input of the
amplifier is shown to be dependent on common mode volt-
age. The usual causes of this dependency are low break-
down voltage of the differential input stage or current sink.
BIAS CURRENT TEST
A functional diagram of the bias current test circuit is shown
in Figure 1. The output of the triangular wave generator and
the output of the test circuit, respectively, drive the horizon-
tal and vertical deflection of an oscilloscope.
OFFSET VOLTAGE, OFFSET CURRENT TEST
The offset voltage and offset current tests are performed in
the same general way as the bias current test. The only
The device under test, (cascaded with the integrator, A ), is
7
connected in a differential amplifier configuration by R , R ,
1
2
R , and R . The inputs of this differential amplifier are driven
difference is that the switches S and S are closed on
5a 5b
the same half-cycle of the triangular wave input.
3
4
in common from the output of the triangular wave generator
through attenuator R and amplifier A . The inputs of the
The synchronous operation of S and S forces the ampli-
5a 5b
8
8
device under test are connected to the feedback network
through resistors R and R , shunted by the switch S and
fier under test to draw its input currents through matched
high and low input resistors on alternate halves of the input
triangular wave. The difference between the voltage drop
across the two values of input resistors is proportional to the
difference in input current to the two inputs of the amplifier
under test and may be measured as the vertical spacing
between the two traces appearing on the face of the oscillo-
scope.
5
6
5a
S
.
5b
The feedback network provides a closed loop gain of 1,000
and the integrator time constant serves to reduce noise at
the output of the test circuit as well as allowing the output of
the device under test to remain near zero volts.
The bias current test is accomplished by allowing the device
under test to draw input current to one of its inputs through
the corresponding input resistor on positive going or nega-
tive going halves of the triangular wave generator output.
Offset voltage is measured as the vertical spacing between
the trace corresponding to one of the two values of source
resistance and the zero volt baseline. Switch S and Resis-
6
tor R are a base line chopper whose purpose is to provide
9
a baseline reference which is independent of test set and
This is accomplished by closing S or S on alternate
5a 5b
halves of the triangular wave input. The voltage appearing
across the input resistor is equal to input current times the
input resistor. This voltage is multiplied by 1,000 by the
feedback loop and appears at the integrator output and the
vertical input of the oscilloscope. The vertical separaton of
the traces representing the two input currents of the amplifi-
er under test is equivalent to the total bias current of the
amplifier under test.
oscilloscope drift. S is driven from the pulse output of the
6
function generator and has a duty cycle of approximately
1% of the triangular wave.
Figure 3 is a photograph of the various waveforms present-
ed during this test. Offset voltage and offset current are
displayed at a sensitivity of 1 mV and 100 nA per division,
respectively, and both parameters are displayed over a
g
common mode range of 10V.
The bias current over the entire common mode range may
be examined by setting the output of A equal to the amplifi-
8
er common mode range. A photograph of the bias current
oscilloscope display is given as Figure 2. In this figure, the
g
total input current of an amplifier is displayed over a 10V
common mode range with a sensitivity of 100 nA per vertical
division.
TL/H/7190–3
FIGURE 3. Offset Voltage, Offset Current
and Common Mode Rejection Display
TL/H/7190–2
FIGURE 2. Bias Current and Common
Mode Rejection Display
2
TL/H/7190–4
FIGURE 4. Functional Diagram of Transfer Function Circuit
TRANSFER FUNCTION TEST
A functional diagram of the transfer function test is shown in
Figure 4. The output of the triangular wave generator and
the output of the circuit under test, respectively, drive the
horizontal and vertical inputs of an oscilloscope.
g
The device under test is driven by a 2.5 mV triangular
wave derived from the 5V output of the triangular wave
g
generator through the attenuators R , R , and R , R and
3
11 12
1
through the voltage follower, A . The output of the device
7
under test is fed to the vertical input of an oscilloscope.
Amplifier A performs a dual function in this test. When S is
7
7
closed during the bias current test, a voltage is developed
across C equal to the amplifier offset voltage multiplied by
the gain of the feedback loop. When S is opened in the
1
7
transfer function test, the charge stored in C continues to
1
provide this offset correction voltage. In addition, A sums
7
TL/H/7190–5
the triangular wave test signal with the offset correction volt-
age and applies this sum to the input of the amplifier under
test through the attenuator R , R . This input sweeps the
FIGURE 5. Transfer Function Display
Gain is displayed as the slope, DV /DV of the transfer
OUT IN
1
3
function. Gain linearity is indicated change in slope of the
/V display as a function of output voltage. This dis-
g
input of the amplifier under test 2.5 mV around its offset
voltage.
V
OUT IN
play is particularly useful in detecting crossover distortion in
a Class B output stage. Output swing is measured as the
vertical deflection of the transfer function at the horizontal
extremes of the display.
Figure 5 is a photograph of the output of the test set during
the transfer function test. This figure illustrates the function
of amplifier A in adjusting the dc input of the test device so
7
that its transfer function is displayed on the center of the
oscilloscope face.
The transfer function display is a plot of V vs V
IN OUT
for an
amplifier. This display provides information about three am-
plifier parameters: gain, gain linearity, and output swing.
3
NOTE: All res
in ohms.
All resistors (
unless specif
otherwise.
TL/H/7190–6
FIGURE 6. Power Supply and Function Generator
DETAILED CIRCUIT DESCRIPTION
POWER SUPPLIES
comprising R , R , R , R , and R . The output of this
10 26
7
8
9
divider is 10V to 2.5V according to the position of S
a
a
2a
and is fed to the non-inverting, gain-of-two amplifier, A . A
2
2
As shown in Figure 6, which is a complete schematic of the
power supply and function generator, two power supplies
are provided in the test set. One supply provides a fixed
a
a
a
is powered from 28V and provides 20V to 5V at its
output. A is a unity gain inverter whose input is the output
3
of A and which is powered from 28V. The complementa-
b
ry outputs of amplifiers A and A provide dc power to the
circuit under test.
2
g
vides 5V to 20V to power the circuit under test.
20V to power the circuitry in the test set; the other pro-
g
2
3
g
a
The test set power supply regulator accepts 28V from the
positive rectifier and filter and provides 20V through the
LM101 amplifiers are used as A and A to allow operation
3
from one ground referenced voltage each and to provide
protective current limiting for the device under test.
2
a
LM100 positive regulator. Amplifier A is powered from the
1
negative rectifier and filter and operates as a unity gain in-
FUNCTION GENERATOR
a
verter whose input is 20V from the positive regulator, and
whose output is 20V.
b
g
The function generator provides three outputs, a
19V
19V pulse having a 1% duty
cycle, and a 5V triangular wave. The square wave is the
b
a
square wave, a 19V to
a
output of the positive regulator through the variable divider
The test circuit power supply is referenced to the
20V
g
4
basic function from which the pulse and triangular wave are
derived, the pulse is referenced to the leading edge of the
square wave, and the triangular wave is the inverted and
integrated square wave.
operated synchronously from the output of Q . During the
11
transfer function test, Q and Q are switched on continu-
6
7
ously by turning off Q . R and R maintain the gates of
11 42 45
the FET switches at zero gate to source voltage for maxi-
mum conductance during their on cycle. Since the sources
of these switches are at the common mode input voltage of
the device under test, these resistors are connected to the
Amplifier A is an astable multivibrator generating a square
4
wave from positive to negative saturation. The amplitude of
g
this square wave is approximately 19V. The square wave
frequency is determined by the ratio of R to R and by
output of the common mode driver amplifier, A .
8
18 16
the time constant, R C . The operating frequency is stabi-
17
The input for the integrator-feedback buffer, A , is selected
7
9
lized against temperature and power regulation effects by
regulating the feedback signal with the divider R , D and
D .
by the FET switches Q and Q . During the bias current and
4 5
offset voltage offset current tests, A is connected as an
7
integrator and receives its input from the output of the de-
19
5
6
vice under test. The output of A drives the feedback resis-
7
tor, R . In this connection, the integrator holds the output
40
Amplifier A is a monostable multivibrator triggered by the
5
positive going output of A . The pulse width of A is deter-
4
5
of the device under test near ground and serves to amplify
the voltages corresponding to bias current, offset current,
and offset voltage by a factor of 1,000 before presenting
mined by the ratio of R to R and by the time constant
20 22
R
cycle pulse from approximately 19V to 19V.
C
21 10
. The output pulse of A is an approximately 1% duty
a
5
b
them to the measurement system. FET switches Q and Q
4
5
Amplifier A is a dc stabilized integrator driven from the am-
6
plitude-regulated output of A . Its output is a 5V triangular
are turned on by switch section S during these tests.
1b
g
wave. The amplitude of the output of A is determined by
4
FET switches Q and Q are turned off during the transfer
5
4
6
the square wave voltage developed across D and D and
function test. This disconnects A from the output of the
7
5
6
. DC stabilization is accomplished
device under test and changes it from an integrator to a
non-inverting unity gain amplifier driven from the triangular
wave output of the function generator through the attenua-
the time constant R
C
adj 14
by the feedback network R , R , and C . The ac attenua-
24 25 15
tion of this feedback network is high enough so that the
integrator action at the square wave frequency is not de-
graded.
tor R and R and switch section S . In this connection,
33 34 1a
amplifier A serves two functions; first, to provide an offset
7
voltage correction to the input of the device under test and,
second, to drive the input of the device under test with a
g
2.5 mV triangular wave centered about the offset voltage.
During this test, the common mode driver amplifier is dis-
Operating frequency of the function generator may be var-
ied by adjusting the time constants associated with A , A ,
4
5
and A in the same ratio.
6
TEST CIRCUIT
abled by switch section S and the vertical input of the
1a
measurement oscilloscope is transferred from the output of
A complete schematic diagram of the test circuit is shown in
Figure 7. The test circuit accepts the outputs of the power
supplies and function generator and provides horizontal and
vertical outputs for an X-Y oscilloscope, which is used as
the measurement system.
the integrator-buffer, A , to the output of the device under
7
test by switch section S . S allows supply voltages for
1d 2a
g
g
g
the device under test to be set at 5, 10, 15, or 20V.
changes the vertical scale factor for the measurement
g
S
2b
oscilloscope to maintain optimum vertical deflection for the
The primary elements of the test circuit are the feedback
buffer and integrator, comprising amplifier A and its feed-
particular power supply voltage used. S is a momentary
4
contact pushbutton switch which is used to change the load
7
back network C , R , R , and C , and the differential
16 31 32 17
amplifier network, comprising the device under test and the
on the device under test from 10 kX to 2 kX.
A delay must be provided when switching from the input
tests to the transfer function tests. The purpose of this delay
feedback network R , R , R , and R . The remainder of
40 43 44 52
the test circuit provides the proper conditioning for the de-
vice under test and scaling for the oscilloscope, on which
the test results are displayed.
is to disable the integrator function of A before driving it
7
with the triangular wave. If this is not done, the offset cor-
rection voltage, stored on C , will be lost. This delay be-
16
tween opening FET switch Q , and switch Q , is provided by
The amplifier A provides a variable amplitude source of
8
4
5
common mode signal to exercise the amplifier under test
over its common mode range. This amplifier is connected as
a non-inverting gain-of-3.6 amplifier and receives its input
the RC filter, R and C
35
.
19
Resistor R and diodes D and D are provided to control
41
7
8
the integrator when no test device is present, or when a
from the triangular wave generator. Potentiometer R al-
37
faulty test device is inserted. R provides a dc feedback
41
path in the absence of a test device and resets the integra-
g
lows the output of this amplifier to be varied from 0 volts
to 18 volts. The output of this amplifier drives the differen-
g
tor to zero. Diodes D and D clamp the input to the integra-
7
8
tor to approximately .7 volts when a faulty device is inserted.
tial input resistors, R and R , for the device under test.
43 44
g
The resistors R and R are current sensing resistors
46 47
FET switch Q and resistor R provide a ground reference
28
1
which sense the input current of the device under test.
These resistors are switched into the circuit in the proper
sequence by the field effect transistors Q and Q . Q and
at the beginning of the 50-ohm-source, offset-voltage trace.
This trace provides a ground reference which is indepen-
dent of instrument or oscilloscope calibration. The gate of
6
7
6
Q
are driven from the square wave output of the function
7
Q
1
is driven by the output of monostable multivibrator A ,
5
generator by the PNP pair, Q and Q , and the NPN pair,
10 11
and shorts the vertical oscilloscope drive signal to ground
during the time that A output is positive.
Q
ing sequence for Q and Q and hence for Q and Q . In
and Q . Switch sections S and S select the switch-
1b 1c
8
9
5
8
9
6
the bias current test, the FET drivers, Q and Q , are
7
Switch S , R , and R provide a 5X scale increase during
27 28
8
9
3
switched by out of phase signals from Q and Q . This
10 11
opens the FET switches Q and Q on alternate half cycles
input parameter tests to allow measurement of amplifiers
with large offset voltage, offset current, or bias current.
6
7
of the square wave output of the function generator. During
the offset voltage, offset current test, the FET drivers are
Switch S allows amplifier compensation to be changed for
5
101 or 709 type amplifiers.
5
NOTE: All resistors 1/4W, 5% unless specified otherwise *2N3819
l
matched for on resistance within 200X Select for BV
45V
TL/H/7190–7
GS
FIGURE 7. Test Circuit
CALIBRATION
3. Transfer Function (Figure 5)
Calibration of the test system is relatively simple and re-
quires only two adjustments. First, the output of the main
regulator is set up for 20V. Then, the triangular wave gener-
V
0.5 mV/div.
IN
@
g
g
g
g
V
5V/div.
5V/div.
2V/div.
1V/div.
V
V
V
V
20V
OUT
s
s
s
s
@
@
@
15V
10V
5V
g
ator is adjusted to provide 5V output by selecting R
.
adj
This sets the horizontal sweep for the X-Y oscilloscope
used as the measurement system. The oscilloscope is then
set up for 1V/division vertical and for a full 10 division hori-
zontal sweep.
DV
OUT
e
Gain
DV
IN
Scale factors for the three test positions are:
CONSTRUCTION
1. Bias Current Display (Figure 2)
Test set construction is simplified through the use of inte-
grated circuits and etched circuit layout.
I
total
100 nA/div. vertical
Variable horizontal
bias
Common Mode Voltage
Figure 8 gives photographs of the completed tester. Figure
9 shows the parts location for the components on the circuit
board layout of Figure 10. An attempt should be made to
2. Offset Voltage-Offset Current (Figure 3)
I
100 nA/div. vertical
1 mV/div. vertical
Variable horizontal
offset
V
offset
Common Mode Voltage
6
adhere to this layout to insure that parasitic coupling be-
tween elements will not cause oscillations or give calibration
problems.
S , S
3
Grayhill 30-1 Series 30 subminiature
pushbutton switch
4
S , S
5
Alcoswitch MST-105D SPDT
6
Table I is a listing of special components which are needed
to fit the physical layout given for the tester.
TABLE I. Partial Parts List
CONCLUSIONS
A semi-automatic test system has been described which will
completely test the important operational amplifier parame-
ters over the full power supply and common mode ranges.
The system is simple, inexpensive, easily calibrated, and is
equally suitable for engineering or quality assurance usage.
T
1
Triad F-90X
S
Centralab PA2003 non-shorting
Centralab PA2015 non-shorting
1
2
S
TL/H/7190–8
FIGURE 8a. Bottom of Test Set
7
TL/H/7190–9
FIGURE 8b. Front Panel
TL/H/7190–10
FIGURE 8c. Jacks
8
TL/H/7190–11
FIGURE 9. Component Location, Top View
9
TL/H/7190–12
FIGURE 10. Circuit Board Layout
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