AT40K05/10/20/40(LV) Summary [Updated 5/02. 4 Pages] 5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam. AT40K05 / 10/20/ 40( LV)摘要[更新5/02 。 4页] 5K - 50K门的FPGA与DSP优化的核心细胞和分布式FreeRam 。\n