BR24L08FVM [ETC]
EEPROM ; EEPROM\n型号: | BR24L08FVM |
厂家: | ETC |
描述: | EEPROM
|
文件: | 总2页 (文件大小:38K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BR24L08-W/F-W/FJ-W/FV-W/FVM-W
BR24L16-W/F-W/FJ-W/FV-W/FVM-W
Features
Pin Configurations
• 8k bit serial EEPROM organized as 1k × 8bit (BR24L08)
16k bit serial EEPROM organized as 2k × 8bit (BR24L16)
• 2 wire bus serial interface
8
7
A0
A1
A2
1
2
3
4
Vcc
WP
6 SCL
*1
GND
• Low operating voltage range (2V operating)
Read : 1.8~5.5V
5
SDA
Write : 1.8~5.5V
DIP8/SOP8/SOP-J8/SSOP-B8/MSOP8
*1: NC (BR24L16)
• Low current consumption
Active : 2mA MAX
Standby : 2 µA MAX
Pin Functions
• Clock frequency : 100kHz MAX(1.8~5.5V)
400kHz MAX(2.5~5.5V)
Functions
Pin
• Write cycle time : 5ms MAX
Names
BR24L08
BR24L16
• Address auto-increment function during read operation
• Automatic erase-before-write function during write operation
• Page write function : 16 byte
A0, A1 Not used, Ground
Slave Address Inputs
A2
Not used
Ground
GND
SDA
• Inadvertent write protection function
Inadvertent write protection at low voltage (Vcc Lock-out function)
WP(Write Protect) function
Serial Data Input/Output
Serial Data Clock
SCL
WP
Vcc
• Schmitt trigger circuit and noise filter are built into SCL and
SDA pins
Write Protect
Power Supply
• 1,000,000 write cycle typical
• 40 years data retention
• Operating temperature range : -40~85˚C
Block Diagram
8~16k bit EEPROM Array
WP
A0
10bit:BR24L08
11bit:BR24L16
8bit
SCL
SDA
A1
10bit:BR24L08
11bit:BR24L16
Address
Decoder
Slave Words
Address Register
Data
Register
A2*1
START
STOP
Control Logic
ACK
High Voltage
Generation
Voltage Detection
A0, A1: NC
*1: NC (Only BR24L16)
7
1.8V Low voltage
operating
Serial 2 Wire Interface (I2C BUS Type)
Timing chart
Byte write cycle
S
T
A
W
R
I
T
E
S
T
SLAVE
WORD
ADDRESS
R
T
O
ADDRESS
DATA
P
SDA
LINE
*1
D7
D0
1
0
1
0
A2 P1 P0
WA7
WA0
R
/
W
A
C
K
A
C
K
A
C
K
Page write cycle
S
T
A
W
S
T
O
P
R
I
SLAVE
R
WORD
ADDRESS(n)
T
E
DATA(n)
DATA(n+15)
ADDRESS
T
*1
A2 P1 P0
SDA
LINE
D7
D0
D0
1
0
1
0
WA7
WA0
R
/
W
A
C
K
A
C
K
A
C
K
A
C
K
Current read cycle
S
T
A
R
E
A
D
S
T
O
P
SLAVE
R
ADDRESS
T
DATA
*1
SDA
LINE
1
0
1
0
A2 P1 P0
D0
D7
R
/
W
A
C
K
A
C
K
Random read cycle
S
T
A
W
R
I
T
E
R
E
A
D
S
T
O
P
SLAVE
WORD
ADDRESS(n)
SLAVE
ADDRESS
R
T
DATA(n)
ADDRESS
*1
0 A2 P1P0
SDA
LINE
*1
D7
D0
1
0
1
0
A2 P1 P0
WA7
WA0
1
0 1
R
/
W
A
C
K
A
C
K
A
C
K
A
C
K
Sequential read cycle
S
T
A
R
E
A
D
S
T
O
P
SLAVE
R
DATA(n+x)
ADDRESS
T
DATA(n)
SDA
LINE
*1
D0
D7
D7
D0
1
0
1
0
A2 P1 P0
R
/
W
A
C
K
A
C
K
A
C
K
A
C
K
*1: P2 (BR24L16)
Note : BR24C08/F/FJ/FV have no letter "-W", but they are double-cell types.
BR24C16/F/FJ/FV are single-cell types.
Please be careful not to confuse w-cell type and single-cell type. ("-W" means double-cell type.)
8
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