C2472_技术文档

C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

ADVANTAGES



Low system component count

High average efficiency

Low standby power consumption

EMI compliance without extra components

High isolation & surge voltage withstand

High power density in very small size

C2474PW1

PDIP-8

C2472PX2

SOT23-6

FEATURES

C2473PX1

SOP-8



Highly integrated CMOS controller IC

Low cost package options

Drive suitable for low cost bipolar power transistors

Resonant switching for high efficiency and low EMI

Frequency optimised for power circuit parasitics

Protection against overload, over-temperature and under-voltage

APPLICATIONS

External AC/DC charger/adaptor (single voltage input) e.g. cordless phones, portable electric tools.

Embedded PSU (single voltage input) e.g. set-top boxes, DVD players, audio products, domestic appliances.

OVERVIEW

The C2472, C2473 and C2474 controllers use CamSemi’s Resonant Discontinuous Forward Converter

(RDFC) topology to create a high efficiency, low cost alternative to line-frequency transformer PSUs. By

operating in resonant mode, EMI is greatly reduced, enabling the replacement of linear PSUs in demanding

applications such as audio products and cordless phone chargers. The C2472, C2473 and C2474 controllers

also offer overload protection which is usually associated with more expensive switch mode solutions.

AUX

VDD

Vdd

regulator

Base

drive

Switch

saturation

sensing

COL

CS

Resonance

sensing

RDFC

Control

BAS

Current

sensing

GND

Figure 1: Block Diagram of the C2472, C2473 and C2474 Controller ICs

Product data

Page 1 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

PIN DEFINITIONS

Figure 2: C2472, C2473 and C2474 Pin Assignment

(drawings are not to scale)

VDD Pin

The VDD pin supplies power to the controller and is maintained at the correct voltage (nominally 3.3 V) by an

internal shunt regulator.

COL Pin

The COL pin is used to sense the collector voltage of the primary switching transistor, via a c oupling

capacitor, to control the timing and current levels of the signals produced on the BAS pin.

CS Pin

The CS pin senses the primary switch current via the current sensing resistor. The voltage sensed on this

pin is used to control the operating modes to manage standby and overload protection. Operating

characteristics are programmed via two external resistors.

AUX Pin

The AUX pin provides the supply current for the internal base driver block. In most applications, the AUX pin

is connected to the external supply rail via an NPN transistor and a current-limiting resistor to set the

maximum base current; however, in low power applications the AUX pin can be connected to the VDD pin

via the limiting resistor, with some compromise on the standby power consumption.

BAS Pin

The BAS pin switches the external bipolar primary switch transistor on and off. The current supplied to the

switch transistor is controlled to minimize the switching losses and thereby help optimize overall system

efficiency.

GND Pin

GND pins provide the ground reference. Where the device has multiple GND pins, all must be connected to

a common, low impedance path.

Product data

Page 2 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

TYPICAL APPLICATION CIRCUIT

The C2472, C2473 and C2474 controllers are intended primarily for single input voltage AC/DC applications,

such as replacement of line frequency linear transformer power supplies. These versatile controllers support

a wide range of applications at low cost. A typical circuit configuration is shown in Figure 3.

Figure 3: Typical RDFC Application Schematic

Typical 12 W Charger Performance

Input

115 V ac

12 V, 1 A dc

> 80%

Output

Efficiency

No-load power input

< 150 mW

Typical Maximum Application Rated Power

Power Switch

115 Vac

230 Vac

(Q1) Gain

Standard

High

20 W

40 W

60 W

Product data

Page 3 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

PRINCIPLE OF OPERATION

Power-Up/Power-Down Sequences

The C2472, C2473 and C2474 controllers are powered via their VDD pins. When mains voltage is first

applied, a small amount of current (I_DDSLEEP) is drawn from the rectified mains input via high value start up

resistors (Rht1 and Rht2 in Figure 3). When the voltage on the VDD pin (V_DD) reaches a level V_OVDTHRthe

controller wakes up, demands more supply current (I_DDWAKE) and enters the Start-up state (see Figure 4).

The controller stays in Start-up for a short time during which internal circuit blocks are enabled and then

changes to Active operation. In both Start-up and Active states, the controller uses an internal shunt

regulator to regulate the V_DDrail voltage; the regulator is disabled in Sleep. A higher regulation voltage is

applied during Start-up (V_DDREG(S)) than during Active operation (V_DDREG(R)) to help provide sufficient V_DD

before the Auxiliary supply from the transformer rises to maintain V_DD.

If the VDD pin voltage drops below V_UVDTHRthe controller goes back to Sleep, reducing the supply current

demand. The system will restart when input power is restored. To achieve a smooth power up sequence the

V_DDreservoir capacitor needs to be large enough to sustain the supply above V_UVDTHRover the Start-up

period.

Figure 4: VDD Pin Waveform (V_DD) During Initial Power-up and Power-down

State

Description

Sleep

From initial application of power or from Active state if V_DDfalls below V_UVDTHR, the

controller changes to Sleep state. Non-essential controller circuits are powered down

and the external switching transistor (Q1) is held off. Exit from Sleep state occurs when

V_DDrises above V_OVDTHRand the controller moves to the Start-up state.

Start-up

Active

When the Start-up state is entered, internal controller circuits are activated and power

conversion begins (Standby mode – see Table 2). In Start-up the on-chip shunt

regulator stabilises V_DDto an intermediate value, V_DDREG(S). After a preset time, the

controller changes from Start-up to Active operation.

Converter operation continues, the shunt regulator controls V_DDto the lower V_DDREG(R)

If V_DDfalls below V_UVDTHRthe controller ceases converter operation and reverts to

Sleep state.

.

Table 1: Summary of RDFC Controller States

Product data

Page 4 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

Start-up and Active State Power Conversion Modes

In the Start-up and Active states the C2472, C2473 and C2474 ICs have several modes for controlling power

conversion that are designed to achieve maximum efficiency and to limit power (current) across a wide range

of loads. Refer to Table 2 for a summary of each mode.

Mode

Typical Load

Range

Description

Standby

I_OUT≥ 0% to

~20% of rated

current

Standby mode reduces power consumption at low loads. It achieves this by

progressively reducing the on-time then by increasing the off-time as the load

decreases. As load increases, the converter duty is increased until the controller

returns to Normal mode. Typically, mains ripple causes change of operating mode

during each mains half-cycle, with the converter moving to lower-power modes

between peaks of the mains voltage.

Normal

I_OUT> ~20% to

100% of rated

current

Normal mode is used for steady state power delivery. During Normal mode the power

device switches in a fully resonant minimum-voltage-switching waveform, with the off-

time determined by the transformer resonance (T_RES) and the on-time being equal to

75% of the off time. A low level of primary switch current, sensed via the CS pin

voltage, causes the controller to change to Standby mode and a high level to Overload

mode.

Overload I_OUT>~100%

rated current

Overload mode is activated at high output loads. In this mode the on-time of the

primary switch is terminated early (before 75% of T_RES) when the primary current

exceeds a preset maximum, thereby protecting the primary switch and limiting the

output current. This results in reduction of the output voltage. Heavy overload (sensed

by the on-period of the primary switch reducing below a preset time) causes Foldback

mode to be entered.

Foldback V_OUT< ~70%

rated output

Foldback mode is entered from the Overload mode. In this mode the controller reduces

the on/off duty cycle to protect the power supply and any connected load by both

shortening the on-period and increasing the off-period of the primary switch. Converter

cycles continue to maintain auxiliary power to the controller. The controller exits the

Foldback mode and enters the Power Burst mode after a fixed number of power

conversion cycles.

Power

Burst

V_OUT< ~70%

rated output

Power Burst mode is entered periodically from Foldback mode in order to restart the

power supply output. In Power Burst mode, the controller operates at maximum

delivered power for a set number of power converter cycles. At the end of the burst, if

the load is not excessive, the converter goes to Normal mode; otherwise it reverts to

Foldback mode.

Table 2: Summary of Active Operating Modes

When the controller goes from Sleep to Start-up state, its power conversion mode is set to Standby. Typically

the converter output voltage is low at this time so the primary switch current is high during the first few

converter cycles. This causes the operating mode to change quickly to Normal or Overload mode.

Product data

Page 5 of 18

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

RDFC Power Supply I-V Characteristic

Figure 5 illustrates a typical RDFC power supply characteristic with the various Active state modes of

operation identified. I_NOMand V_NOMare the nominal output voltage and current drawn by the load at the rated

power of the application circuit.

Figure 5: Typical RDFC Power Supply Characteristic Indicating Different Active Modes of Operation

The exact thresholds for transition between modes depend on specific application characteristics, controller

internal clock frequency (F_CLK) and CS pin thresholds (V_OCPHand V_OCPL). These parameters and their effects

are explained later.

Product data

Page 6 of 18

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

Switching Waveforms

The collector voltage (V_CE) and current (I_C) waveforms of the primary switching transistor (Q1 in Figure 3) are

shown in Figure 6. T_RESis the duration of the transformer resonance during the off period. Note that in

Overload mode, the primary switch Q1 is turned off when the current exceeds the protection level OCPH

(sensed by the CS pin voltage).

Figure 6: Typical Switch (Q1) Collector Voltage (V_CE) and Current (I_C) Waveforms

Product data

Page 7 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

Resonance Control

The natural resonance of the transformer and associated components is deduced from the current flowing

into and out of the COL pin via the collector coupling capacitor.

The voltage sensed on the COL pin is used to control saturation of the primary switch transistor (Q1 in

Figure 3) during the on-period (see “Optimised Base Drive”). During the off-period, timing of the resonance is

detected via the current in and out of the pin, which has a low impedance path to GND during this time. Rate

of change of voltage at the transformer primary causes current into or out of the COL pin, which is processed

to measure the resonance period T_RESand to find the optimum turn-on time for the following conversion

cycle. The resonant period is also used to determine the maximum on-time of the primary switch transistor,

so that

T_ON= 0.75 x T_RES

The maximum duty cycle (D_NORMAL) is therefore nominally 43%. On-time of the switch is controlled to manage

power delivery and is reduced in both low-load and overload conditions. The minimum on-time in overload is

determined by the internal CS blanking, specified as T_CSBLANK

.

At turn-on of the primary switching transistor, its collector voltage can fall very rapidly, with correspondingly

large current out of or in to the COL pin via the coupling capacitor (Ccol). An on-chip clamp transistor,

controlled by an internal signal called ACTICLAMP, provides a low resistance path to GND. This transistor is

turned on shortly before turn-on of the primary switch and remains on until time T_ACTafter turn-on of the

primary switch. It is then turned off during the remainder of the primary switch on-period. In some

applications, the current through the coupling capacitor may develop sufficient voltage across the clamp

transistor to cause conduction of the ESD protection diodes. This is permissible up to a limit I_COLwhich is

specified in ABSOLUTE MAXIMUM RATINGS. If, due to application design, the capacitor current could

exceed this level, external protection diodes and a resistor must be provided (Dcol1, Dcol2 and Rcol in

Figure 3).

Product data

Page 8 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

Optimised Base Drive

To minimize losses in the primary switching transistor (Q1) its base current is carefully controlled. To

minimize turn-on losses, the base current is initially forced to a maximum value I_BASMAXfor a time T_FON(the

force-on or “FON” pulse). For the remainder of the on-time the base current is reduced to a lower value such

that the on-state collector voltage is maintained at a preset target voltage, thereby minimizing turn-off time

and consequent losses. During this period, T_PBD, the so called “proportional base drive” (PBD) current is

referred to as I_BASPBD

.

Aux Supply

Bypass transistor

Raux

AUX

Qon

Qoff

PBD

BAS

Q1

FON

T_PBD

GND

0V

Figure 7: Primary Switch (Q1) Base Drive

The BAS pin (see Figure 7) is driven by two transistors, Qon and Qoff. Qon provides I_BASMAXduring T_FONand

I_BASPBDduring the remainder of the on-period. Transistor Qoff provides a low-resistance (R_BASCLAMP) path to

GND during the off-period to ensure rapid turn-off of the primary switch, Q1. I_BASPBDis set by the PBD system

within the controller but I_BASMAXis determined by the external resistor Raux and the Aux Supply voltage.

I_BASMAX

I_BAS

V_CE

T_FON

T_PBD

Figure 8: Base Driver Current Waveforms

Product data

Page 9 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

I_BASPBDis controlled by monitoring the voltage at the COL pin during T_PBD; base current is increased

progressively as V_COLrises above threshold V_CREF(see Figure 9). The desired on-state V_CEof the switching

transistor is set by capacitors Cp and Ccol (see Figure 3), the COL pin capacitance (C_INCOL) and V_CREF

.

I_BASPBD

V_{CO L}

V_CREF

Figure 9: I_BASPBDcharacteristic

Power Control

Load conditions are sensed on a cycle-by-cycle basis via the CS pin. When low levels of output power

demand are detected, the controller progressively reduces the switching duty cycle to reduce power

consumption and to improve output voltage regulation. Power demand causes increase in duty up to the

maximum, or until Overload is detected.

The voltage at the CS pin is compared to two thresholds, one nominally at GND voltage (V_OCPL) to generate

an internal signal OCPL and the other at a negative threshold (V_OCPH) to generate an internal signal OCPH.

The controller samples OCPL a short time (T_OCPL) after turn-on of the primary switch. A negative voltage at

the CS pin indicates power demand so the controller increases the switching duty up to the maximum;

conversely a positive voltage causes a decrease in duty.

Excessive primary switch current, detected via OCPH, terminates the on-period of the primary switch to limit

power delivery (Overload mode). High levels of overload (when the converter output voltage held is low by

the load) causes OCPH to trigger soon after turn-on of the primary switch. This condition is detected by the

controller sampling OCPH at time T_FBTHRafter turn-on. If OCPH triggers within this time, the controller

changes to Foldback mode. To prevent mis-triggering, OCPH is blanked for a short period T_CSBLANKafter

turn-on.

Product data

Page 10 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

The effective thresholds for current through the primary switch for both power reduction (OCPL) and

overload (OCPH) are programmed by the current-sense resistors connected to the CS pin as shown in

Figure 10.

I_CSBIAS

OCPH

threshold (-ve)

Current

sense

comparators

GND

OCPL

CS

GND

R2

Primary

switch

Rcs

current

Figure 10: Current Sense Diagram

The internal current source (I_CSBIAS) develops an offset voltage across the series resistor (R2 in Figure 10) so

setting OCPL current threshold. Switch current in excess of overload (OCPH) is detected using a fixed

threshold voltage but the contribution from the offset voltage across R2 has to be taken into account.

I_OCPLthreshold current = (V_OCPL+ I_CSBIAS.R2)/Rcs

I_OCPHthreshold current = (V_OCPH+ I_CSBIAS.R2)/Rcs

V_OCPH I_OCPLV_OCPL I_OCPH

R2 

I_OCPH I_CSBIAS I_OCPL I_CSBIAS

V_OCPHV_OCPL

Rcs 

I_OCPH I_OCPL

Note: I_OCPL, I_OCPH, V_OCPHIC_SBIASare all positive magnitude in these formulae

Product data

Page 11 of 18

DS-1423-0709C

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

Protection Features

Collector De-saturation (Over Voltage) Protection (COVP)

To protect the primary switch from excessive power dissipation, the on-state voltage of the primary switching

transistor is limited by the controller. The controller will go to Foldback mode if the COL pin voltage is greater

than V_COVPat the end of the on-time for four consecutive cycles.

Over-temperature Protection (OTP)

Temperature sensing is integrated with the controller. If the temperature of the die rises above the shutdown

temperature, T_SH, the BAS output is inhibited. It restarts once the temperature has fallen more than T _{SH (HYST)}

below T_SH. In typical applications “hiccup” operation will occur. While BAS is inhibited, the device is active

and draws I_DDWAKE. This causes V_DDto fall since auxiliary power is not provided by the transformer. Once V_DD

reaches V_UVDTHR,the controller enters the Sleep state and I_DDfalls to I_DDSLEEPallowing V_DDto rise again (via

the resistors Vht1 and Vht2). When V_DDreaches V_OVDTHRreset occurs and the controller re-starts. If the die

temperature is below T_SH,BAS operation continues but if it is still above T_SH, BAS operation ceases after a

short period and the hiccup cycle repeats.

Primary Switch Over-current Protection (OCP)

To protect the primary switch, the base drive is turned off if the primary switch current rises too high, sensed

via the CS input voltage falling below a preset negative threshold V_OCPH. See also Power Control on page

10.

Output Overload/Short-circuit Protection

If the application circuit is overloaded beyond a certain limit the controller goes into Foldback mode with

reduced duty cycle, protecting the primary switch by reducing its power dissipation. Transition to Foldback

mode is triggered by the CS pin voltage crossing the V_OCPHthreshold within a time T_FBTHRof the start of the

FON pulse. This typically happens when the load holds the output voltage low. See also Power Control on

page 10.

Under Voltage Protection

The controller is prevented from operating if the V_DDsupply is inadequate (V_DD< V_UVDTHR). Once the

controller has stopped operation it will not restart until the V_DDsupply voltage rises above V_OVDTHR

.

Product data

Page 12 of 18

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

ABSOLUTE MAXIMUM RATINGS

CAUTION: Permanent damage may result if a device is subjected to operating conditions at or in excess of

absolute maximum ratings.

Parameter

Symbol Condition

Min

Max

4.6

Units

V

Supply voltage

Input voltage AUX

Input voltage BAS

Input voltage CS

Input voltage COL

Pin current VDD

Pin current AUX

V_DD

V_AUX

V_BAS

V_CS

-0.5

V_DD+ 0.5

30

V

-0.5

V

V_COL

I_DD

-0.5

V

-100

mA

I_AUX

100

100¹

All other conditions

Pin current BAS

Pin current CS

I_BAS

While Qoff is on (Figure 7), base T_j< 125 °C

220

duty < 30%

T_j< 100 °C

400

I_CS

100

During PBD: ESD diode limit, input is high

impedance

-100

100

mA

Pin current COL

I_COL

During turn-on transient (ACTICLAMP active)

During resonance off period

-250

-125

250

mA

Junction

temperature

T_J

T_STOR

T_L

-25

-40

125

150

260

^oC

Storage

temperature

Lead temperature

(soldering, 10 s)

Human body model, JESD22-A114

2

kV

V

ESD withstand

Charged device model, ANSI-ESD-STM5.3.1

500

¹I_BAScan be higher if controller is active and not in PBD or FON, up to V_BAS= V_DD

Product data

Page 13 of 18

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

NORMAL OPERATING CONDITIONS

Parameter

Symbol

Condition

Min

Typ

Max

Units

Supply voltage

V_DD

VDD pin, limited by internal regulator

3.1

3.3

3.5

V

Junction

temperature

Over temperature protection operates

at higher temperatures

T_J

-25

25

100

ºC

F_CLK

F_CLKTC

F_MAX

9.7

-35

12.1

14.5

5

MHz

kHzC^-1

MHz

µs

T_j= 25 C, V_DD=V_DDREG(R)

Internal digital clock

frequency

Temperature coefficient

F_CLK/ 61

F_CLK/ 490

35 / F_CLK

280 / F_CLK

Switching frequency,

Normal mode

Determined by T_RES(F_CLKin MHz)

F_MIN

T_RESMIN

T_RESMAX

I_DD

Transformer

resonance time

Natural resonance of transformer and

associated capacitances. F_CLKin MHz.

µs

Supply current

Limit externally

30

mA

ELECTRICAL CHARACTERISTICS

Unless otherwise stated:

1. Min and Max electrical characteristics apply over normal operating conditions.

2. Typical electrical characteristics apply at T_J= T_JTYPand V_DD= V_DDTYP

3. Functionality and performance is not defined when a device is subjected to conditions outside the

range of normal operating conditions and device reliability may be compromised.

4. For parameters dependent on F_CLK,the value of F_CLK,in MHz should be used in calculations.

VDD Pin

Parameter

Symbol

Condition

Min

Typ

3.3

4

Max

Units

V

V_DDREG(R)Active state, 2.5 mA < I_DD< 30 mA

V_DDREG(S)Start-up state, 2.5 mA < I_DD< 30 mA

I_DDSLEEPSleep state, V_DD< V_UVDTHR

3.1

3.5

Regulation voltage

Quiescent current

V

8

µA

Start-up & Active states, Normal mode

I_DDWAKE(V_DDREG(R)– 300 mV) < V_DDand

V_DD< (V_DDREG(R)- 100 mV)

Residual supply current

0.5

2.5

mA

OVD threshold, Sleep

UVD threshold

V_OVDTHRSleep state

V_UVDTHRStart-up and Active states

I_DD< 30 mA

3.5

2.7

4.6

3.2

V

V_DDREG(R)- V_UVDTHR

150

mV

AUX Pin

Parameter

Symbol

Condition

Min

Typ

Max

100

Units

mA

V

Input current

I_AUXMAX

I_AUX= 10 mA

I_AUX= 80mA

0.84

1.2

1.22

1.64

BAS = 800 mV

0 C < T_J< 100 C

AUX pin voltage

V_AUXFON

V

Product data

Page 14 of 18

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

CS Pin

Parameter

Symbol

Condition

Min

Typ

Max

Units

OCPH comparator

threshold

V_OCPH

-260

-235

mV

0 C < T_J< 100 C

OCPL comparator

threshold

V_OCPL

-5

5

mV

OCPH comparator

response time

Step CS input from

V_CS> -200 mV to V_CS< -300 mV

T_OCP

0.1

µs

40

67.5

59.5

µA

0 C < T_J< 100 C

T_j= 25C

I_CSBIAS

Bias current

41.5

19 / F_CLK

- 0.06

OCPL sampling time

Blanking period

T_OCPL

T_CSBLANK

T_FBTHR

F_CLKin MHz

µs

4 / F_CLK

- 0.06

Foldback threshold

time

26 / F_CLK

- 0.06

BAS Pin

Parameter

Symbol

Condition

Min

Typ

Max

Units

Base drive current

I_BASMAX

Limit by external resistor

100

mA

Base clamp turn-off

resistance

R_BASCLAMP

D_NORMAL

V_BAS= 400 mV

Normal mode

8.5

Ω

%

ns

Duty cycle

43

Standby mode

0 C < T_J< 100 C

100

400

230

705

Force-on period

T_FON

(depends on F_CLK

)

Normal, Foldback & Power Burst

modes. 0 C < T_J< 100 C

ns

µs

Minimum on-period

Maximum off-period

T_ONMIN

Standby (F_CLKin MHz)

20 / F_CLK

1920 / F_CLK

+ T_RES

T_OFFMAX

Burst length, number of converter

cycles

N_BURST

T_BURSTCYCMIN

N_FOLD

22144

39 / F_CLK

18326

cycles

µs

Power Burst mode

Foldback mode

Minimum converter cycle period in

Power Burst mode²(F_CLKin MHz)

Foldback duration between bursts,

number of converter cycles

Converter period in Foldback mode³

(F_CLKin MHz)

cycles

900 / F_CLK

T_RES

+

T_FOLDCYCMIN

T_OFFEXTMIN

µs

Extended off time (F_CLKin MHz)

896 / F_CLK

µs

²Minimum converter period = T_RES+ T_ONMIN

³Minimum converter period = T_RES+ T_OFFEXT+ T_ONMIN

Product data

Page 15 of 18

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C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

COL Pin

Parameter

Symbol

Condition

Min

Typ

Max

Units

Rising edge

comparator

threshold

I_CRISE

0.4

mA

Falling edge

comparator

threshold

I_CFALL

V_COVP

V_CREF

-0.4

mA

V

Collector over-

voltage comparator

threshold

0.7V_DD

0.76

0.9V_DD

1.1

Intercept of characteristic

10 mA < I_BAS< 80mA

(see Figure 11)

PBD threshold

voltage

V

PBD

transconductance

200

28

mAV^-1

Input leakage

current

-650

25

650

31

nA

pF

µs

T_J< 100  C

Input capacitance

C_INCOL

V_COL= 1 V

3 / F_CLK

0.06

–

Standby mode (F_CLKin MHz)

ACTICLAMP

duration after FON

T_ACT

Normal, Foldback and Power Burst

modes (F_CLKin MHz)

4 / F_CLK

0.06

µs

I_BAS(mA)

100

80

60

40

20

V_COL(V)

1.0

2.0

V_CREF

Figure 11: COL/BAS Transconductance (typical, at 25 °C)

Product data

Page 16 of 18

DS-1423-0709C

26-Sep-2007

C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

THERMAL CIRCUIT PROTECTION

Parameter

Symbol

Condition

Min

Typ

Max

Units

Thermal shutdown

temperature

T_SH

At junction

105

115

125

^oC

Thermal shutdown

hysteresis

T_{SH (HYST)}

At junction

35

^oC

PACKAGE THERMAL RESISTANCE CHARACTERISTICS

Conditions:

1. Controller IC mounted on typical PCB (1.6 mm thick, 35 µm copper, CEM1);

2. θ_JPmeasured to pin terminal of device at the surface of the PCB.

Junction-to-pin

θ_JP(Typical)

Junction-to-ambient

θ_JA(Typical)

Package

Units

SOT23-6

SOP-8

60

70

35

170

140

105

°C / W

PDIP-8

PACKAGE AND ORDERING INFORMATION

Package Marking

The PDIP-8 (C2474PW1) and SOP-8 (C2473PX1) packages are marked with the full product type number.

The SOT23-6 package (C2472PX2) is marked with a short code FA as illustrated in Figure 12.

C2472PX2 product

short code FA

Lot dependent

code XX (varies)

F A X X

Figure 12: C2472PX2 SOT23-6 Package Marking

Ordering

Type

Package

Packing Form

7” Tape & Reel

13” Tape & Reel

7” Tape & Reel

13” Tape & Reel

Tube

Order

C2472PX2-TR7

C2472PX2-TR13

C2473PX1-TR7

C2473PX1-TR13

C2474PW1-T1

C2472PX2

SOT23-6

C2473PX1

C2474PW1

SOP-8

PDIP-8

For further package and ordering information please contact CamSemi.

Product data

Page 17 of 18

DS-1423-0709C

26-Sep-2007

C2472, C2473 and C2474 Datasheet

RDFC Controllers for Offline Applications

DATASHEET STATUS

The status of this Datasheet is shown in the footer. Always refer to the most current version.

Datasheet Status

Product

Status

Definition

Product preview

In development

In qualification

In production

The Datasheet contains target specifications relating to design and

development of the described IC product. Application circuits are illustrative

only. Specifications are subject to change without notice.

Preliminary

The Datasheet contains preliminary specifications relating to functionality and

performance of the described IC product. Application circuits are illustrative

only. Specifications are subject to change without notice.

Product data

The Datasheet contains specifications relating to functionality and

performance of the described IC product. Application circuits are illustrative

only. Specifications are subject to change without notice.

CONTACT DETAILS

Cambridge Semiconductor Ltd

St Andrew’s House

St Andrew’s Road

Cambridge

CB4 1DL

United Kingdom

Phone: +44 (0)1223 446450

Fax:

+44 (0)1223 446451

Email: sales.enquiries@camsemi.com

Web: www.camsemi.com

DISCLAIMER

The product information provided herein is believed to be accurate and is provided on an “as is” basis. Cambridge Semiconductor Ltd

(CamSemi) assumes no responsibility or liability for the direct or indirect consequences of use of the information in respect of any

infringement of patents or other rights of third parties. Cambridge Semiconductor Ltd does not grant any licence under its patent or

intellectual property rights or the rights of other parties.

Any application circuits described herein are for illustrative purposes only. In respect of any application of the product described herein

Cambridge Semiconductor Ltd expressly disclaims all warranties of any kind, whether express or implied, including, but not limited to,

the implied warranties of merchantability, fitness for a particular purpose and non-infringement. No advice or information, whether oral or

written, obtained from Cambridge Semiconductor Ltd shall create any warranty of any kind. Cambridge Semiconductor Ltd shall not be

liable for any direct, indirect, incidental, special, consequential or exemplary damages, howsoever caused including but not limited to,

damages for loss of profits, goodwill, use, data or other intangible losses.

The products and circuits described herein are subject to the usage conditions and end application exclusions as outlined in Cambridge

Semiconductor Ltd Terms and Conditions of Sale which can be found at www.camsemi.com/legal .

Cambridge Semiconductor Ltd reserves the right to change specifications without notice. To obtain the most current product information

available visit www.camsemi.com or contact us at the address shown above.

Product data

Page 18 of 18

DS-1423-0709C

26-Sep-2007


型号：	C2472
厂家：	ETC
描述：	RDFC Controllers for Offline Applications RDFC控制器，用于离线应用控制器
文件：	总18页 (文件大小：466K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

C2472 [ETC]

相关型号：

C2472PX2

C2472PX2-TR13

C2472PX2-TR7

C2473

C2473A

C2473PX1-TR13

C2473PX1-TR7

C2474

C2474PW1-T1

C247A1

C247A2

C247B1