CMPWR160SA/T_技术文档

CALIFORNIA MICRO DEVICES

CMPWR160

USB Peripheral Power Management

Features

Applications

• 3.3V regulated output up to 500mA

• Quiescent current 35µA (typical)

• Shutdown mode current 7µA (typical)

• 30ms active LOW Power-On Reset (POR) pulse

• Thermal overload protection

• Bus-powered USB peripherals

• Self-powered USB peripherals

• Portable/battery-powered devices

• Critical power monitoring, hot-insertion devices

• Foldback current limiting protection

• Reverse-current protection

• 8 pin SOIC power package

The SmartOR^TMCMPWR160 combines a Low Dropout

Regulator (LDO) with a Power-On Reset (POR) pulse

generator, and is intended for Universal Serial Bus

(USB) peripherals. To meet the specification require-

ments of both USB 1.0 and USB 2.0, the CMPWR160

draws a very low quiescent current (35µA), and delivers

up to 500mA of load current at a fixed 3.3V output.

When V_CCis powered down, the device will automatically

enter reverse-current protection mode and maintain

isolation between V_OUTand V_CC. This is useful for applica-

tions that can use power from the USB port in addition to

internal batteries or an AC adapter supply (Wired-ORed

power systems). In the event of V_CCcollapsing below

V_OUT, the device will automatically enter shutdown mode

and fully isolate the V_CCpower source from the output.

The POR pulse (active LOW) has a typical duration of

30ms after the output has exceeded and stabilized

above 2.9V. Thus a new POR pulse is developed each

time the regulator power is interrupted and restored,

which occurs often on USB buses when cables are

connected (or disconnected) by the user. It is not

necessary to have a V_CCsupply for POR to operate,

allowing the CMPWR160 to work in Wired-ORed power

systems.

A ShutDown input (SD) forces the regulator to be

powered down on demand. While in shutdown mode the

POR circuitry will remain active, making the device

suitable for systems which contain backup or alternative

power sources.

The CMPWR160 is available in an 8-pin SOIC thermally

enhanced package, ideal for applications where space

is tight.

Pin Diagram and Electrical Schematic

V_CC

Top View

SD

V

1

2

3

4

8

7

6

5

GND

CC

SD

+

SD

V_REF

3.3V

–

POR

V_OUT

3.3V/500mA

V

OUT

+

GND

CMPWR160

8 LEAD SOIC

POR

30ms

–

Pin Diagram

2.9V

Simplified Electrical Schematic

Standard Part Ordering Information

Package

Ordering Part Number

Style

Power SOIC

Tubes

Tape & Reel

Part Marking

8

CMPWR160SA/T

CMPWR160SA/R

CMPWR160SA

C1571000

215 Topaz Street, Milpitas, California 95035

Tel: (408) 263-3214

Fax: (408) 263-7846

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5/22/2001

1

CALIFORNIA MICRO DEVICES

CMPWR160

Absolute Maximum Ratings

Parameter

ESD Protection (HBM)

V_CC/V_OUTVoltage

Rating

Unit

V

2000

6.0, GND –0.5

V_CC+ 0.5, GND –0.5

V_OUT+ 0.5, GND –0.5

V

SD Logic Input Voltage

POR Logic Output Voltage

Temperature: Storage

V

–40 to 150

0 to 70

0 to 125

Operating Ambient

Operating Junction

C

˚

Power Dissipation ^{Note 1}

Internally Limited

Operating Conditions

Range

Parameter

Unit

V_CC

4.2 to 5.5

V

Temperature (Ambient)

Load Current

C_EXT

0 to 70

C

˚

0 to 500

mA

µF

10 10ꢀ

Electrical Operating Characteristics

(over operating conditions unless specified otherwise)

Symbol

V_OUT

I_LIM

Parameter

Conditions

MIN

3.135

550

TYP

MAX

3.465

UNIT

V

Regulator Output Voltage

Regulator Current Limit

Short-Circuit Current Limit

Load Regulation

0mA < I_LOAD< 500mA

3.30

mA

mV

V

I_S/C

300

75

2

V_{R LOAD}

V_{R LINE}

V_DO

V_CC= 5V, I_LOAD= 5mA to 500mA

V_CC= 4.2V to 5.5V, I_LOAD= 5mA

MIN V_CC–V_OUTfor I_LOAD= 500mA

Regulator Enabled (No Load)

Regulator Disabled

Line Regulation

Regulator Dropout Voltage

Quiescent Supply Current

Shutdown Supply Current

V_CCPin Reverse Leakage

Shutdown High Detect

Shutdown Low Detect

POR Detect Threshold

POR Pulse Duration

0.6

35

7

0.9

50

10

I_Q

µA

V

I_SD

I_RCC

V_OUT= 3.3V, V_CC= 0V

V_CC= 5V

1

V_{IH SD}

V_{IL SD}

V_POR

T_POR

R_POR

3.0

1.0

2.9

30

0.5

V_CC= 5V

V

4.2V < V_CC< 5.5V

2.8

20

3.0

40

2

V

ms

kΩ

POR Output Impedance

After POR Threshold Detected

0.2

Sinking to GND/Sourcing from V_CC

T_DISABLEShutdown Temperature

T_HYSTThermal Hysteresis

160

20

C

˚

C

Note 1: The SOIC package used is thermally enhanced through the use of a fused integral leadframe. The power rating is based on a printed

circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multi-layer boards

using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (Please

consult with factory for thermal evaluation assistance.)

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CALIFORNIA MICRO DEVICES

CMPWR160

Interface Signals

V

_CCis the input power source for the Low Drop Out

ately enters reverse protection mode to prevent any

Regulator, capable of delivering 3.3V/500mA output

current even when the input is as low as 4.2V.

current flow back into the regulator pass transistor.

Under these conditions V_OUTwill also be used to provide

the necessary quiescent current for the internal refer-

Internal loading on this pin is typically 35µA when the

regulator is enabled, which reduces to only 7µA when-

ever the regulator is shutdown (SD taken Low). In the

event of V_CCcollapsing below V_OUT, the loading at V_CCwill

immediately reduce to less than 0.1µA.

POR

ence and

circuits. This ensures excellent start-up

characteristics for the regulator.

POR

is the Power-On-Reset output pin (Active Low).

When V_OUTrises above the POR threshold voltage

(typically 2.9V), the pin is forced to logic low (GND). The

pin remains logic low for 30ms then it is forced logic high

(3.3V). If V_OUTfalls below the POR threshold voltage

during this 30ms interval POR will remain logic low. If it

falls below the voltage threshold and then recovers the

30ms time will reset.

If the V_CCpin is within a few inches of the main input

filter, a capacitor may not be necessary. Otherwise an

input filter capacitor in the range of 1µF to 10µF will

ensure adequate filtering.

is the regulator shutdown input logic signal which is

SD

Active Low. This is a true CMOS input signal referenced

to V_CCsupply. When the pin is tied High (V_CC) the

regulator operates fully. When the pin is taken to GND,

the device enters shutdown mode and the regulator is

fully disabled. In this mode all critical POR circuitry

remains fully powered consuming less than 7µA (typical).

POR

If V_OUTfalls below the POR threshold voltage

immediately forced to logic low.

is

The power-on reset circuitry is designed to remain active

under all conditions and will produce a valid output even

when V_CCis not present. A very low quiescent current

(7µA typical) ensures continuous operation of the POR

circuit.

V

_OUTis the regulator output voltage used to power the

load. An output capacitor of 10µF is used to provide the

necessary phase compensation, thereby preventing

oscillation. The capacitor also helps to minimize the peak

output disturbance during line or load transients. When-

ever V_CCcollapses below the output the device immedi-

GND is the negative reference for all voltages. This

current that flows in the ground connection is very low

(35µA typical with the regulator enabled and 7µA typical

with the regulator disabled).

Pin Functions

Symbol

Description

V_CC

SD

Positive supply input for regulator. When V_CCfalls below V_OUTthe regulator is disabled.

Shutdown control input signal (Active Low) to disable internal voltage regulator and current supply

to less than 7µA.

POR

V_OUT

Power-On-Reset output signal is held Low until the output has been stable (>2.9V) for at least 30ms.

Regulator voltage ouput (3.3V) capable of delivering 500mA when device is enabled (SD is High).

Whenever the output exceeds 2.9V (TYP) the POR pulse is triggered.

GND

Negative reference for all voltages

CMPWR160

uP Reset

V

CC

POR

+

C

V

OUT

3.3V/500mA

IN

SD

V

OUT

V

CC

5V

1µF

GND

+

C

OUT

–

10µF

GND

Typical Application Circuit

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical DC Characteristics

3.35

3.30

3.25

3.20

3.15

3.10

3.05

Unless stated otherwise, all DC characteristics were

measured at room temperature with a nominal V_CC

supply voltage of 5V and an output capacitance of 10µF.

Resistive load conditions were used.

5mA Load

500mA Load

Line Regulation Characteristics of the regulator are

shown in Figure 3. At maximum rated load conditions

(500mA), a 100mV drop in regulation occurs when the

line voltage has collapses below 3.8V. For light load

conditions (5mA), regulation is maintained for line

voltages as low as 3.3V.

3.0

3.5

4.0

(V)

4.5

5.0

V

CC

Figure 3. Line Regulation

Load Regulation performance is shown from zero to

maximum rated load in Figure 4. A 10ꢀ to 100ꢀ

change of rated load, results in an output voltage

change of less than 10mV. This translates into an

effective output impedance of approximately 0.02Ω.

3.40

3.35

3.30

3.25

3.20

0

200

400

600

Load Current (mA)

Figure 4. Load Regulation

100

80

Ground Current is shown across the entire range of

load conditions in Figure 5. The ground current in-

creases by 40µA across the range of load conditions.

This increase is due to the current limiting protective

circuitry becoming active.

60

40

20

0

200

400

600

Load Current (mA)

Figure 5. Ground Current

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical DC Characteristics (continued)

V_CCOperating Current (no load,

high) is shown

60

50

40

30

20

SD

across a range of V_CCsupply voltages with the regula-

tor enabled in Figure 6. The graph shows that the

operating current is 35µA typical and changes by less

than 1µA across this range.

10

0

3.5

4.5

5.5

V

(V)

CC

Figure 6.V_CCOperating Current (no load)

10

8

V_CCShutdown Current variation with the V_CCsupply

voltage is shown in Figure 7.

6

4

2

0

1.5

2.5

3.5

(V)

4.5

5.5

V

CC

Figure 7.V_CCShutdown Current

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical Transient Characteristics

The transient characterization test setup is shown in

Figure 8. It was the setup used for the transient tests

unless specified otherwise.

In the line transient characterizations the V_CCsupply

voltage was controlled to step between 4.5 to 5.5V.

For the response characterization V_CCand SD were

POR

A maximum rated load current of 6.6Ω (500mA @ 3.3V)

was used during characterization along with a nominal

tied to ground and the V_OUTvoltage was directly driven

between 2.7 and 3.1V. This was done by connecting a

function generator directly to the output of the device.

These voltage values were picked because it drove V_OUT

V

_CCsupply voltage of 5V DC, unless specified otherwise.

The load transient characterization was done by switch-

ing between 6.6 and 660Ω load resistors. This switched

the load between 500 and 5mA respectively.

directly across the typical

threshold voltage of 2.9V.

POR

V_CCwas tied to ground to show that the

circuitry will

POR

operate even when the V_CCsupply voltage is not present.

For the V_CCpower-up and power-down characterizations

V_CCsupply was ramped between 0 and 5V. Both the rise

and fall times for the V_CCpower-up/down pulses were

controlled to be 15ms.

The oscilloscope traces show the full bandwidth re-

SD

,

POR, V_CCand V_OUTpins depending on

sponse at the

the characterization.

CMPWR160

POR

V

POR

CC

SD

V

OUT

V

OUT

V

CC

+

C2

C1

GND

C4

C3

(500mA)

6.6Ω

+

0.1µF

10µF

0.1µF

GND

Figure 8.Transient CharacterizationTest Setup

V_CCpower-up Cold Start

Figure 9 shows the output response during an initial V_CC

SD

Tek Run 25.0kS/s Sample

power up with

tied to V_CC. When V_CCreaches a

particular threshold, the regulator turns on. The un-

charged output capacitor causes maximum inrush

current to flow. At this point the device sees the output

as a short circuit and the device enters a protective

current limiting mode. The output capacitor quickly

charges and V_OUTrises. Once this voltage rises to just

below V_CCthe inrush current stops flowing and the output

rises with the input. V_OUTcontinues to rise with the input

until it reaches 3.3V.

V

CC

V

OUT

(500mA Load)

M 2.00ms Ch2

Ch2 1.00V

280mV

1.00V

Figure 9.V_CCPower-up Cold Start

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical Transient Characteristics continued

V_CCPower down

Tek Run 25.0kS/s Sample

Figure 10 shows the output response of the regulator

during a complete power down situation under full load

V

CC

SD

conditions with

tied to V_CC.

V

OUT

(500mA Load)

M 2.00ms Ch2

Ch2 1.00V

3.50V

1.00V

Figure 10.V_CCPower Down

Tek

25.0kS/s 3 Acqs

ShutdownTransient Response

The transient response of the output voltage to the SD

pin is shown in Figure 11. The graph shows that a

SD

rising edge on the

pin enables the regulator and a

SD

falling edge disables the regulator.

2

The rise and fall time for the output voltages are 100µs

and 200µs respectively.

(500mA Load)

V

OUT

M 200µs Ch2

3.0V

1.00V

Ch2 5.00V

Figure 11. ShutdownTransient Response

Tek Run 5.0kS/s Sample

POR

Response

The transient response of the active low POR pin to V_OUT

is shown in Figure 12. When V_OUTrises above the

3.1V

POR

threshold voltage (typically 2.9V), the pin is forced

V

OUT

to logic low (0V). The pin remains at logic low for 30ms

then it is forced to logic high (3.3V). If V_OUTfalls below the

POR threshold voltage during this 30ms interval POR

will remain logic low. If it falls below the voltage threshold

and then recovers the 30ms time will reset.

2

2.7V

POR

is

When V_OUTfalls below the

immediately forced to logic low.

threshold voltage

POR

V

_CCis tied to ground to show that the

circuitry will

POR

work without V_CCpresent.

M 10.0ms Ch2

2.90V

1.00V

Ch2 200mV

POR

Figure 12.

Response

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical Transient Characteristics continued

Load Step response

250kS/s

Tek Run

Sample

500mA

Figure 13 shows the output voltage (Ch1) response of

the regulator during a step load change between 5mA

and 500mA (represented on Ch2). For the 5mA to

500mA transition an initial transient overshoot of 60mV

occurs and then the output settles to its final voltage

within 20µs. For the 500mA to 5mA transition there is

also an initial overshoot of 60mV however it takes

approximately 250µs to settle to its final voltage.

Load

5mA

The overall DC voltage disturbance on the output is

approximately 25mV, which demonstrates the regulator

output impedance of 50mΩ.

1

VOUT (offset = 3.3V)

V

_OUToffset = 3.3V

M 200µs Ch2

1.60V

Ch1 50.0mV

2.00V

Figure 13. Load Step Response

Line Step Response

Tek

250kS/s

2 Acqs

Figure 14 shows the output response of the regulator to

a V_CCline voltage transient between 4.5V and 5.5V

(1Vpp as shown on Ch2). The load condition during this

test is 5mA. The output response produces less than

10mV of disturbance on both edges indicating a line

rejection of better than 40dB at high frequencies.

5.5V

V

CC

2

4.5V

V

_OUToffset = 3.3V

(5mA Load)

V

OUT(offset = 3.3V)

M 200µs Ch2

5.00V

20.0mV Ch2 500mV

Figure 14. Line Step Response

1000

Reset response time with overdrive

POR

Figure 15 shows the time it takes for the

signal to

POR

reset when the output voltage is driven below the

100

10

1

trigger threshold by varying amounts. The amount the

voltage is driven below the POR trigger threshold is the

overdrive voltage.

0

50

100

150

200

250

300

Overdrive (mV)

Figure 15. Reset ResponseTime with Overdrive

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical Thermal Characteristics

Based on a maximum power dissipation of

1.0W (2Vx500mA) with an ambient of 70°C the resulting

junction temperature will be:

Thermal dissipation of junction heat consists primarily

of two paths in series. The first path is the junction to

the case (θ_JC) thermal resistance which is defined by

the package style, and the second path is the case to

ambient (θ_CA) thermal resistance, which is dependent on

board layout.

T

_JUNC= T_AMB+ P_JUNC(θ_JA)

= 70°C + 1.0W (50°C/W)

= 70°C + 50°C = 120°C

The overall junction to ambient (θ_JA) thermal resistance is

equal to:

All thermal characteristics of the CMPWR160SA were

measured using a double sided board with two square

inches of copper area connected to the GND pins for

“heat spreading”.

θ_JA= θ_JC+ θ_CA

For a given package style and board layout, the operat-

ing junction temperature is a function of junction power

dissipation P_JUNC, and the ambient temperature, resulting

in the following thermal equation:

Measurements showing performance up to junction

temperature of 125°C were performed under light load

conditions (5mA). This allows the ambient temperature to

be representative of the internal junction temperature.

T

_JUNC= T_AMB+ P_JUNC(θ_JC) + P_JUNC(θ_CA

= T_AMB+ P_JUNC(θ_JA)

)

Note: The use of multi-layer board construction with

power planes will further enhance the thermal perfor-

mance of the package. In the event of no copper area

being dedicated for heat spreading, a multi-layer board

construction, using only the minimum size pad layout,

will typically provide the CMPWR160SA with an overall

θ_JAof 70°C/W which allows up to 780mW to be safely

dissipated.

The CMPWR160SA is housed in a thermally enhanced

package where all the GND pins (5 through 8) are

integral to the leadframe (fused leadframe). When the

device is mounted on a double sided printed circuit

board with two square inches of copper allocated for

“heat spreading”, the resulting θ_JAis 50°C/W.

OutputVoltage vs.Temperature

Figure 16 shows the regulator V_OUTperformance up to

the maximum rated junction temperature. A 125°C

variation in junction temperature from –25°C causes an

output voltage variation of about 50mV, reflecting

a voltage temperature coefficient of approximately

50ppm/°C.

3.35

3.33

3.31

3.29

3.27

3.25

–25

0

25

50

75

100

125

Temperature (˚C)

Figure 16.V_OUTTemperatureVariation (5mA)

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CALIFORNIA MICRO DEVICES

CMPWR160

Typical Thermal Characteristics continued

3.34

3.32

3.30

3.28

OutputVoltage (Rated) vs.Temperature

Figure 17 shows the regulator steady state perfor-

mance when fully loaded (500mA) from –25°C up to the

rated maximum temperature of 70°C. The output

variation at maximum load is approximately 20mV

across the shown operating temperature. This trans-

lates to a temperature coefficient of approximately

30ppm/°C.

3.26

3.24

–25

0

25

Temperature (˚C)

50

Figure 17.V_OUTTemperatureVariation (500mA)

POR VoltageThresholdTemperatureVariation

3.00

2.95

2.90

POR

Figure 18 shows the

threshold voltage variation

from –25°C up to the maximum rated junction tempera-

ture. The overall 150°C change in junction temperature

causes less than a 5mV variation in the POR threshold

voltage. This translates to a temperature coefficient of

6ppm/°C.

The POR pulse duration does not vary with temperature.

2.85

3.24

–25

0

25

50

75

100

125

Temperature (˚C)

POR

Figure 18.

Threshold

TemperatureVariation

V_CCSupply CurrentTemperatureVariation

40

Figure 19 shows the V_CCsupply current variation with

temperature from –25°C to the maximum rated junction

temperature with no load on the device. The supply

current changes less than 1µA over the entire 150°C

range shown in the plot.

38

36

34

32

30

–25

0

25

50

75

100

125

Temperature (˚C)

Figure 19.V_CCSupply Current

vs.Temperature

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CALIFORNIA MICRO DEVICES

CMPWR160

Applications

operating with an input V_BUSvoltage as low as 4.75V.

USB Bus-powered Peripheral Application

The CMPWR160 operates with input voltage down to

4.2V under full rated load of 500mA. It is suited for any

type of function even under transient conditions with

Universal Serial Bus (USB) peripherals can be powered

from the USB port. The cable carries signal on 2 lines,

a V_BUSline which is nominally 5V at the source and a

GND wire. See Figure 1. For example, an external

modem (USB device or peripheral) draws its power

from the USB port of a personal computer (USB host),

and one definite advantage of bus-powered devices is

that they do not need extra power cords and plugs.

330mV drop on V_BUS

.

Power-On Reset Operation

The CMPWR160 asserts a reset signal (

) when-

POR

ever the output voltage V_OUTdrops below the V_POR

threshold of 2.9V typical, keeping it asserted for 30ms

after V_OUThas risen above the reset threshold. The

reset signal is active-low, and its high level voltage is

The USB specification (revisions 1.1 and 2.0) sets

various limitations on the power distribution. A bus-

powered device must draw no more than 500mA in

operating mode. A “Suspend” mode is entered when no

data is exchanged on the bus between the host and

the peripheral device. In this mode the current drawn

by the peripheral is reduced and may not exceed

500µA. The CMPWR160 addresses these requirements

by providing regulations up to 500mA, with overload

current limit, short-circuit current limit, and a very low

quiescent current.

set by V_OUT

.

The device provides immunity to short-duration

negative-going pulse applied to V_OUT. The data sheet

figure 15 on pg.8 shows typical transient duration

versus reset comparator overdrive (V_POR- V_OUT), below

which the CMPWR160 will not generate a reset pulse.

In other words, the graph shows the maximum pulse

duration on a transient on V_OUTthat will not cause a

reset pulse. For example, a V_OUTtransient of 100mV

below the 2.9V threshold is detected only if it lasts for

4ms or more.

Each peripheral is required to have one data line, D+ or

D–, connected to a 1.5KΩ pull-up resistor terminated to

a 3.3V reference. The resistor is either connected to

the D+ data line for selecting high-speed mode, or to

the D– data line for low-speed mode. The pull-up

resistor draws 200µA current on all USB devices. In

Suspend mode, there is only 300µA (500µA - 200µA)

left to power the controller and the regulator. Clearly,

the low quiescent current (35µA typical) of the

CMPWR160 is a definite advantage. The CMPWR160

3.3V output can be used as a reference voltage for the

pull-up resistor.

Dual Power Battery and USB Application

Some hand-held devices can be powered from two

independent supplies: either a battery or a computer

USB port 5V. These devices could also require a

regulated 3.3V. A dual CMPWR160 configuration, as

shown in Figure 2, provides uninterrupted power, so

that the device can remain fully “on” when plugged into

the USB port.

Figure 2. Dual Power USB/Battery

CMPWR160

VBUS

3.3V

C

M

PWPW

R

16

1

0

60

U

SBSB_V

_

B

VB

U

US

S

µPµPRReseestet

Rpu

1.5kΩ

VV_CC

CC

POPO

R

USB

CABLE

VBUS

D+

3.3V

SDSD

VV_O

OUTUT

+ +CC_IN

IN

D+

USB

GGNNDD

CONTROLLER

HOST

1µ1FµF

V

V_O

D–

T

3.

3

.

V

3^UT

/

^OUV/

GND

G

N

D

50500m0mAA

1X

C

M

PWPW

R

16

1

0

60

µPµP

R

es

e

s

t

et

Figure 1. High-speed Device Cable

and Pull-up Resistor Connection

V

V_CC

POPO

R

CC

BA

B

TT

A

E

T

R

T

Y

+

SDSD

VV_O

OUTUT

+ +CC_IN

IN

–

+

+CC_O

OUTUT

G

N

ND

D

1µ1FµF

101µ0FµF

USB peripherals are classified in two groups: low-power

and high-power bus-powered devices. Low-power

functions draw less that 100mA when operational and

must be capable of operating with input V_BUSvoltage as

low as 4.40V. High-power functions can draw up to

500mA when operational and must be capable of

G

N

D

Application Circuit

215 Topaz Street, Milpitas, California 95035

Tel: (408) 263-3214

Fax: (408) 263-7846

www.calmicro.com

5/22/2001

11

CALIFORNIA MICRO DEVICES

CMPWR160

Applications continued

Dual Power Battery

References

and USB Application (continued)

1. California Micro Devices Application Note AP211,

“Instantly Available PCI Card Power

Management”.

Possible usage for this configuration is in portable

equipment such as PDAs, wireless PDAs, cellular

phones, video camcorders, digital cameras, CD

players, MP3 players, and games.

2. Universal Serial Bus Specification Revision 1.1

and 2.0

The regulator is compatible with various battery

configurations using non-rechargeable alkaline “AA”

batteries of 1.5V each, or rechargeable Nickel-Metal

Hydride (NiMH) batteries of 1.2V per cell.

•

4 “AA” batteries (1.5V per cell): 4 X 1.5V = 6.0V

4 NiMH cell (1.2V per cell): 4 X 1.2V = 4.8V

3 “AA” batteries (1.5V per cell): 3 X 1.5V = 4.5V

3 NiMH cell (1.2V per cell): 3 X 1.2V = 3.6V

(200mA MAX rated)

215 Topaz Street, Milpitas, California 95035

Tel: (408) 263-3214

Fax: (408) 263-7846

www.calmicro.com

12

5/22/2001


型号：	CMPWR160SA/T
厂家：	ETC
描述：	Analog IC 模拟IC\n 模拟IC 光电二极管
文件：	总12页 (文件大小：137K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CMPWR160SA/T [ETC]

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