D667 [ETC]
PCI-SCI Bridge Chips for System Area Networks; PCI -SCI的桥接芯片的系统区域网络型号: | D667 |
厂家: | ETC |
描述: | PCI-SCI Bridge Chips for System Area Networks |
文件: | 总2页 (文件大小:72K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PSB-64
PCI-SCI Bridge Chips
for System Area Networks
Dolphin´s PCI-SCI Bridge (PSB) Chip provides a
reliable, very high bandwidth and low-latency
connection between PCI buses, making it ideally
suited for server clustering and high performance
system area network applications.
The PSB-64 chip is designed to meet the requirements
for high availability clustering and remote I/O
applications. In a unique architecture combining both
direct memory access (DMA) and remote memory
access (RMA), high performance message passing
protocols and transparent bus bridging operations are
supported. The PSB chip is based on the ANSI/IEEE
Scalable Coherent Interface (SCI) standard.
Features and Benefits
• PCI 2.1 compliant, 64 bits, 33 MHz PCI bus
By use of the DMA controller chunks of memory can
be copied directly between PCI buses in a single copy
operation with no need for intermediate buffering in
adapter cards or buffer memories. This feature greatly
reduces latency and lowers overhead of data
transfers. The DMA controller supports both read and
write operations.
• ANSI/IEEE 1596-1992 Scalable Coherent
Interface (SCI) standard compliant
• ANSI/IEEE 1159.1 (JTAG) support
• Compatible with Dolphin Link Controllers
• Chaining (Read/Write) DMA Engine
• Up to 4096 map entries in offchip SRAM
• 4 - 512 KBytes page size
The remote memory access (RMA) feature of the PSB
enables ultra-low latency messaging and low
overhead and transparent I/O transfers. In RMA
mode, PCI bus memory transactions are converted
into corresponding SCI bus memory transactions
allowing two physically separate PCI buses to appear
as one. This feature allows applications to send data
between system memories without the use of
operating system services, thus greatly reducing
latency and overhead.
• Hostbridge capability (PCI arbiter, Event
reporter)
• Read prefetching/write gathering
• B-Link™ Compliant
The PSB has built-in address translation, error
detection and protection mechanisms to support
highly reliable connections.
PSB-64
Block Diagram
PCI 2.1 64-bits/33MHz
Slave
Master
DMA
Config
SCI
Responder
2 x Req
Stream
Buffer
Stream
Control
8 x Read
8 x Write
ResRecv
ReqSend
BLink Interface Unit
BLink 66 MHz
Technical Specifications
PCI Specification
Performance
Packaging and Power
PCI Specification 2.1
64 bits, 33 MHz operation
3.3V/5V PCI bus operation
33 MHz
313 Ball Grid Array
3 Watts
140 MBytes/sec RMA
107 MBytes/sec DMA
3.3V or 5V I/O
B-Link Specification
Product Code
Operating Temperature
64 bits, 50 MHz operation
500 Mbytes/sec bandwidth
PSB-64 (D667)
Operating Temperature: 4˚C–32˚C
Relative Humidity: 5%–95% non-condensing
SCI Specification
ANSI/IEEE 1596-1992 Scalable Coherent
Interface (SCI) compliant
Dolphin Interconnect Solutions Offices:
Dolphin Headquarters USA:
Dolphin USA:
Dolphin Europe:
Olaf Helsets vei 6
0621 Oslo, Norway
Internet Information:
E-mail: info@dolphinics.com
World Wide Web: http://www.dolphinics.com
3609 East Thousand Oaks Blvd, Suite 209
111 Speen Street
Westlake Village, CA 91362-3624
Framingham, MA 01701-2090
Phone:
(805) 371-9493
Fax:
Phone:
(508) 875-3030
Fax:
Phone:
+ 47 23 16 70 00
Fax:
© 1999 by Dolphin Interconnect Solutions, Inc. All rights reserved.
Specifications subject to change without notice. LinkController is a trade-
mark of Dolphin Interconnect Solutions. All other brand or product names
are trademarks or registered trademarks of their respective holders.
(805) 371-9785
(508) 875-1517
+ 47 23 16 71 80
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