DR-11525DX324 [ETC]
Converter ; 变流器\n
| 型号： | DR-11525DX324 |
| 厂家： | 
ETC |
| 描述： | Converter
|
| 文件： | 总4页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DR-1 1 5 2 5
1 6 -BIT HIGH FREQUENCY HYBRID
DIGITAL-TO-RES OLVER D/R CONVERTER
FEATURES
DESCRIPTION
Accuracy Up to 1 Minute
The DR-11525 is a versatile multiply- can drive displays directly. The output
ing digital-to-resolver converter. The line-to-ground voltage can be scaled by
digital input represents an angle, and external resistors. The DR-11525 also
the output is resolver type, sin/cos. includes high ac and dc common mode
The reference input will accept any rejection at the reference input
waveform, even a sawtooth for CRT
•
•
•
Operational Up to 10 kHz
2 Vrms, 6.81 Vrms, 11.8 VL-L, or
Scalable Resolver Outputs
drive. Because the reference is dc-
coupled to the output, the DR-11525
can be used as: a digital-to-resolver
converter using a sinusoidal refer-
2 mA rms Output
16-Bit Resolution
•
•
•
APPLICATIONS
Because of its high reliability, small size
ence as an input; a digital-to-sin/cos
and low power consumption, the hybrid
dc converter using a dc reference; or
DR-11525 is ideal for the most stringent
8-Bit/2-Byte Double Buffered
Transparent Latches
a polar-to-rectangular converter using
and severe industrial and military
a reference input proportional to the
ground or avionics applications. All units
radius vector; or a rotating cartwheel
are available with MIL-PRF-38534 pro-
DC-Coupled Reference Accepts
Any Waveform
•
sweep generator for PPI displays
cessing as a standard option.
using a sawtooth reference.
Among the many possible applica-
High-Rel CMOS D/R Chip
No +5 V Supply Required
Packaged in a 36-pin DDIP, the DR-
tions are computer-based systems in
•
•
11525 is a complete D/R converter in
which digital angle information is
one hybrid module. Hybrid technology
processed, such as synchro/resolver
results in low weight, low power con-
simulators, flight trainers, flight instru-
sumption, very high reliability, and a
mentation, fire control systems, IR,
wide operating temperature range. The
radar and navigation systems. In addi-
DR-11525 circuit design allows for high-
tion, the DR-11525 is ideal for motor
er accuracy and reduces the output
and robotic control test systems.
scale factor variation so that the output
TEST POINT - R
REFERENCE INPUTS
RESOLVER
OUTPUTS
13.37 k
13.37 k
36.71 k
36.71 k
49.92 k
49.92 k
+S
+C
D/R CONVERTER
HIGH ACCURACY
LOW SCALE FACTOR
VARIATION
S1
DIFFERENTIAL 26 V
(NOTE 1)
S2
REFERENCE
CONDITIONER
RESOLVER SCALING
OUTPUT AMPLIFIERS
BITS 1-16
S3
S4
SINGLE-ENDED 26 V
(NOTE 2)
TRANSPARENT
LATCH
TRANSPARENT
LATCH
ADJUSTABLE 4.4 V
(NOTE 3)
BITS 1-8 BITS 9-16
DIGITAL INPUT
LL
LA
LM
NOTES: 1) 26 VRMS REFERENCE IN = 11.8 V
DIFFERENTIAL OUTPUT
L-L
2) 26 VRMS REFERENCE IN = 6.8 VRMS SINGLE-ENDED OUTPUT
3) 4.4 VRMS REFERENCE IN = 2 VRMS SINGLE-ENDED OUTPUT
FIGURE 1. DR-11525 BLOCK DIAGRAM
© 1996, 1999 Data Device Corporation
TABLE 1. DR-11525 SPECIFICATIONS
Apply over temperature range, power supply range, reference voltage and
frequency range, and 10% harmonic distortion in the reference.
INTRODUCTION
As shown in FIGURE 1, the signal conversion in the DR-11525 is
performed by a high-accuracy digital-to-resolver converter whose
sin and cos outputs have a low scale factor variation as a func-
tion of the digital input angle. This resolver output is amplified by
scaling amplifiers for resolver output.The output line currents can
be 2 mA rms max, which is sufficient for driving R/D converters,
solid-state control transformers, and displays. Output power
amplifiers will be required, however, for driving electromechanical
devices such as synchros and resolvers.
PARAMETER
RESOLUTION
UNIT
Bits
DYNAMICS
VALUE
16
ACCURACY and
Output Accuracy
Minutes ±4 to ±1 min. (See Ordering info.)
1 minute part: 1 min up to 1 kHz, 1.5 min
for 1 to 5 kHz, and 3 min for 5 to 10 kHz
(guaranteed by design - tested at 5 kHz)
Differential Linearity
Output Setting Time
LSB
±1 max
µsec Less than 20 for any digital step change
DIGITAL INPUT
Logic Type
The reference conditioner has a differential input with high ac and
dc common mode rejection, so that a reference isolation trans-
former will seldom be required. There are three sets of reference
inputs which provide three different input/output ratios. The RH-
RL input provides a 0.45 ratio between the reference input and
the signal output and is designed to provide 11.8 VL-L differential
output for a 26 Vrms reference input. The RH2-RL2 input pro-
vides a 0.52 ratio between the reference input and the signal out-
put and is designed to provide a 6.81 Vrms single-ended output
for a 26 Vrms reference input. The RH3-RL3 input provides a
0.91 ratio between the reference input and the signal output and
is designed to provide a 2 Vrms single-ended output for a 4.4
Vrms reference input. Series resistors can be added to accom-
modate higher reference levels or to reduce the output level.
Natural binary angle, parallel positive
logic CMOS and TTL compatible.
Inputs are CMOS transient protected.
Logic 0 = 0 to +1 V
Logic 1 = +2.2 V to +5 V
20 max to GND (bits 1-16)
Load Current
µA
20 max to +5 V (LL, LM, LA)
See Timing Diagram (FIGURE 2.).
REFERENCE INPUT
Type
Three differential solid-state inputs: two
for standard 26 V, one programmable.
DC to 10 k
Frequency Range
Hz
Standard Input
Voltage (Note 1)
RH3-RL3
RH2-RL2
RH-RL
V
V
V
4.4
26
26
The reference conditioner output -R is intended for test purpos-
es. For a 26 Vrms nominal input to RH, RL, -R should be 5.9
Vrms.
Input Impedance
Single-Ended:RH-gnd k ohm 100 ±0.5%
The timing relationship of LL, LM, and LA is shown in FIGURE 2
as a design reference.
Differential: RH to RL
k ohm 200 ±0.5%
ANALOG OUTPUT
Type
Resolver
Output Current
Standard Output
Voltage (Note 2)
RH-RL
RH2-RL2
RH3-RL3
Transform. Ratio Tol.
Scale Factor Variation
DC Offset
mA rms 2 max
(Tracks Reference Input Voltage)
OUTPUT SCALING AND REF. LEVEL ADJUSTMENT
VrmsL-L 11.8 nominal
The DR-11525 operates like a multiplying D/A converter in that
the voltage of each output line is directly proportional to the ref-
erence voltage. Reference FIGURE 3.
6.81 (single ended)
Vrms
2.0 nominal (single ended)
±0.5 max
±0.1 max
Vrms
%
%
The magnitude of the resistors, R', in ohms is calculated as fol-
lows:
mV
Single ended
±15 max Varies with input angle.
For RH-RL: VOUT
VIN
45.38k
L-L
POWER SUPPLIES
Voltage
Max voltage without damage
=
V
+15 ±5%
+18 V
-15 ±5%
-18 V
100k + R'
Current or Impedance mAmax 35+ load current
35+ load current
TEMPERATURE RANGES (CASE)
Operation
-1 Option
-3 Option
Storage
°C
°C
°C
-55 to +125
0 to +70
-55 to +135
200 ns MIN
TRANSPARENT
LATCHED
PHYSICAL CHARACTERISTICS
Type
36 pin DDIP
Size
Weight
in.(mm)
oz (g)
0.78 x 1.9 x 0.21 (19.7 x 48.1 x 5.3)
0.85 (24)
DATA 1-16 BITS
Notes: 1) Maximum reference input RH-RL = 26 V +10%; RH2-RL2 = 26 V +10%;
RH3-RL3 = 16.4 V.
50 ns MIN
100 ns MIN
2) Minumum voltage output (when using scalable reference input) is 1 V
differential or 0.5 V single ended.
3) Differential is line-to-line (L-L); single ended is line-to-ground (L-gnd).
FIGURE 2. LL, LM, LA TIMING DIAGRAM
2
*For RH2-RL2: VOUT
VIN
45.38k
smooth function of (θ) without discontinuities and is less than
±0.05% for all values of (θ). The total maximum variation in
Ao[1 + A(θ)] is therefore ± 0.25%.
L-L
L-L
=
=
86.63k + R'
Because the amplitude factor (RH - RL)Ao(1 + A(θ)) varies simul-
taneously on all output lines, it will not be a source of error when
the DR-11525 is to drive a ratiometric system such as a synchro
or resolver. However, if the outputs are used independently, as in
x-y plotters, the amplitude variations must be taken into account.
*For RH3-RL3: VOUT
VIN
45.38k
49.92k + R'
*Note: For RH2, RL2 and RH3, RL3: VOUT(single-ended) = 1/2 VOUT
.
L-L
OUTPUT PHASING AND OUTPUT SCALE FACTOR
TABLE 2. PIN CONNECTION TABLE
PIN
1
2
3
4
5
6
7
8
NAME
NC
+15V
GND
-15V
RH2 (6.81V)
RL2 (6.81V)
-R
RL (11.8V)
RL3 (2V)
RH (11.8V)
RH3 (2V)
Bit 14
PIN
13
14
15
16
17
18
19
20
21
22
23
24
NAME
Bit 13
Bit 12
Bit 11
Bit 10
PIN
25
26
27
28
29
30
31
32
33
34
35
36
NAME
Bit 1 (MSB)
Bit 15
Bit 16 (LSB)
LM
LL
LA
S4 (-COS)
S1 (-SIN)
NC
The analog output signals have the following phasing:
Resolver output:
S3—S1 = (RH - RL)Ao(1 + A(θ)) sin θ
S2—S4 = (RH - RL)Ao(1 + A(θ)) cos θ
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
9
8
7
6
5
4
3
2
The output amplifiers simultaneously track reference voltage
fluctuations because they are proportional to (RH - RL). The
transformation ratio Ao is 11.8/26 for 11.8 VrmsL-L output. The
maximum variation in Ao from all causes is ± 0.2%.The term A(θ)
represents the variation of the amplitude with the digital signal
input angle. A(θ), which is called the scale factor variation, is a
9
NC
S3 (+SIN)
S2 (+COS)
10
11
12
Notes:
1. -R (Pin 7) can be used for test purposes to detect whether a reference signal
is present. See block diagram.
2. Functions LL, LA, and LM may be left unconnected when not used.
3. External scaling resistor pin 11 RH3 output pins (31, 32, 35, 36).
4. RH and RL (pins 10, 8) 26 V reference with differential outputs on pins 35, 36,
32, 31.
REFERENCE
INPUTS
45.38k
13.37k
13.37k
36.71k
36.71k
49.92k
49.92k
_
VOUT L-L
V (RH-RL)
+
5. RH2 and RL2 (pins 5, 6) 26 V reference with single-ended output on pins 35,
36.
6. RH3 and RL3 (pins 11, 9) 4.4 V reference with single-ended outputs on pins
35, 36.
8.703k
V (RH2-RL2)
R′
V (RH3-RL3)
R′
FIGURE 3. REFERENCE LEVEL ADJUSTMENT
35
(+SIN)
35
S3
S3
S2
S3
S1
S2
S4
S3
S1
S2
S4
32
36
31
DR-11525
DR-11525
36
3
(+COS)
S2
GND
FIGURE 5. SINGLE-ENDED RESOLVER OUTPUT
FIGURE 4. DIFFERENTIAL RESOLVER OUTPUT
3
ORDERING INFORMATION
1.900 MAX
(48.26)
PIN NUMBERS FOR
REFERENCE ONLY
DR-11525D X-X X X
Accuracy:
3 = ±4 minutes
4 = ±2 minutes
5 = ±1 minute*
Reliability:
1
18
19
0.800
MAX
(20.32)
0.600
(15.24)
BOTTOM VIEW
36
0 = Standard DDC procedures
1 = Fully Compliant with MIL-PRF-38534
2 = Screened to MIL-PRF-38534 but
without QCI testing
0.210 MAX
(5.33)
0.010 TYP
(0.25)
SIDE VIEW
3 = Fully Compliant with MIL-PRF-38534
+ PIND Testing
4 = Fully Compliant with MIL-PRF-38534
+ Solder Dip
5 = Fully Compliant with MIL-PRF-38534
+ PIND Testing + Solder Dip
6 = Screened to MIL-PRF-38534 + PIND
Testing but without QCI Testing
7 = Screened to MIL-PRF-38534 + Solder
Dip but without QCI Testing
8 = Screened to MIL-PRF-38534 + PIND
Testing + Solder Dip but without QCI
Testing
0.018 ±0.002 DIA TYP
(0.46 ±0.05)
0.100 TYP
(2.54)
0.250 MIN
(6.35)
17 EQ. SP. @ 0.100 = 1.700
TOL NONCUM
(@ 2.54 = 43.18)
Notes:
1. Dimensions shown are in inches (millimeters).
2. Lead identification numbers are for referenced only.
3. Lead cluster shall be centered within ±0.005 of outline dimensions. Lead spac-
ing dimensions apply only at seating plane.
4. Pin material meets solderability requirements of MIL-STD-202E, Method 208C.
FIGURE 6. DR-11525 MECHANICAL OUTLINE
36 PIN DDIP (CERAMIC)
Operating Temperature Range:
1 = -55 to +125°C (Case)
3 = 0 to +70°C (Case)
4 = -55 to +125°C (Case) + Variables Data
8 = 0 to +70°C (Case) + Variables Data
Options:
X = NONE
Package:
D = DIP Package
* Consult factory for availability of ±1 minute parts.
The information provided in this data sheet is believed to be accurate; however, no responsibility
is assumed by Data Device Corporation for its use, and no license or rights
are granted by implication or otherwise in connection therewith.
Specifications are subject to change without notice.
105 Wilbur Place, Bohemia, New York 11716-2482
For Technical Support - 1-800-DDC-5757 ext. 7389 or 7413
Headquarters - Tel: (631) 567-5600 ext. 7389 or 7413, Fax: (631) 567-7358
Southeast - Tel: (703) 450-7900, Fax: (703) 450-6610
West Coast - Tel: (714) 895-9777, Fax: (714) 895-4988
Europe - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264
Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689
World Wide Web - http://www.ddc-web.com
ILC DATA DEVICE CORPORATION
REGISTERED TO ISO 9001
FILE NO. A5976
A-09/96-2M
PRINTED IN THE U.S.A.
4
相关型号：
©2020 ICPDF网 联系我们和版权申明