EDI7P001FLC0101C15 [ETC]
Peripheral Miscellaneous ; 周边其他\n
| 型号： | EDI7P001FLC0101C15 |
| 厂家： | 
ETC |
| 描述： | Peripheral Miscellaneous
|
| 文件： | 总12页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PCMCIA Flash Memory Card
FLC Series
PCMCIA Flash Memory Card
General Description
1 MEGABYTE through 10 MEGABYTE (AMD based)
Features
• Low cost Medium/High Density Linear Flash
Card
WEDC’s FLC Series Flash memory cards offer medium/high
density linear Flash solid state storage solutions for code and
data storage, high performance disk emulation and execute in
place (XIP) applications in mobile PC and dedicated
(embedded) equipment.
• Based on AMD Am29F040 Components
(equivalent of AMD’s AmC0XXCFLKA)
• Single supply operation, no additional
programming voltage required
FLC series cards conform to PCMCIA international standard.
- 5 V only for write, erase and read operations
The card’s control logic provides the system interface and
controls the internal Flash memories. Card can be
read/written in byte-wide or word-wide mode which allows
for flexible integration into various systems. Combined with
file management software, such as Flash Translation Layer
(FTL), FLC Flash cards provide removable high-performance
disk emulation.
• Fast Read Performance
- 150ns Maximum Access Time
• PCMCIA/JEIDA 68-pin standard
- x8/ x16 Data Interface
- type I Form Factor
• Automated write and erase operations
- 64Kbyte memory sectors for faster
automated erase speed
The FLC series cards contain separate 2kB EEPROM
memory for Card Information Structure (CIS) which can be
used for easy identification of card characteristics.
- Typically 1.5 s per single memory sector
erase
- Random address writes to previously erased
bytes; 16µs per byte typical
The WEDC FLC series is based on AMD Am29F040 Flash
memories; the FLC04 is a direct equivalent of AMD’s
AmC0XXCFLKA, however it offers wider range of
intermediate memory capacities.
• 100,000 Erase/Program Cycles
Note:
Standard options include attribute memory. Cards without
attribute memory are available. Cards are also available with
or without a hardware write protect switch.
Architecture Overview
FLC Series Cards are based on the Am29F040 (4Mb) components which work with single 5V applications.
Manufacture/Device code is 01h/A4h.
FLC series is designed to support from 2 to 20 components, providing densities ranging from 1MB to 10MB in
1MB increments. In support of the PC Card 95 standard for word wide access devices are paired. Write, read and
erase operations can be performed as either a word or byte wide operation . By multiplexing A0, CE1# and CE2#,
8-bit hosts can access all data on data lines DQ0 - DQ7. The FLC series cards conform to the PC Card Standard
(PCMCIA) and JEIDA, providing electrical and physical compatibility. The PC Card form factor offers an industry
standard pinout and mechanical outline, allowing density upgrades without system design changes.
WEDC’s standard cards are shipped with WEDC’s Logo. Cards are also available with blank housings (no Logo).
The blank housings are available in both a recessed (for label) and flat housing. Please contact WEDC sales
representative for further information on Custom artwork.
1
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Block Diagram
Vcc
Device Pair 9
Device 19
Device 18
CSL9
CSH9
ADDRESS
BUFFER
Array Address
ADDRESS BUS
A1-A23
A1-A19
Bus
Control
Address
Bus
Vcc
WE#
OE#
C9
High
C0
CSH9
Control Logic
PCMCIA
Interface
CSH0
CE2#
CE1#
Device Pair 1
C9
Low
C0
CSL9
CSL0
REG#
A0
WP
Device 3
Device 2
Device 0
CSH1
CSL1
CSL0
Ctrl
Att enable
Device Pair 0
Device 1
Vcc
Attrib. Mem
CSH0
CIS
EEPROM 2kB
WR#
RD#
Q0-Q7
DATA
BUS
Q8-Q15
DATA
BUS
Q0-Q7
control
Vcc
I/O buffer
DATA
BUS
D0-D7
DATA
BUS
D8-D15
SUPPORTED COMPONENTS (max 20 X):
CD1#
Am29F040
CD2#
GND
Vcc
Vcc
WAIT#
BVD1
BVD2
Manuf ID Device ID
Device type
Am29F040
01
A4
H
H
VS1
VS2
open
open
Vpp1
Vpp2
open
open
2
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Pinout
Pin Signal name I/O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Active
Pin Signal name I/O
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
Reserved
Active
LOW
1
2
3
4
5
6
7
8
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
RFU
RFU
A17
A18
A19
A20
A21
Vcc
Vpp2
A22
A23
A24
A25
VS2
RST
Wait#
RFU
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
I/O
I/O
I/O
I/O
I/O
I
I
O
I/O
I/O
I/O
I/O
I
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
SupplyVoltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
LOW
LOW
I
O
LOW
N.C.
N.C.
N.C.
9
OE#
A11
A9
A8
A13
I
I
I
I
I
I
I
10
11
12
13
14
15
Reserved
I
I
I
I
I
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
Extended Bus cycle
Reserved
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
A14
WE#
1MB(2)
2MB(2)
4MB(2,3)
LOW
N.C.
16 RDY/BSY
O
#
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Vcc
Vpp1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND
N.C.
N.C.
8MB(2,3)
16/10MB(2,3)
N.C.
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I
N.C.
N.C.
N.C.
LOW(1)
N.C.
LOW
(1)
(1)
O
I
O
O
I/O
I/O
O
I
I
I/O
I/O
I/O
O
Data bit 1
Data bit 2
Write Potect
Ground
Data bit 9
Data bit 10
Card Detect 2
Ground
HIGH
O
LOW
Notes:
1. Wait#, BVD1 and BVD2 are driven high for compatibility
2. Shows density for which specified address bit is MSB. Higher order address bits are N.C.
(i.e. 4MB A21 is MSB A22 - A25 are NC).
3. For the 3MB card the memory will wrap at the 4MB boundary, for 5MB, 6MB, and & 7MB cards the memory
will wrap at the 8MB boundary, for 9MB and 10MB cards the memory will wrap at the 16MB boundary.
Mechanical
Interconnect area
3.0mm MIN
1.6mm ± 0.05
(0.063”)
10.0mm MIN
(0.400”)
1.0mm ± 0.05
(0.039”)
Substrate area
54.0mm ± 0.10
(2.126”)
85.6mm ± 0.20
(3.370”)
1.0mm ± 0.05
(0.039”)
10.0mm MIN
(0.400”)
3.3mm ± T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
3
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Card Signal Description
Symbol
Type
Name and Function
INPUT
A0 through A25 enable direct addressing of up to
ADDRESS INPUTS:
A0 - A25
64MB of memory on the card. Signal A0 is not used in word access mode.
The memory will wrap at the card density boundary (see PINOUT, note 3).
The system should not try to access memory beyond the card density. A25
is the most significant bit. A24 – A25 are not connected.
INPUT/OUTPUT
INPUT
DQ0 THROUGH DQ15 constitute the bi-directional
databus. DQ0 – DQ7 constitute the lower (even) byte and DQ8 – DQ15 the
upper (odd) byte. DQ15 is the MSB.
DATA INPUT/OUTPUT:
DQ0 - DQ15
CE1#, CE2#
OE#
CE1# enables even byte accesses, CE2#
CARD ENABLE 1 AND 2:
enables odd byte accesses. Multiplexing A0, CE1# and CE2# allows 8-bit
hosts to access all data on DQ0 - DQ7.
INPUT
Active low signal gating read data from the memory
OUTPUT ENABLE:
card.
INPUT
N.C.
Active low signal gating write data to the memory card.
WRITE ENABLE:
WE#
RDY/BSY#
Indicates status of internally timed erase or
READY/BUSY OUTPUT:
program algorithms. This signal is not connected.
OUTPUT
OUTPUT
Provide card insertion detection. These signals
are internally connected to ground on the card. The host shall monitor these
signals to detect card insertion (pulled-up on host side).
Write protect reflects the status of the Write Protect
switch on the memory card. WP set to high = write protected, providing
CARD DETECT 1 and 2:
CD1#, CD2#
WRITE PROTECT:
WP
internal hardware write lockout to the Flash array.
If card does not include optional write protect switch, this signal will be
pulled low internally indicating write protect = "off".
N.C.
N.C.
Provides programming voltages
12.0V for lower byte (D0 – D7) memory components. This signal is not
PROGRAM/ERASE POWER SUPPLY:
VPP1
VPP2
connected.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages
12.0V for upper byte (D8 – D15) memory components. This signal is not
connected.
(5.0V).
CARD POWER SUPPLY:
CARD GROUND
VCC
GND
REG#
INPUT
Active low signal, enables access to
ATTRIBUTE MEMORY SELECT :
Attribute Memory Plane, occupied by Card Information Structure and Card
Registers.
N.C.
Active high signal for placing cards in Power-on default state. This
RESET:
signal is not connected.
RST
OUTPUT
OUTPUT
OUTPUT
This signal is pulled high internally for compatibility. No wait states
are generated.
WAIT:
WAIT#
These signals are pulled high to maintain
BATTERY VOLTAGE DETECT:
SRAM card compatibility.
BVD1, BVD2
VS1, VS2
Notifies the host socket of the card's VCC
VOLTAGE SENSE:
requirements. VS1 and VS2 are open to indicate a 5V card.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
RFU
N.C.
pin may be driven or left floating
Functional Truth Table
READ function
Common Memory
Attribute Memory
Function Mode
/CE2 /CE1 A0
/OE /WE
/REG D15-D8
D7-D0
High-Z
Even-Byte
Odd-Byte
/REG D15-D8
D7-D0
Standby Mode
Byte Access (8 bits)
High-Z
High-Z
High-Z
High-Z
High-Z
H
H
H
L
H
L
L
L
H
X
L
H
X
X
X
L
L
L
L
X
H
H
H
H
X
H
H
H
H
X
L
L
L
L
High-Z Even-Byte
High-Z Not Valid
Word Access (16 bits)
Odd-Byte Only Access
WRITE function
Odd-Byte Even-Byte
Not Valid Even-Byte
Odd-Byte
High-Z
Not Valid
High-Z
L
Standby Mode
Byte Access (8 bits)
X
X
X
X
X
X
X
X
X
X
H
H
H
L
H
L
L
L
H
X
L
H
X
X
X
H
H
H
H
X
L
L
L
L
X
H
H
H
H
X
L
L
L
L
Even-Byte
Odd-Byte
Even-Byte
X
Even-Byte
X
Word Access (16 bits)
Odd-Byte Only Access
Odd-Byte Even-Byte
Odd-Byte
X
L
4
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Absolute Maximum Ratings(1)
Note:
Operating Temperature TA (ambient)
Commercial
(1) Stress greater than those listed under
“Absolute Maximum Ratings” may cause
permanent damage to the device. This is a
stress rating only and functional operation at
these or any other conditions greater than
those indicated in the operational sections of
this specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
0°C to +60 °C
Industrial
Storage Temperature
Commercial
Industrial
Voltage on any pin relative to VSS
VCC supply Voltage relative to VSS
-40°C to +85 °C
-30°C to +80 °C
-40°C to +85 °C
-0.5V to VCC+0.5V
-0.5V to +7.0V
DC Characteristics(1)
Typ(2)
Symbol Parameter
VCC Read Current
Density Notes
Max Units Test Conditions
All
45
mA VCC = VCCmax
tcycle = 150ns,CMOS levels
I
CCR
VCC Program Current
All
65
mA Programming in Progress
I
CCW
VCC Erase Current
All
65
0.7
0.9
1.3
2.5
mA Erasure in Progress
I
CCE
VCC Standby Current
1MB
2MB
4MB
0.015
0.015
0.015
VCC = VCCmax
Control Signals = VCC
mA CMOS levels
I
CCS
(CMOS)
10MB
0.015
CMOS Test Conditions: VCC = 5V ± 5%, VIL = VSS ± 0.2V, VIH = VCC ± 0.2V
Notes:
1. All currents are RMS values unless otherwise specified. ICCR, ICCW and ICCE are based on Byte wide operations.
For 16 bit operation values are double.
2. Typical: VCC = 5V, T = +25ºC
Symbol
Parameter
Notes
Min
Max
Units
Test Conditions
Input Leakage Current
1
±20
µA
VCC = VCCMAX
Vin =VCC or VSS
I
LI
Output Leakage Current
Input Low Voltage
1
1
±20
0.8
µA
V
VCC = VCCMAX
Vout =VCC or VSS
I
LO
0
V
IL
Input High Voltage
Output Low Voltage
Output High Voltage
1
1
1
1
0.7VCC VCC+0.5
0.4
V
V
V
V
V
IH
IOL = 3.2mA
IOH = -2.0mA
V
OL
VCC-0.4
3.2
VCC
4.2
V
OH
VCC Erase/Program
Lock Voltage
V
LKO
Notes:
1. Values are the same for byte and word wide modes for all card densities.
2. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND
due to internal pull-up resistors.
5
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
AC Characteristics
Read Timing Parameters
150ns
Min
SYMBOL
(PCMCIA)
tC(R)
Parameter
Max
Unit
Read Cycle Time
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ta(A)
Address Access Time
Card Enable Access Time
Output Enable Access Time
Address Setup Time
150
150
75
20
0
ta(CE)
ta(OE)
tsu(A)
tsu(CE)
th(A)
Card Enable Setup Time
Address Hold Time
20
20
0
th(CE)
tv(A)
Card Enable Hold Time
Output Hold from Address
Change
tdis(CE)
tdis(OE)
ten(CE)
ten(OE)
Output Disable Time from CE#
75
75
ns
ns
ns
ns
Output Disable Time from OE#
Output Enable Time from CE#
Output Enable Time from OE#
5
5
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
Read Timing Diagram
tc(R)
th(A)
ta(A)
A[25::0], /REG
/CE1, /CE2
tv(A)
ta(CE)
tsu(CE)
NOTE 1
NOTE 1
th(CE)
ta(OE)
tsu(A)
tdis(CE)
/OE
tdis(OE)
ten(OE)
D[15::0]
DATA VALID
Note: Signal may be high or low in this area.
6
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Write Timing Parameters
150ns
Min
SYMBOL
(PCMCIA)
tCW
Parameter
Max
Unit
Write Cycle Time
Write Pulse Width
Address Setup Time
150
80
ns
ns
ns
ns
ns
tw(WE)
tsu(A)
20
tsu(A-WEH) Address Setup Time for WE#
100
100
tsu(CE-
WEH)
Card Enable Setup Time for WE#
tsu(D-WEH) Data Setup Time for WE#
50
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
th(D)
Data Hold Time
trec(WE)
tdis(WE)
tdis(OE)
ten(WE)
ten(OE)
Write Recover Time
Output Disable Time from WE#
Output Disable Time from OE#
Output Enable Time from WE#
Output Enable Time from OE#
75
75
5
5
tsu(OE-WE) Output Enable Setup from WE#
th(OE-WE) Output Enable Hold from WE#
10
10
0
tsu(CE)
th(CE)
Card Enable Setup Time from OE#
Card Enable Hold Time
20
Note: AC timing diagrams and characteristics are guaranteed to meet
or exceed PCMCIA 2.1 specifications.
Write Timing Diagram
tc(W )
A [2 5 ::0 ], /R E G
ts u (A -W E H )
tre c (W E )
th (C E )
ts u (C E -W E H )
tsu (C E )
/C E 1 , /C E 2
N O T E
1
N O T E
1
/O E
th (O E -W E )
th (D )
tw (W E )
ts u (A )
/W E
tsu (O E -W E )
ts u (D -W E H )
D [1 5 ::0 ](D in )
N O T E
2
D A T A IN P U T
td is (W E )
td is(O E )
te n (O E )
te n (W E )
N O T E
2
D [1 5 ::0 ](D o u t)
Notes:
1. Signal may be high or low in this area.
2. When the data I/O pins are in the output state, no signals shall be
applied to the data pins (D15 - D0) by the host system.
7
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Data Write and Erase Performance
VCC = 5V ± 5%, TA = 25ºC
Typ(1)
Parameter
Comments
Min
Max
Units
Sector Erase Time
Chip Erase Time
Byte Programming Time Excludes system-level overhead
Chip Programming Time Excludes system-level overhead
Excludes 00h programming prior to erasure
Excludes 00h programming prior to erasure
1.0
15
120
1000(3)
25(3, 4)
s
8
7
s
µs
s
3.6
Notes:
1. Typical: Nominal voltages, TA = 25ºC, 100,000 cycles.
2. Although Embedded Algorithms allow for a longer chip program and erase time, the actual time will be
considerably less since bytes program or erase significantly faster than the worst case byte.
3. Under worst case condition of 90°C, 4.5 V Vcc, 100,000 cycles.
4. The Embedded Algorithms allow for 2.5 ms byte program time. DQ5 = “1” only after a byte takes the
theoretical maximum time to program. A minimal number of bytes may require significantly more
programming pulses than the typical byte. The majority of the bytes will program within one or two pulses.
This is demonstrated by the typical and maximum programming times.
8
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
CIS Information for FLC Series Cards
Address
00H
Value
01H
03H
53H
0DH
06H
2DH
0EH
4DH
16H
6DH
1EH
8DH
26H
FFH
Description
CISTPL_DEVICE
TPL_LINK
Address
3EH
40H
42H
44H
46H
48H
4AH
4CH
4EH
50H
52H
54H
56H
58H
5AH
5CH
5EH
62H
64H
66H
68H
6AH
6CH
6EH
70H
72H
74H
76H
78H
7AH
7CH
7EH
80H
82H
84H
86H
88H
8AH
8CH
8EH
90H
Value
01H
45H
44H
49H
37H
50H
Description
TPLLV1_MINOR
02H
E
04H
FLASH = 150ns (device writable)
Card Size:1MB
2MB
D
06H
I
7
3MB
P
4MB
1)
1)
1)
0
30H
30H
31H
5MB
0
6MB
1
7MB
F
46H
8MB
L
4CH
43H
9MB
C
10MB
2)
0
30H
32H
08H
0AH
0CH
0EH
10H
12H
14H
16H
18H
1AH
1CH
1EH
20H
22H
24H
26H
28H
2AH
END OF DEVICE
CISTPL_JEDEC_C
TPL_LINK
2)
2
-
18H
02H
01H
A4H
17H
03H
42H
01H
FFH
2DH
-
2DH
2DH
31H
35H
20H
00H
43H
4FH
50H
59H
52H
49H
47H
48H
54H
20H
45H
4CH
45H
43H
54H
52H
4FH
4EH
49H
43H
AMD - ID
-
Am29F040- ID
CISTPL_DEVICE_A
TPL_LINK
1
5
SPACE
EEPROM- 200ns
Device Size = 2KBytes
END OF TUPLE
CISTPL_DEVICEGEO
TPL_LINK
END TEXT
C
O
P
1EH
06H
02H
11H
01H
01H
01H
01H
Y
DGTPL_BUS
DGTPL_EBS
DGTPL_RBS
DGTPL_WBS
DGTPL_PART
FLASH DEVICE
NON-INTERLEAVED
CISTPL_MANFID
TPL_LINK(04H)
R
I
G
H
T
SPACE
E
L
2CH
2EH
30H
32H
34H
36H
38H
3AH
3CH
20H
04H
F6H
01H
00H
00H
15H
47H
04H
E
C
T
R
O
N
I
TPLMID_MANF: LSB
TPLMID_MANF: MSB
EDI
EDI
LSB: Number Not Assigned
MSB: Number Not Assigned
CISTPL_VERS1
TPL_LINK
TPLLV1_MAJOR
C
1)
Address Value Desc. Value Desc. Value Desc. Value Desc. Value Desc. Value Desc. Value Desc. Value Desc. Value Desc.
4AH
4CH
4EH
30H
30H
32H
0
0
2
30H
30H
33H
0
0
3
30H
30H
34H
0
0
4
30H
30H
35H
0
0
5
30H
30H
36H
0
0
6
30H
30H
37H
0
0
7
30H
30H
38H
0
0
8
30H
30H
39H
0
0
9
30H
31H
30H
0
1
0
2)
Address Value Description
56H
58H
30H
34H
0
4
9
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
CIS Information for FLC Series Cards (Cont.)
92H
94H
96H
98H
9AH
9CH
9EH
SPACE
20H
44H
45H
53H
49H
47H
4EH
D
E
S
I
G
N
A0H
A2H
S
53H
20H
SPACE
A4H
A6H
A8H
AAH
ACH
AEH
B0H
B2H
B4H
B6H
B8H
BAH
BCH
BEH
C0H
C2H
C4H
C6H
C8H
CAH
CCH
I
49H
4EH
43H
4FH
52H
50H
4FH
52H
41H
54H
45H
44H
20H
00H
31H
39H
39H
37H
00H
00H
FFH
N
C
O
R
P
O
R
A
T
E
D
SPACE
END TEXT
1
9
9
7
END TEXT
END OF LIST
CISTPL_END
10
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
PRODUCT MARKING
WED7P010FLC0200C15 C995 9915
EDI
Date code
Lot code / trace number
Part number
Company Name
Note:
Some products are currently marked with our pre-merger company name/acronym (EDI). During our
transition period, some products will also be marked with our new company name/acronym (WED).
Starting October 2000 all PCMCIA products will be marked only with the WED prefix.
PART NUMBERING
7P010FLC0200C15
Card access time
15
25
150ns
250ns
Temperature range
C
I
Commercial 0°C to +70°C
Industrial -40°C to +85°C
Packaging option
00
Standard, type 1
Card family and version
- See Card Family and Version Info. for details (next page)
Card capacity
010 10MB
PC card
P
Standard PCMCIA
R
Ruggedized PCMCIA
Card technology
7
8
FLASH
SRAM
11
August 2000 Rev. 3 - ECO #13127
PC Card Products
PCMCIA Flash Memory Card
FLC Series
Ordering Information
EDI 7P XXX FLC YY SS T ZZ
Based on Am29F040
where
XXX:
001
002
003
004
005
006
007
008
009
010
1MB
2MB
3MB
4MB
5MB
6MB
7MB
8MB
9MB
10MB
YY:
SS:
01
No Attribute memory, no Write Protect switch
Attribute memory, no Write Protect switch
No Attribute memory, with Write Protect switch
Attribute memory, with Write Protect switch
02
03
04
00
01
02
WEDC Silkscreen
Blank Housing, Type I
Blank Housing, Type I Recessed
T:
C
I**
Commercial
Industrial
ZZ:
15
150ns
Notes: Options without attribute memory and with/without hardware write protect switch are available.
** Denotes advanced information.
REVISION HISTORY
Date of revision
23-Dec-98
revision
Description
0
1
2
3
Initial release
Logo change
Added page 10
27-May-99
31-May-00
1-Aug-00
Corrected timing errors on pgs. 6 & 7
White Electronic Designs Corporation
One Research Drive, Westborough, MA 01581, USA
tel: (508) 366 5151
fax: (508) 836 4850
www.whiteedc.com
12
August 2000 Rev. 3 - ECO #13127
PC Card Products
相关型号：
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