EDI8F3232C-MM [ETC]
SRAM Modules ; SRAM模块\n
| 型号： | EDI8F3232C-MM |
| 厂家： | 
ETC |
| 描述： | SRAM Modules
|
| 文件： | 总6页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EDI8F3232C
32Kx32 SRAM Module
32Kx32 Static RAM
CMOS, High Speed Module
Features
The EDI8F3232C is a high speed megabit Static RAM
module organized as 32Kx32. This module is constructed
fromfour32Kx8StaticRAMsinSOJpackagesonanepoxy
laminate (FR4) board.
Four chip enables (EØ-E3) are used to independently
enable the four bytes. Reading or writing can be executed
on individual bytes or any combination of multiple bytes
through proper use of selects.
The EDI8F3232C is offered in both 64 lead SIMM and 64
pin ZIP packages, which enables one megabit of memory
to be placed in less than 1.2 square inches of board space.
Allinputs andoutputs areTTLcompatibleandoperatefrom
a single 5V supply. Fully asynchronous circuitry is used,
requiringnoclocksorrefreshingforoperationandproviding
equal access and cycle times for ease of use.
32Kx32 bit CMOS Static
Random Access Memory
• Access Times 12, 15, 20, and 25ns
• Individual Byte Selects
• Output Enable Function
• Fully Static, No Clocks
• TTL Compatible I/O
High Density Packaging
• 64 Pin SIMM, No. 54
• 64 Pin ZIP, No. 57
• JEDEC Standard Pinout
• Common Data Inputs and Outputs
Single +5V (±10%) Supply Operation
Pin Names
Pin Configurations and Block Diagram
Pin Names
ZIP
SIMM
A0-A14
EØ-E3
W
Address Inputs
Chip Enable
Write Enable
Output Enable
Common Data Input/Output
Power(+5V±10%)
Ground
1
3
5
7
VSS
PD2
DQ8
DQ9
DQ10
DQ11
AØ
1
2
3
4
5
6
7
8
9
VSS
PD2
DQ8
DQ9
DQ10
DQ11
AØ
PD1
DQØ
DQ1
DQ2
DQ3
VCC
A7
2
4
6
PD1
DQØ
DQ1
DQ2
10 DQ3
12 VCC
14 A7
8
G
9
10
12
14
16
18
20
22
24
26
28
30
32
11
13
15
17
19
21
23
25
27
29
31
DQØ-DQ31
VCC
VSS
11
13
15
17
19
21
23
25
27
29
31
A1
A2
A1
A2
A8
A9
16 A8
18 A9
20 DQ4
22 DQ5
24 DQ6
26 DQ7
28
30 A14
32 EØ
DQ12
DQ13
DQ14
DQ15
VSS
NC
DQ4
DQ5
DQ6
DQ7
W
DQ12
DQ13
DQ14
DQ15
VSS
NC
NC
No Connection
AØ-A14
15
W
G
W
A14
EØ
E1
E1
DQØ-DQ7
8
8
8
8
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
E3
NC
G
DQ24
DQ25
DQ26
DQ27
A3
E2
NC
VSS
DQ16
DQ17
DQ18
DQ19
A10
A11
A12
A13
DQ20
DQ21
DQ22
DQ23
VSS
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
E3
NC
G
DQ24
DQ25
DQ26
DQ27
A3
34 E2
36 NC
EØ
38 VSS
40 DQ16
42 DQ17
44 DQ18
46 DQ19
48 A10
50 A11
52 A12
54 A13
56 DQ20
58 DQ21
60 DQ22
62 DQ23
64 VSS
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
E1
E2
E3
A4
A5
A4
A5
VCC
A6
DQ28
DQ29
DQ30
DQ31
VCC
A6
DQ28
DQ29
DQ30
DQ31
PD1=Open
PD2 = VSS
Electronic Designs Incorporated
• One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX 508-836-4850 •
Electronic Designs Europe Ltd. • Shelley House, The Avenue • Lightwater, Surrey GU18 5RF
United Kingdom • 01276 472637 • FAX: 01276 473748
http://www.electronic-designs.com
1
EDI8F3232CRev. 6 1/98 ECO#9601
Absolute Maximum Ratings*
Recommended DC Operating Conditions
Parameter
Supply Voltage
Supply Voltage
Input High Voltage VIH 2.2
Input Low Voltage VIL -0.3
Sym Min Typ Max Units
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient)
Commercial
Industrial
Storage Temperature
Plastic
-0.5V to 7.0V
VCC 4.5
VSS
5.0
0
5.5
0
V
V
V
V
0
0°C to +70°C
-40°C to +85°C
--
--
6.0
0.8
-55°C to +125°C
4 Watts
Power Dissipation
Output Current.
20 mA
AC Test Conditions
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Input Pulse Levels
VSS to 3.0V
5ns
1.5V
1TTL, CL =30pF
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
DC Electrical Characteristics
Parameter
Operating Power
Supply Current
Sym
ICC1
Conditions
W, E = VIL, II/O = 0mA,
Min Cycle
Min
--
--
--
--
Typ*
Max
Units
mA
mA
mA
mA
mA
12ns
15ns
20ns
25ns
640
600
560
520
225
Standby (TTL) Power
Supply Current
Full Standby Power
Supply Current
ICC2
ICC3
E ≥ VIH, VIN ≤ VIL
VIN ≥ VIH
E ≥ VCC-0.2V
VIN ≥ VCC-0.2V or
VIN ≤ 0.2V
--
--
80
mA
CMOS
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
ILI
ILO
VOH
VOL
VIN = 0V to VCC
V I/O = 0V to VCC
IOH =-4.0mA
--
--
2.4
--
--
--
--
--
±20
±20
µA
µA
V
--
IOL = 8.0mA
0.4
V
*Typical: TA = 25°C, VCC = 5.0V
Capacitance
Truth Table
(f=1.0MHz, VIN=VCC or VSS)
G
X
H
L
E
H
L
L
L
W
X
H
H
L
Mode
Standby
Output Deselect High Z
Output
High Z
Power
ICC2, ICC3
ICC1
ICC1
ICC1
Parameter
Parameter
Address LInes
Data Lines
Chip Enable Line
Control Lines
Sym
Sym
CI
CD/Q
CC
Max
Max
60
20
20
Unit
Unit
pF
pF
pF
pF
Read
Write
DOUT
DIN
X
CW
60
These parameters are sampled, not 100% tested.
EDI8F3232C
32Kx32 SRAM Module
2
EDI8F3232CRev. 6 1/98ECO#9601
EDI8F3232C
32Kx32 SRAM Module
AC Characteristics Read Cycle
Symbol
JEDEC Alt.
12ns
Min Max
15ns
Min Max
20ns
25ns
Parameter
Min
Max Min Max Units
Read Cycle Time
Address Access Time
TAVAV TRC
TAVQV TAA
TELQV TACS
TELQX TCLZ
TEHQZ TCHZ
TAVQX TOH
TGLQV TOE
12
12
12
5
15
15
15
5
20
25
ns
25 ns
25 ns
ns
13 ns
ns
12 ns
ns
10 ns
20
20
Chip Enable Access Time
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
5
0
3
5
0
3
0
3
5
6
5
0
3
9
8
8
11
10
10
Output Enable to Output in Low Z (1) TGLQX TOLZ
Output Disable to Output in High Z(1) TGHQZ TOHZ
0
0
0
0
0
0
0
0
Note 1: Parameter guaranteed, but not tested.
Read Cycle 1 - W High, G, E Low
TAVAV
ADDRESS 1
TAVQV
ADDRESS 2
TAVQX
A
DATA 1
DATA 2
Q
Read Cycle 2 - W High
TAVAV
A
E
TAVQV
TELQV
TELQX
TEHQZ
G
Q
TGLQV
TGLQX
TGHQZ
3
EDI8F3232CRev. 6 1/98 ECO#9601
AC Characteristics Write Cycle
Symbol
12ns
15ns
20ns
25ns
Parameter
Write Cycle Time
Chip Enable to End of Write
JEDEC Alt.
TAVAV TWC
TELWH TCW
TELEH TCW
TAVWL TAS
TAVEL TAS
TAVWH TAW
TAVEH TAW
TWLWH TWP
TWLEH TWP
TWHAX TWR
TEHAX TWR
TWHDX TDH
TEHDX TDH
TWLQZ TWHZ
TDVWH TDW
TDVEH TDW
Min Max
Min Max
Min Max Min Max Units
12
10
10
0
15
12
12
0
20
13
13
0
25
15
15
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Setup Time
Address Valid to End of Write
Write Pulse Width
0
0
0
0
10
10
10
10
0
0
0
0
12
12
11
11
0
0
0
0
13
13
12
12
0
15
15
15
15
0
Write Recovery Time
Data Hold Time
0
0
0
0
0
0
Write to Output in High Z (1)
Data to Write Time
0
7
7
0
3
0
8
8
0
3
0
3
0
5
9
9
0
10
10
0
Output Active from End of Write (1) TWHQX TWLZ
Note 1: Parameter guaranteed, but not tested.
Write Cycle 1 - W Controlled
TAVAV
A
E
TELWH
TAVWH
TWHAX
TWLWH
W
TAVWL
TWHDX
TWHQX
TDVWH
D
Q
DATA VALID
TWLQZ
HIGH Z
Write Cycle 2 - E Controlled
TAVAV
A
TAVEL
TELEH
TWLEH
E
TEHAX
TAVEH
W
TDVEH
TEHDX
DATA VALID
D
Q
HIGH Z
EDI8F3232C
32Kx32 SRAM Module
4
EDI8F3232CRev. 6 1/98ECO#9601
EDI8F3232C
32Kx32 SRAM Module
Ordering Information
Part Number
Speed
(ns)
12
Package
No.
54
EDI8F3232C12MMC
EDI8F3232C15MMC
EDI8F3232C20MMC
EDI8F3232C25MMC
EDI8F3232C12MZC
EDI8F3232C15MZC
EDI8F3232C20MZC
EDI8F3232C25MZC
15
54
20
54
25
54
12
57
15
57
20
57
25
57
Note: To order an Industrial grade product change the last C in the suffix to I,
eg. EDI8F3232C25MZC becomes EDI8F3232C25MZI.
Package Description
Package No. 54
64 Pin SIMM Module
0.125
Dia. Typ.
(2 Plcs.)
3.855
3.584
0.213
MAX
0.520
MAX
0.400
0.400
0.250
P1
P64
0.250
TYP
0.125
MIN
0.080
0.050
TYP
31 x 0.050
1.550 Ref.
0.62R
Package No. 57
64 Pin ZIP Module
3.660
3.640
0.225
MAX
0.050
0.530
MAX
0.050
0.008
0.014
0.130
0.120
0.022
0.018
0.250
TYP
0.050
Typ
0.100
Typ
0.100
Typ
0.165
0.135
5
EDI8F3232CRev. 6 1/98 ECO#9601
Electronic Designs Incorporated
• One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX 508-836-4850 •
Electronic Designs Europe Ltd. • Shelley House, The Avenue • Lightwater, Surrey GU18 5RF
United Kingdom • 01276 472637 • FAX: 01276 473748
http://www.electronic-designs.com
ElectronicDesignsInc.reservestherighttochangespecificationswithoutnotice. CAGENo.66301
6
EDI8F3232CRev. 6 1/98ECO#9601
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