EN27C01070PI [ETC]
EN27C010 1Megabit EPROM (128K x 8); EN27C010 1Megabit EPROM （ 128K ×8 ）
| 型号： | EN27C01070PI |
| 厂家： | 
ETC |
| 描述： | EN27C010 1Megabit EPROM (128K x 8) |
| 文件： | 总12页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EN27C010
EN27C010 1Megabit EPROM (128K x 8)
FEATURES
• Fast Read Access Time:
-45, -55, -70, and -90ns
• Latch-Up Immunity to 100mA
from -1V to VCC + 1V
• Single 5V Power Supply
• Two-Line Control (OE & CE )
• Standard Product Identification Code
• JEDEC Standard Pinout
• 32-pin PDIP
• Programming Voltage +12.75V
• QuikRiteTM Programming Algorithm
• Typical programming time 20µs
• Low Power CMOS Operation
• 1µA Standby (Typical)
• 32-pin PLCC
• 32-pin TSOP (Type 1)
• 30mA Operation (Max.)
• Commercial and Industrial Temperature
• CMOS- and TTL-Compatible I/O
• High-Reliability CMOS Technology
Ranges
GENERAL DESCRIPTION
The EN27C010 is a low-power 1-Megabit, 5V-only one-time-programmable (OTP) read-only
memory (EPROM). Organized into 128K words with 8 bits per word, it features QuikRiteTM single-
address location programming, typically at 20µs per byte. Any byte can be accessed in less than
45ns, eliminating the need for WAIT states in high-performance microprocessor systems. The
EN27C010 has separate Output Enable ( OE ) and Chip Enable ( CE) controls which eliminate
bus contention issues.
PDIP Top View
FIGURE 1. PDIP
Pin Name
Function
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
PGM
NC
A14
A13
A8
A9
A11
OE
A0-A16
Addresses
DQ0-DQ7
CE
Outputs
Chip Enable
Output Enable
Program Strobe
No Connect
OE
PGM
NC
9
10
11
12
13
14
15
16
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
1
EN27C010
FIGURE 2. TSOP
TSOP
A11
A9
A8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
A13
A14
NC
PGM
VCC
VPP
A16
A15
A12
A7
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
EN27C010
A6
A5
A4
A1
A2
A3
FIGURE 3. PLCC
PLCC Top View
A12 A16 VCC NC
A15 VPP PGM
4
2
32
30
A7
A6
A5
A4
A3
5
6
7
8
9
29 A14
28 A13
27 A8
3
1
31
26 A9
25 A11
24 OE
23 A10
22 CE
21 DQ7
A2 10
A1 11
A0 12
DQ0 13
15
17
19
14
16
18
20
DQ2 DQ3 DQ5
DQ1 VSS DQ4 DQ6
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
2
EN27C010
FIGURE 4. BLOCK DIAGRAM
CE
8
INPUT/
CONTROL
OUTPUT
LOGIC
PGM
OE
DQ0 - DQ7
BUFFERS
8
1024
Y-DECODER
X-DECODER
VPP
Y-SELECT
A0-A16
ADDRESS
INPUTS
1M BIT
CELL
MATRIX
1024
VCC
VSS
FUNCTIONAL DESCRIPTION
THE QUIKRITETM PROGRAMMING OF THE EN27C010
When the EN27C010 is delivered, the chip has all 1M bits in the “ONE”, or
HIGH state. “ZEROs” are loaded into the EN27C010 through the procedure of programming.
The programming mode is entered when 12.75 ± 0.25V is applied to the V pin, OE is at V ,
PP
IH
and CE and PGM are at V . For programming, the data to be programmed is applied with 8
IL
bits in parallel to the data pins.
TM
The QUIKRITE programming flowchart in Figure 5 shows Eon’s interactive programming
algorithm. The interactive algorithm reduces programming time by using 20 µs to 100 µs
programming pulses and giving each address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to a given address, the data in that
address is verified. If the data is not verified, additional pulses are given until it is verified or
until the maximum number of pulses is reached. This process is repeated while sequencing
through each address of the EN27C010. This part of the programming algorithm is done at
VCC = 6.25V to assure that each EPROM bit is programmed to a sufficiently high threshold
voltage. This ensures that all bits have sufficient margin. After the final address is completed,
the entire EPROM memory is read at V = V = 5.25 ± 0.25V to verify the entire memory.
CC
PP
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
3
EN27C010
PROGRAM INHIBIT MODE
Programming of multiple EN27C010 in parallel with different data is also easily accomplished
by using the Program Inhibit Mode. Except for CE, all like inputs of the parallel EN27C010
may be common. A TTL low-level program pulse applied to an EN27C010 CE input with
V
PP
= 12.75 ± 0.25V, PGM LOW, and OE HIGH will program that EN27C010. A high-level
CE input inhibits the other EN27C010 from being programmed.
PROGRAM VERIFY MODE
Verification should be performed on the programmed bits to determining that they were
correctly programmed. The verification should be performed with OE and CE at VIL, PGM at
VIH, and VPP at it programming voltage.
AUTO PRODUCT IDENTIFICATION
The Auto Product Identification mode allows the reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode is intended for use by programming equipment
for the purpose of automatically matching the device to be programmed with its corresponding
programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range
that is required when programming the EN27C010.
To activate this mode, the programming equipment must force 12.0 V ± 0.5V on address line A9
of the EN27C010. Two identifier bytes may then be sequenced from the device outputs by
toggling address line A0 from V to V , when A1 = V . All other address lines must be held at
IL
IH
IH
V during Auto Product Identification mode.
IL
Byte 0 (A0 = V ) represents the manufacturer code, and byte 1 (A0 = V ), the device code. For
IL
IH
the EN27C010, these two identifiers bytes are given in the Mode Select Table. All identifiers for
manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity
bit. When A1 = V , the EN27C010 will read out the binary code of 7F, continuation code, to
IL
signify the unavailability of manufacturer ID codes.
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
4
EN27C010
READ MODE
The EN27C010 has two control functions, both of which must be logically satisfied in order to
obtain data at the outputs. Chip Enable (CE) is the power control and should be used for
device selection. Output Enable (OE ) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that addresses are stable,
address access time (t ) is equal to the delay from CE to output (t ) . Data is available at
ACC CE
the outputs (t ) after the falling edge of OE , assuming the CE has been LOW and
OE
addresses have been stable for at least t
- t
.
ACC OE
STANDBY MODE
The EN27C010 has CMOS standby mode which reduces the maximum V current to 20µA.
CC
It is placed in CMOS standby when CE is at V ± 0.3 V. The EN27C010 also has a TTL-
CC
standby mode which reduces the maximum V current to 1.0 mA. It is placed in TTL-
CC
standby when CE is at V . When in standby mode, the outputs are in a high-impedance
IH
state, independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two-line control function is provided to allow
for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not occur.
It is recommended that CE be decoded and used as the primary device-selection function,
while OE be made a common connection to all devices in the array and connected to the READ
line from the system control bus. This assures that all deselected memory devices are in their
low-power standby mode and that the output pins are only active when data is desired from a
particular memory device.
SYSTEM CONSIDERATIONS
During the switch between active and standby conditions, transient current peaks are produced
on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks
is dependent on the output capacitance loading of the device. At a minimum, a 0.1µF ceramic
capacitor (high frequency, low inherent inductance) should be used on each device between
VCC and VSS to minimize transient effects. In addition, to overcome the voltage drop caused
by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7µF bulk
electrolytic capacitor should be used between VCC and VSS for each eight devices. The
location of the capacitor should be close to where the power supply is connected to the array.
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
5
EN27C010
MODE SELECT TABLE
Mode
CE
OE
VIL
PGM
A0
X
A1
X
A9
VPP
Output
DOUT
X (2)
X
X
X
X
X
X
X
Read
VIL
VIL
VIH
VCC
VCC
VCC
VCC
VPP
VPP
VPP
VCC
VCC
X
X
X
X
X
High Z
High Z
High Z
DIN
Output Disable
Standby (TTL)
Standby (CMOS)
Program (4)
VIH
X
X
X
X
X
X
V
CC ± 0.3V
X
X
VIL
VIL
VIH
VIL
VIL
VIH
VIL
X
VIL
VIH
X
X
X
DOUT
High Z
1C
Program Verify
Program Inhibit
Manufacturer Code (3)
Device Code (3)
X
X
X
VH(1)
VH(1)
VIL
VIL
VIL
VIH
VIH
VIH
X
01
NOTES:
1) VH = 12.0V ± 0.5V
2) X = Either VIH or VIL
3) For Manufacturer Code and Device Code, A1 = VIH
When A1 = VIL, both codes will read 7F
4) See DC Programming Characteristics for VPP voltage during programming
EON’S STANDARD PRODUCT IDENTIFICATION CODE
Hex
Data
Pins
A0
0
1
0
1
A1
1
1
0
0
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Code
0
0
0
0
0
0
1
1
0
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
0
0
1
1
0
1
1
1
1C
01
7F
7F
Manufacturer
Device Type
Continuation
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
6
EN27C010
FIGURE 5. QUIKRITETM PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V
VPP = 12.75V
X = 0
20
PROGRAM ONE µs PULSE
INTERACTIVE
SECTION
INCREMENT X
YES
X = 25?
NO
FAIL
NO
VERIFY BYTE?
PASS
FAIL
INCREMENT ADDRESS
LAST ADDRESS
YES
VCC = VPP = 5.25V
VERIFY
SECTION
FAIL
VERIFY ALL BYTES?
DEVICE FAILED
PASS
DEVICE PASSED
NOTE 1: Either 100µs or 20µs pulse.
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
7
EN27C010
ABSOLUTE MAXIMUM RATINGS
-65àC to +125àC
Storage Temperature
Ambient Temperature
with Power Applied
-40àC to +85àC
Voltage with Respect to VSS
All pins except A9, VPP, VCC
A9, VPP
VCC
-0.6V to VCC + 0.5V
-0.6V to +13.5V
-0.6V to +7.0V
OPERATING RANGES
Commercial (C)
Case Temperature(Tc)
0àC to +70àC
Industrial (I)
Case Temperature(Tc)
-40àC to +85àC
+4.50V to +5.5V
Supply READ Voltages
(Functionality is guaranteed between these limits)
Stresses above those shown above may cause permanent damage to the device. This is a stress rating only and
operation above these specifications for extended periods may affect device reliability. Operation outside the
"OPERATING RANGES" shown above voids any and all warranty provisions.
DC CHARACTERISTICS FOR READ OPERATION
Symbol Parameter
Min.
Max.
Unit
V
Conditions
IOH = -0.4mA
IOL = 2.1mA
VOH
VOL
Output High Voltage
2.4
Output Low Voltage
Input High Voltage
0.45
V
2.0
-0.3
-5
V
VIH
VIL
ILI
VCC +0.5
Input Low Voltage
0.8
5
V
Input Leakage Current
Output Leakage Current
VCC Power -Down Current
VCC Standby Current
VCC Active Current
VIN = 0 to 5.5V
µA
µA
µA
mA
mA
ILO
-10
10
VOUT = 0 to 5.5V
ICC3
ICC2
ICC1
10
1.0
30
CE = VCC ± 0.3V
CE = VIH
CE = VIL, f=5MHz,
IOUT = 0mA
IPP
VPP Supply Current Read
100
µA
CE = OE = VIL,
VPP = 5.5V
CAPACITANCE
Symbol Parameter
Typ.
8
8
Max.
Unit
pF
pF
Conditions
VIN = 0V
VOUT = 0V
VPP = 0V
CIN
Input Capacitance
12
12
25
COUT
CVPP
Output Capacitance
VPP Capacitance
18
pF
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
8
EN27C010
AC CHARACTERISTICS FOR READ OPERATION
EN27C010 / EN27C010L
-55 -70
Min Max Min Max Min Max Min
-45
-90
Symbol
Parameter
Condition
Max
Unit
45
45
25
20
55
55
25
20
70
70
30
25
90
ns
tACC (3)
Address to
Output Delay
CE = OE =
VIL
90
35
25
ns
ns
ns
ns
tCE (2)
tOE (2, 3)
tDF (4, 5)
tOH
CE to Output
Delay
OE = VIL
OE to Output
Delay
OE = VIL
OE or CE High to Output Float,
whichever occurred first
0
0
0
0
Output Hold from Address, CE
or OE , whichever occurred first
Note: Please contact Marketing Department for other speed requirements.
FIGURE 6. AC WAVEFORMS FOR READ OPERATION
ADDRESS
CE
ADDRESS VALID
tCE
tOE
OE
tDF
tOH
OUTPUT
tACC
HIGH Z
OUTPUT
VALID
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
9
EN27C010
FIGURE 7. OUTPUT TEST WAVEFORMS AND MEASUREMENTS
45 and 55 devices:
3.0V
AC
AC
Output Test Load
DRIVING
LEVELS
MEASUREMENT
LEVEL
1.5V
1.3V
0.0V
(1N914)
t , t < 5 ns (10% to 90%)
R F
3.3K
OUTPUT
70 and 90 devices:
PIN
CL
2.4V
2.0
0.8
AC
DRIVING
LEVELS
AC
MEASUREMENT
LEVEL
Note: CL = 100pF including
jig capacitance, except for the
-45 and -55 devices, where
CL = 30pF.
0.45V
t , t < 20 ns (10% to 90%)
R F
DC PROGRAMMING CHARACTERISTICS
Test
Limits
Symbol
Parameter
Conditions
Min.
Max
Units
ILI
Input Load Current
VIN = VIL, VIH
5.0
µA
V
VIL
Input Low Level
-0.5
0.8
VIH
Input High Level
0.7 VCC
VCC + 0.5
0.45
V
VOL
VOH
ICC2
Output Low Voltage
Output High Voltage
VCC Supply Current
IOL = 2.1 mA
V
2.4
V
I
OH = -400 µA
40
mA
IPP2
VID
VPP Supply Current
A9 Product Identification Voltage
CE = PGM = VIL,
10
12.5
mA
V
11.5
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
10
EN27C010
FIGURE 8. PROGRAMMING WAVEFORMS
READ
(VERIFY)
PROGRAM
VIH
VIL
ADDRESS
DATA
VCC
ADDRESS STABLE
tAS
tDS
tOE
tAH
VIH
VIL
DATA OUT
VALID
DATA IN
tDH
6.5V
5.0V
tDFP
tVCS
tVPS
13.0V
5.0V
VPP
tPRT
VIH
VIL
CE
tCES
VIH
VIL
PGM
OE
tPW
tOES
VIH
VIL
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
11
EN27C010
SWITCHING PROGRAMMING CHARACTERISTICS
(TΑ = + 25 ° C ± 5 ° C)
PARAMETER
SYMBOL
STANDARD
PARAMETER DESCRIPTION
Min.
Max
Units
Address Setup Time
2
µs
tAS
tOES
tDS
tAH
tDH
tDFP
tVPS
tPW
OE Setup Time
2
2
0
2
0
2
µs
µs
µs
µs
ns
Data Setup Time
Address Hold Time
Data Hold Time
Output Enable to Output Float Delay
130
105
VPP Setup Time
µs
µs
µs
µs
PGM Program Pulse Width
20
2
tVCS
Vcc Setup Time
tCES
2
CE
Setup Time
tOE
150
ns
OE
Data Valid from
ORDERING INFORMATION
EN27C010
45
P
I
TEMPERATURE RANGE
(Blank) = Commercial ( 0àC to +70àC)
I = Industrial ( -40àC to +85àC)
PACKAGE
P = 32 Plastic DIP
J = 32 Plastic PLCC
T = 32 Plastic TSOP
SPEED
45 = 45ns
55 = 55ns
70 = 70ns
90 = 90ns
BASE PART NUMBER
EN = EON Silicon Devices
27 = EPROM
C = CMOS
010 = 128K x 8
4800 Great America Parkway Ste 202
Santa Clara, CA. 95054
Tel: 408-235-8680
Fax: 408-235-8685
12
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