ES3207 [ETC]
Video CD/DVD Companion Chip; 视频CD / DVD配套芯片![ES3207](http://pdffile.icpdf.com/pdf2/p00202/img/icpdf/ES3207_1143072_icpdf.jpg)
型号: | ES3207 |
厂家: | ![]() |
描述: | Video CD/DVD Companion Chip |
文件: | 总4页 (文件大小:77K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
![](http://public.icpdf.com/style/img/ads.jpg)
ES3207
Video CD/DVD Companion Chip
Product Brief
DESCRIPTION
FEATURES
The ES3207 Video CD/DVD Companion Chip provides an
optimal system design for a Video CD player or a DVD
player.
• Multi-standard TV encoder:
– CCIR601 non-square operation
– NTSC/PAL formats
The ES3207, which is an enhanced version of the pin-
compatible ES3205, integrates most of the required
analog discrete components into a simple, cost-effective
solution and interfaces directly to the ES3210 (Video CD)
or ES3308 (DVD). No glue logic or external microcontroller
is required.
– Master video mode
– 8-bit interface for YCrCb (4:2:2) input format
– Simultaneous composite and S-video output
– Interlaced operation
• Audio DACs:
The ES3207 features include a high-quality NTSC/PAL
Digital Video Encoder (DVE), echo, echo reverb,
3DSound, surround sound, video and audio DACs, and a
PLL clock synthesizer. There are three 9-bit video DACs
(one for composite video output and two for S-video
outputs) and two 16-bit sigma-delta audio DACs for
interfacing with current sound systems.
– Two 16-bit sigma-delta DACs
– Accepts I2S format data
– Programmable functions
• 3DSound and surround sound
• Remote control interface for power on/off
• Digitally controlled echo with up to 168 ms delay
• Vocal reverb for theater acoustical effects
• Dual microphone input
The DVE generates composite and S-video analog
signals. Color Space Conversions (CSC) are provided to
match the input data to the required output format, then
the data is filtered to meet the selected video standards. In
addition, the ES3207 is equipped with a remote control
interface for power on/off, microphone ports, auxiliary
ports, and an interface for accessing internal registers.
• Clock synthesizer (PLL):
– Based on 27 MHz crystal input
– Generates required clocks for video encoder, audio
DAC, echo and surround sound, and video
processor
Figure 1 shows a block diagram of a typical stand-alone
system using the ES3210 Video CD Processor Chip or the
ES3308 MPEG2 Audio/Video Decoder Chip and an
ES3207 Video CD Companion Chip.
• Device Serial Communication (DSC) port for command
issued/register access
• Power management
• 100-Pin PQFP
• Single 5 V power supply
ES3207
Remote
Receiver
ES3210
Audio DAC
Speakers
Television
DSC
PLL
CD-ROM
(Video CD)
or
ES3308
(DVD)
or
NTSC/PAL Video
DVD-ROM
Drive
3D/Echo/Surround
ROM
Preamp
Mic 1
Mic 2
Volume Control
VFD
Driver
VFD
Panel
Preamp
Volume Control
DRAM
Figure 1 ES3207 Video CD Companion Chip System Block Diagram
ESS Technology, Inc.
SAM0076-051701
1
ES3207 VIDEO CD CC PRODUCT BRIEF
PINOUT
PINOUT
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
DSC_D7
81
50
VSSA
HSYNC#
DSC_D6
VSYNC#
DSC_D5
YUV7
MIC1
MIC2
AOL
AOR
VCCA
VCCA
VREFP
VREFM
VSSA
AUX15
AUX14
AUX13
RBCK / SER_IN
AUX12
AUX11
AUX10
RSD / SEL_PLL0
VCC
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
YUV6
YUV5
YUV4
VCC
VSS
YUV3
ES3207
DSC_D4
YUV2
DSC_D3
YUV1
DSC_D2
YUV0
DSC_D1
VSS
100
VSS
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
PIN DESCRIPTION
Name
Number
I/O Definition
VSS
1:2,25:26,29:31,72,75,
77,91,100
I
Ground.
VCC
3:5,16,32,66,73,78,90
6
I
I
Voltage supply, 5 V.
DSC_C
AUX[15:0]
Clock for programming to access internal registers.
40:38,36:34,20,18,14, I/O Auxiliary control pins.
67:70,11,9,7
DSC_D[7:0]
DSC_S
DCLK
81,83,85,93,95,97,99,8 I/O Data for programming to access internal registers.
10
I
O
I
Strobe for programming to access internal registers.
Dual-purpose pin. DCLK is the MPEG decoder clock.
12
EXT_CLK
RST#
EXT_CLK is the external clock. EXT_CLK is an input during bypass PLL mode.
Video reset (active-low).
13
15
17
I
MUTE
O
I
Audio mute.
MCLK
Audio master clock.
TWS
I
Dual-purpose pin. TWS is the transmit audio frame sync.
SPLL_OUT is the select PLL output.
19
SPLL_OUT
O
2
SAM0076-051701
ESS Technology, Inc.
ES3207 VIDEO CD CC PRODUCT BRIEF
PIN DESCRIPTION
Name
TSD
Number
I/O Definition
21
22
23
I
I
Transmit audio data input.
TBCK
RWS
Transmit audio bit clock.
O
I
Dual-purpose pin. RWS is the receive audio frame sync.
Pins SEL_PLL[1:0] select the PLL clock frequency for the DCLK output.
SEL_PLL1
SEL_PLL1
SEL_PLL0 DCLK
0
0
1
1
0
1
0
1
Bypass PLL (input mode)
27 MHz (output mode)
32.4 MHz (output mode)
40.5 MHz (output mode)
RSTOUT#
NC
24
O
Reset output (active-low).
27:28,65:76
No connect. Do not connect to these pins.
RSD
O
I
Dual-purpose pin. RSD is the receive audio data input.
33
37
SEL_PLL0 along with SEL_PLL1 select the PLL clock frequency for the DCLK out-
put. See the table for pin number 23.
SEL_PLL0
RBCK
O
I
Dual-purpose pin. RBCK is the receive audio bit clock.
SER_IN is the serial input DSC mode.
0 = Parallel DSC mode.
SER_IN
1 = Serial DSC mode.
VSSA
VREFM
VREFP
VCCA
AOR
41,50:51,56:57,62:63
I
I
Analog ground.
42
DAC and ADC minimum reference. Bypass to VCMR with 10 µF in parallel with 0.1 µF.
43
I
DAC and ADC maximum reference. Bypass to VCMR with 10 µF in parallel with 0.1 µF.
44:45,59:60
I
Analog VCC, 5 V.
46
47
48
49
52
O
O
I
Right channel output.
Left channel output.
Microphone input 2.
Microphone input 1.
AOL
MIC2
MIC1
I
VREF
I
Internal resistor divider generates Common Mode Reference (CMR) voltage.
Bypass to analog ground with 0.1 µF.
VCM
53
I
ADC Common Mode Reference (CMR) buffer output. CMR is approximately 2.25 V.
Bypass to analog ground with 47 µF electrolytic in parallel with 0.1 µF.
RSET
54
I
Full scale DAC current adjustment.
Compensation pin.
COMP
CDAC
YDAC
55
I
58
O
O
O
O
I
Modulated chrominance output.
Y luminance data bus for screen video port.
Composite video output.
61
VDAC
64
XOUT
71
Crystal output.
XIN
74
27 MHz crystal input.
PCLK
79
I/O 13.5 MHz pixel clock.
PCLK2X
HSYNC#
VSYNC#
YUV[7:0]
80
I/O 27 MHz (2 times pixel clock).
82
84
O
O
I
Horizontal sync (active-low).
Vertical sync (active-low).
86:89,92,94,96,98
YUV data bus for screen video port.
ESS Technology, Inc.
SAM0076-051701
3
ES3207 VIDEO CD CC PRODUCT BRIEF
MECHANICAL DIMENSIONS
MECHANICAL DIMENSIONS
D
D1
A2
A1
ES3207
100-Pin PQFP
E
E1
e
e1
L
b
L1
1
Millimeters
Nom
23.90
20.00
17.90
14.00
0.25
2.71
0.30
0.65
-
Symbol
Description
Min
23.65
19.90
17.65
13.90
0.10
2.57
0.20
-
Max
24.15
20.10
18.15
14.10
0.36
2.87
0.40
-
D
D1
E
Lead to lead, X-axis
Package’s outside, X-axis
Lead to lead, Y-axis
Package’s outside, Y-axis
Board standoff
Package thickness
Lead width
E1
A1
A2
b
e
Lead pitch
e1
L
Lead gap
0.24
0.65
1.88
0°
-
Foot length
0.80
1.95
-
0.95
2.02
7°
L1
-
Lead length
Foot angle
-
Coplanarity
-
-
0.102
-
-
Leads in X-axis
Leads in Y-axis
Total leads
-
30
-
-
20
-
-
-
100
-
-
Package type
-
PQFP
-
No part of this publication may be reproduced, stored in a
retrieval system, transmitted, or translated in any form or
by any means, electronic, mechanical, manual, optical, or
otherwise, without the prior written permission of ESS
Technology, Inc.
(P) U.S. Patent 4,214,125 and others, other patents
pending.
VideoDrive® is a registered trademark of ESS Technology,
Inc.
MPEG is the Moving Picture Experts Group of the ISO/IEC.
ESS Technology, Inc. makes no representations or
warranties regarding the content of this document.
All other trademarks are owned by their respective
holders and are used for identification purposes only.
All specifications are subject to change without prior
notice.
ESS Technology, Inc. assumes no responsibility for any
errors contained herein.
4
© 1997 ESS Technology, Inc. All rights reserved.
SAM0076-051701
相关型号:
©2020 ICPDF网 联系我们和版权申明