概述
数据手册F1E21 概述
BLUETOOTH V2.0 + EDR CLASS 2 MODULE 蓝牙V2.0 + EDR第2级模块
F1E21 数据手册
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Databook
Confidential / Preliminary Documentation
Revision 1.0
C
Copyright○ 2006 F1BT Corp.
List of Contents
1 General
1.1 Overview
1.2 Features
1.3 Application
1.4 Pinout Diagram & Outline Size
1.5 Device Terminal Descriptions
1.6 Package Dimensions
2 Characteristics
2.1
2.2
Electrical Characteristics
Radio Characteristics
3 Terminal Description
3.1
UART
3.1.1 UART Setting
3.1.2 UART Bypass Mode
USB
3.2
3.3
3.4
I²C
Audio PCM interface
3.4.1 PCM Configuration
4 Boot Interface configures
5 Application Schematic
6 Revision History
1. General
1.1 overview
This specification covers Bluetooth module (class-2) which complies with Bluetooth specification version 2.0
+ EDR and integrates RF & Baseband controller in small package. This Module has deployed CSR’s BC04-
External chipset.
All detailed specification including pinouts and electrical specification may be changed without notice.
1.2 Features
• Fully Qualified Bluetooth v2.0 + EDR
• Enhanced Data Rate (EDR) compliant with v2.0.E.2 of specification for both 2Mbps and 3Mbps modulation modes
• Full-speed Bluetooth Operation with Full Piconet Support
• Scatternet Support
• Low Power Consumption
• Support for 802.11 Co-existence
• RoHS Compliant
• USB and Dual UART Ports
• Competitive Size (11mm x 11mm x 1.56mm : QFN 36Pin)
1.3 Application
▪ Notebook PC, Desktop PC
▪ PDA
▪ Cordless headset
▪ Digital camera & printer
▪ GPS,POS, Barcode Reader
▪ Domestic and industrial applications
▪ Access Point
▪ Serial Adapter
1.4 Pinout Diagram & Outline Size
1.5 Device Terminal Functions
PIN
Name
Description
PCM OUT
PCM IN
12
21
16
22
Synchronous data output
Synchronous data input
Synchronous data clock
Synchronous data sync
PCM
PCM CLK
PCM SYNC
TXD
RXD
CTS
RTS
13
17
20
14
UART data output, active low
UART data input, active low (idle status high)
UART
USB
USB -
19
18
USB -
USB +
USB + with selectable internal 1.5k pull-up resistor
PIO0
PIO1
PIO2
PIO3
PIO4
PIO5
PIO6
PIO7
PIO8
PIO9
PIO10
PIO11
AIO0
AIO1
35
34
6
9
24
30
23
15
33
32
1
Programmable input/output line
PIO 4,5,6,7 Can be used UART bypass mode
PIO 6,7,8 Can be used to form I2C interface
PIO & AIO
2
8
7
SPI MOSI
SPI CLK
SPI MISO
SPI CSB
25
27
29
26
Serial Peripheral Interface data input
Serial Peripheral Interface clock
SPI
Serial Peripheral Interface data output
Chip Select for Synchronous SPI active low
ANT
GND
3V
4
RF Connection to Antenna
Ground
3,5,11,31,36
10
28
Main supply input voltage.
Reset if low. Input debounced so must be low for >5ms to
cause a reset
Other Pins
RESETB
1.6 Module Dimension
2. Characteristics
2.1 Electrical Characteristics
Absolute Maximum Ratings
Rating
Minimum
-40°C
Maximun
85°C
Storage temperature
Supply voltage : VCC
Other terminal voltages
-0.4V
3.7V
VSS-0.4V
VCC+0.4V
Recommended Operating Conditions
Operating Condition
Minimum
-30°C
Maximun
70°C
Operating temperature range
Supply voltage : VCC
1.7V
3.6V
2.2 RF Characteristics
Transmitter
Specification
Condition
Min
Typ
Max
Unit
Output transmit power
Transmit power density
Normal
Normal
Normal
Normal
Normal
-6
1
4
4
dBm
dBm
dBm
MHz
KHz
Transmit power control
2
8
Frequency Range
2400
2483.5
1000
20dB bandwidth for modulated carrier
850
±2MHz
±3MHz
±4MHz
-20
-40
-40
Adjacent channel transmit power
dBm
f1avg
f2max
140
115
175
KHz
KHz
%
Modulation Characteristics
Initial carrier frequency tolerance
Carrier frequency Drift
f2avg / f1avg
80
20
Normal
-20
KHz
KHz
One slot packet(DH1)
Three slot packet(DH3)
Five slot packet(DH5)
-25
-40
-40
25
40
40
Transceiver
Specification
Condition
Min
Typ
Max
Unit
30MHz ~ 1GHz
1GHz ~12.75GHz
1.8GHz ~5.1GHz
5.1GHz ~5.3GHz
-36
-30
-47
-47
Adjacent channel transmit power
dBm
Receiver
Specification
Condition
Min
Typ
Max
Unit
Sensitivity level (0.1% BER)
Transmit power density
Single slot packets
Multi slot packet
-70
-70
-80
-80
dBm
dBm
co-channel
11
0
1MHz (Adjacent channel)
2MHz (2nd Adjacent channel)
3MHz (3rd Adjacent channel)
C/I performance
dB
-30
-40
30MHz ~ 2000MHz
2000MHz ~ 2400MHz
2500MHz ~ 3000MHz
3000MHz ~ 12.75GHz
-10
-27
-27
-10
Blocking performance
dBm
dBm
dBm
Intermodulation performance
Maximum input level
n=5
-39
-20
-10
3. Terminal Description
3.1 UART
Four signals are used to implement the UART function.
UART_TXD and UART_RXD transfer data between the two devices.
3.1.1 UART Setting
User can change data format the following selection using PSKEY.
However, host shall communicate with default setting UART connection initiated at first time.
Baud Rate = (PSKEY_UART_BAUD_RATE) / 0.004096
Parameter
Baud Rate
Possible value
9600 ~ 3M Baud
None
Flow Control
Parity
None, Odd or Even
1 or 2
Number of Stop Bits
Bits per channel
8
3.1.2 UART Bypass Mode
In order to apply the UART bypass mode, a BCCMD command will be issued to F1E21 upon this , it will
switch the bypass to PIO4,5,6,7 as shown in figure. When the bypass mode has been invoked, module
enters the deep sleep state indefinitely
3.2 USB
BlueCore4 - External devices contain a full speed (12Mbits/s) USB interface that is capable of driving a USB
cable directly. No external USB transceiver is required. The device operates as a USB peripheral,
responding to requests from a master host controller such as a PC. Both the OHCI and the UHCI standards
are supported. The set of USB endpoints implemented can behave as specified in the USB section of the
Bluetooth specification v1.2 or alternatively can appear as a set of endpoints appropriate to USB audio
devices such as speakers.
As USB is a Master/slave oriented system (in common with other USB peripherals), BlueCore3-Multimedia
External only supports USB slave operation.
3.3 I²C
PIO[8:6] can be used to form an interface. The interface is driven by “bit banging” these PIO pins using
software. Therefore it is suited only to relatively slow functions such as driving a dot matrix liquid crystal
display (LCD).
Note. PIO[7:6] dual functions, UART bypass and EEPROM support, therefore devices using an EEPROM
connect support UART bypass mode. PIO Lines need to be pulled-up through 2.2K
3.4 PCM
Pulse Code Modulation (PCM) is a standard method used to digitize audio (particularly voice) patterns for
transmission over digital communication channels. Through its PCM interface, this module has hardware
support for continual transmission and reception of PCM data, so reducing processor overhead for wireless
headset applications. This module offers a bi-directional digital audio interface that route directly into the
baseband lauer of the on-chip firmware. It dose not pass through the HCI protocol layer.
Hardware allows the data to be sent to and received from a SCO connection. This module interfaces directly
to PCM audio devices including the following:
- Qualcomm MSM 3000 series and MSM 5000 series CDMA baseband devices
- OKI MSM7705 for channel A-law and u-law CODEC
- Motorola MC145481 8-bit A-law and u-law CODEC
- Motorola MC145483 13-bit linear CODEC
- STW 5093 and 5094 14-bit linear CODECs
3.4.1 PCM Configuration
The PCM configuration is set using two PS keys, PSKEY_PCM_CONFIG32 and
PSKEY_PCM_LOW_JITTER_CONFIG. The default for long frame sync and interface master generating
256KHz PCM_CLK with no tri-state of PCM_OUT.
Parameter
Possible value
Slave, Master
Mode
Master Mode : 128, 256, 512KHz
Slave Mode : up to 2048KHz
Clock rate
Sync formats
Data formats
Long frame sync, Short frame sync
13 or 16bit linear, 8-bit A-law to u-law
4. Revision History
Revision
Date
Change Descriptions
Issued by
Rev 1.0
2006-12-21
Initial release
Narsen
5. Application Schematic
R1
100K
VCC
U1
*Microstrip Line Recommend
1
2
3
4
5
6
7
8
9
27
26
25
24
23
22
21
20
19
4Layer 0.8T PCB : Trance width = 0.34mm (1~2Layer Copper thickness = 0.2mm)
2Layer 0.8T PCB : Trance width = 1.45mm
TP
TP
TP
PIO[10]
PIO[11]
GND
SPI_CLK
SPI_CSB
SPI_MOSI
PIO[4]
ANT
L2
0 ohm
1
RF
ANT
GND
PIO[6]
C9
NC
C6
NC
PIO[2]
AIO[1]
AIO[0]
PIO[3]
PCM_SYNC
PCM_IN
UART_CTS
UART_CTS
USB_DN
VCC
F1E21_REV_A1
C1
0.1uF
C2
3u3/16V
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