FSTU6800A_技术文档

July 1998

FSB560 / FSB560A

C

E

B

SuperSOT^TM-3 (SOT-23)

NPN Low Saturation Transistor

These devices are designed with high current gain and low saturation voltage with collector currents up to 2A

continuous.

Absolute Maximum Ratings*

T_{A = 25°C unless otherwise noted}

FSB560/FSB560A

Symbol

Parameter

Units

Collector-Emitter Voltage

60

V

V_CEO

Collector-Base Voltage

Emitter-Base Voltage

80

5

V

V_CBO

V_EBO

Collector Current - Continuous

2

A

I_C

Operating and Storage Junction Temperature Range

-55 to +150

°C

T_J,T_stg

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:

1) These ratings are based on a maximum junction temperature of 150°C.

2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

Thermal Characteristics

T_{A = 25°C unless otherwise noted}

Max

Characteristic

Symbol

Units

FSB560/FSB560A

Total Device Dissipation

Thermal Resistance, Junction to Ambient

500

mW

P_D

250

°C/W

R_qJA

ã 1998 Fairchild Semiconductor Corporation

fsb560.lwpPrNA 7/1098 RevB

NPN Low Saturation Transistor

(continued)

Electrical Characteristics

T_{A = 25°C unless otherwise noted}

Symbol

Parameter

Test Conditions

Min

Max

Units

OFF CHARACTERISTICS

Collector-Emitter Breakdown Voltage

Collector-Base Breakdown Voltage

Emitter-Base Breakdown Voltage

Collector Cutoff Current

60

80

5

V

BV_CEO

BV_CBO

BV_EBO

I_CBO

I_C= 10 mA

I_C= 100 mA

I_E= 100 mA

100

10

nA

uA

V_CB= 30 V

V_CB= 30 V, T_A=100°C

Emitter Cutoff Current

100

nA

I_EBO

V_EB= 4V

ON CHARACTERISTICS*

DC Current Gain

h_FE

70

100

250

80

-

I_C= 100 mA, V_CE= 2 V

I_C=500mA, V_CE=2V FSB560

FSB560A

300

550

I_C= 1 A, V_CE= 2 V

I_C= 2 A, V_CE= 2 V

40

Collector-Emitter Saturation Voltage

300

350

300

1.25

mV

V_CE(sat)

I_C= 1 A, I_B= 100 mA

I_C= 2 A, I_B=200 mA FSB560

FSB560A

Base-Emitter Saturation Voltage

Base-Emitter On Voltage

V

V_BE(sat)

V_BE(on)

I_C= 1 A, I_B= 100 mA

I_C= 1 A, V_CE= 2 V

1

SMALL SIGNAL CHARACTERISTICS

Output Capacitance

C_obo

30

pF

-

V

_CB= 10 V, I_E= 0, f = 1MHz

Transition Frequency

f_T

75

I_C= 100 mA,V_CE= 5 V, f=100MHz

*Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%

ã 1998 Fairchild Semiconductor Corporation

fsb560.lwpPrNA 7/1098 RevB

Typical Characteristics

Base-Emitter Saturation

Voltage vs Collector Current

Base-Emitter On Voltage vs.

Collector Current

1.4

1.2

1

β = 10

V_ce= 2.0V

1.2

1

- 40 °C

0.8

0.6

0.4

25 °C

0.6

25 °C

0.4

125 °C

0.2

0.001

0.01

0.1

1

10

0.0001

0.001

0.01

0.1

1

10

I _C- COLLECTOR CURRENT (A)

Collector-Emitter Saturation

Voltage vs Collector Current

Input/Output Capacitance vs.

Reverse Bias Voltage

450

400

350

300

250

200

150

100

50

0.8

0.6

0.4

0.2

0

f

= 1.0 MHz

β = 10

C_ibo

25°C

125°C

- 40°C

C_obo

0

0.1 0.2

0.5

1

2

5

10 20

50 100

0.001

0.01

0.1

1

10

V_CE- COLLECTOR VOLTAGE (V)

I_C- COLLECTOR CURRENT (mA)

Current Gain vs. Collector Current

700

V_ce= 2.0V

600

500

400

300

200

100

0

125°C

25°C

- 40°C

0

0.5

1

1.5

2

2.5

3

3.5

I _C- COLLECTOR CURRENT (mA)

NA

SuperSOT^TM-3 Tape and Reel Data and Package Dimensions

SSOT-3 Packaging

Configuration: Figure 1.0

Packaging Description:

SSOT-3 parts are shipped in tape. The carrier tape is

Customize Label

made from dissipative (carbon filled) polycarbonate

a

resin. The cover tape is a multilayer film (Heat Activated

Adhesive in nature) primarily composed of polyester film,

adhesive layer, sealant, and anti-static sprayed agent.

These reeled parts in standard option are shipped with

3,000 units per 7" or 177cm diameter reel. The reels are

dark blue in color and is made of polystyrene plastic (anti-

static coated). Other option comes in 10,000 units per 13"

or 330cm diameter reel. This and some other options are

described in the Packaging Information table.

Antistatic Cover Tape

These full reels are individually labeled and placed inside

a

standard intermediate made of recyclable corrugated

brown paper with a Fairchild logo printing. One pizza box

contains eight reels maximum. And these intermediate

boxes are placed inside

a labeled shipping box which

comes in different sizes depending on the number of parts

shipped.

Human Readable

Label

Embossed

Carrier Tape

3P

SSOT-3 Std Packaging Information

Standard

(no flow code)

Packaging Option

D87Z

Packaging type

TNR

10,000

13"

SSOT-3 Std Unit Orientation

Qty per Reel/Tube/Bag

Reel Size

3,000

7" Dia

Box Dimension (mm)

Max qty per Box

187x107x183 343x343x64

343mm x 342mm x 64mm

Intermediate box for D87Z Option

Human Readable Label

24,000

0.0097

0.1230

30,000

0.0097

0.4150

Weight per unit (gm)

Weight per Reel (kg)

Note/Comments

Human Readable Label sample

Human Readable

Label

187mm x 107mm x 183mm

SSOT-3 Tape Leader and Trailer

Intermediate Box for Standard Option

Configuration: Figure 2.0

Carrier Tape

Cover Tape

Components

Trailer Tape

Leader Tape

300mm minimum or

75 empty pockets

500mm minimum or

125 empty pockets

August 1999, Rev. C

SuperSOT^TM-3 Tape and Reel Data and Package Dimensions, continued

SSOT-3 Embossed Carrier Tape

Configuration: Figure 3.0

P0

P2

D0

D1

T

E1

E2

W

F

Wc

B0

Tc

K0

A0

P1

User Direction of Feed

Dimensions are in millimeter

E1 E2

A0

B0

W

D0

D1

F

P1

P0

K0

T

Wc

Tc

Pkg type

SSOT-3

(8mm)

3.15

+/-0.10

2.77

+/-0.10

8.0

+/-0.3

1.55

+/-0.05

1.125

+/-0.125

1.75

+/-0.10

6.25

min

3.50

+/-0.05

4.0

+/-0.1

4.0

+/-0.1

1.30

+/-0.10

0.228

+/-0.013

5.2

+/-0.3

0.06

+/-02

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

0.5mm

maximum

20 deg maximum

Typical

component

cavity

center line

0.5mm

maximum

B0

20 deg maximum component rotation

Typical

component

center line

Sketch A (Side or Front Sectional View)

Component Rotation

Sketch C (Top View)

Component lateral movement

A0

Sketch B (Top View)

Component Rotation

SSOT-3 Reel Configuration: Figure 4.0

W1 Measured at Hub

Dim A

Max

Dim A

max

See detail AA

Dim N

7"Diameter Option

B Min

Dim C

See detail AA

Dim D

min

W3

13" Diameter Option

W2 max Measured at Hub

DETAIL AA

Dim W2

Dimensions are in inches and millimeters

Reel

Option

Tape Size

8mm

Dim A

Dim B

Dim C

Dim D

Dim N

Dim W1

Dim W3 (LSL-USL)

7.00

177.8

0.059

1.5

512 +0.020/-0.008

13 +0.5/-0.2

0.795

20.2

2.165

55

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.311 – 0.429

7.9 – 10.9

7" Dia

13.00

330

0.059

1.5

512 +0.020/-0.008

13 +0.5/-0.2

0.795

20.2

4.00

100

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.311 – 0.429

7.9 – 10.9

8mm

13" Dia

July 1999, Rev. C

SuperSOT^TM-3 Tape and Reel Data and Package Dimensions, continued

SuperSOT -3 (FS PKG Code 32)

1 : 1

Scale 1:1 on letter size paper

Dimensions shown below are in:

inches [millimeters]

Part Weight per unit (gram): 0.0097

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

CoolFET™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench™

QS™

UHC™

VCX™

CROSSVOLT™

E²CMOS^TM

FACT™

FACT Quiet Series™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

TinyLogic™

FAST^®

FASTr™

GTO™

HiSeC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Discrete Power & Signal

Technologies

July 1998

FSB619

C

E

B

SuperSOT^TM-3 (SOT-23)

NPN Low Saturation Transistor

These devices are designed with high current gain and low saturation voltage with collector currents up to 3A

continuous.

Absolute Maximum Ratings*

T_{A = 25°C unless otherwise noted}

FSB619

Symbol

V_CEO

V_CBO

V_EBO

I_C

Parameter

Units

Collector-Emitter Voltage

50

V

Collector-Base Voltage

Emitter-Base Voltage

50

V

5

Collector Current - Continuous

2

A

Operating and Storage Junction Temperature Range

-55 to +150

°C

T_J,T_stg

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:

1) These ratings are based on a maximum junction temperature of 150°C.

2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

Thermal Characteristics

T_{A = 25°C unless otherwise noted}

Max

Characteristic

Symbol

Units

FSB619

Total Device Dissipation*

Derate above 25°C

500

4

mW

mW/°C

P_D

Thermal Resistance, Junction to Ambient

250

°C/W

R_qJA

ã

1998 Fairchild Semiconductor Corporation

Page 1 of 2

*Device mounted on FR-4 PCB 4.5” X 5”; mounting pad 0.02 in²of 2oz copper.

NPN Low Saturation Transistor

(continued)

Electrical Characteristics

T_{A = 25°C unless otherwise noted}

Symbol

Parameter

Test Conditions

Min

Max

Units

OFF CHARACTERISTICS

Collector-Emitter Breakdown Voltage

50

5

V

BV_CEO

BV_CBO

BV_EBO

I_CBO

I_C= 10 mA

Collector-Base Breakdown Voltage

Emitter-Base Breakdown Voltage

Collector Cutoff Current

I_C= 100 mA

I_E= 100 mA

V_CB= 40 V

V_EB= 4V

100

nA

Emitter Cutoff Current

I_EBO

Collector Emitter Cutoff Current

I_CES

V_CES= 40 V

ON CHARACTERISTICS*

DC Current Gain

h_FE

200

300

200

100

-

I_C= 10 mA, V_CE= 2V

I_C= 200 mA, V_CE= 2V

I_C= 1A, V_CE= 2V

I_C= 2A, V_CE= 2V

Collector-Emitter Saturation Voltage

20

mV

V_CE(sat)

I_C= 100 mA, I_B= 10 mA

I_C= 1 A, I_B= 10 mA

I_C= 2 A, I_B= 50 mA

235

320

Base-Emitter Saturation Voltage

Base-Emitter On Voltage

1

V

V_BE(sat)

V_BE(on)

I_C= 2 A, I_B= 50 mA

I_C= 2 A, V_CE= 2 V

SMALL SIGNAL CHARACTERISTICS

Output Capacitance

C_obo

30

pF

-

V_CB= 10 V, I_E= 0, f = 1MHz

Transition Frequency

f_T

100

I_C= 50 mA,V_CE= 10 V, f=100MHz

*Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%

Page 2 of 2

fsb619.lwpPrNA 7/10/98 revC

July 1998

FSB660 / FSB660A

C

E

B

SuperSOT^TM-3 (SOT-23)

PNP Low Saturation Transistor

These devices are designed with high current gain and low saturation voltage with collector currents up to 2A

continuous.

Absolute Maximum Ratings*

T_{A = 25°C unless otherwise noted}

FSB660/FSB660A

Symbol

Parameter

Units

Collector-Emitter Voltage

60

V

V_CEO

Collector-Base Voltage

Emitter-Base Voltage

80

5

V

V_CBO

V_EBO

Collector Current - Continuous

2

A

I_C

Operating and Storage Junction Temperature Range

-55 to +150

°C

T_J,T_stg

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:

1) These ratings are based on a maximum junction temperature of 150°C.

2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

Thermal Characteristics

T_{A = 25°C unless otherwise noted}

Max

Characteristic

Symbol

Units

FSB660/FSB660A

Total Device Dissipation

Thermal Resistance, Junction to Ambient

500

mW

P_D

250

°C/W

R_qJA

ã

1998 Fairchild Semiconductor Corporation

fsb660.lwpPrPA 7/10/98 RevB

PNP Low Saturation Transistor

(continued)

Electrical Characteristics

T_{A = 25°C unless otherwise noted}

Symbol

Parameter

Test Conditions

Min

Max

Units

OFF CHARACTERISTICS

Collector-Emitter Breakdown Voltage

Collector-Base Breakdown Voltage

Emitter-Base Breakdown Voltage

Collector Cutoff Current

60

80

5

V

BV_CEO

BV_CBO

BV_EBO

I_CBO

I_C= 10 mA

I_C= 100 mA

I_E= 100 mA

100

10

nA

uA

V_CB= 30 V

V_CB= 30 V, T_A=100°C

Emitter Cutoff Current

100

nA

I_EBO

V_EB= 4V

ON CHARACTERISTICS*

DC Current Gain

h_FE

70

100

250

80

-

I_C= 100 mA, V_CE= 2 V

I_C=500mA, V_CE=2V FSB660

FSB660A

300

550

I_C= 1 A, V_CE= 2 V

I_C= 2 A, V_CE= 2 V

40

Collector-Emitter Saturation Voltage

300

350

300

1.25

mV

V_CE(sat)

I_C= 1 A, I_B= 100 mA

I_C= 2 A, I_B=200 mA FSB660

FSB660A

Base-Emitter Saturation Voltage

Base-Emitter On Voltage

V

V_BE(sat)

V_BE(on)

I_C= 1 A, I_B= 100 mA

I_C= 1 A, V_CE= 2 V

1

SMALL SIGNAL CHARACTERISTICS

Output Capacitance

C_obo

30

pF

-

V

_CB= 10 V, I_E= 0, f = 1MHz

Transition Frequency

f_T

75

I_C= 100 mA,V_CE= 5 V, f=100MHz

*Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%

fsb660.lwpPrPA 7/10/98 RevB

Typical Characteristics

Base-Emitter Saturation

Voltage vs Collector Current

Base-Emitter On Voltage vs.

Collector Current

1.4

1.6

1.4

1.2

1

V_ce= 2.0V

β = 10

1.2

1

- 40°C

0.8

- 40°C

0.8

0.6

0.4

25°C

0.6

25°C

125°C

0.4

125°C

0.2

0.001

0.01

0.1

1

10

0.0001

0.001

0.01

0.1

1

10

I _C- COLLECTOR CURRENT (A)

Collector-Emitter Saturation

Voltage vs Collector Current

Input/Output Capacitance vs.

Reverse Bias Voltage

0.8

400

350

300

250

200

150

100

50

f V= 1=.02M.0HVz

ce

β = 10

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

C_obo

125°C

25°C

C_ibo

- 40°C

0

0.01

0.1

1

10

0.1

0.5

1

10 20

50 100

I _C- COLLECTOR CURRENT (mA)

V_CE- COLLECTOR VOLTAGE (V)

Current Gain vs. Collector Current

1000

V_ce= 2.0V

125°C

900

800

700

600

500

400

300

200

100

0

25°C

- 40°C

0.0001

0.001

0.01

0.1

1

10

I _C- COLLECTOR CURRENT (mA)

PA

SuperSOT^TM-3 Tape and Reel Data and Package Dimensions

SSOT-3 Packaging

Configuration: Figure 1.0

Packaging Description:

SSOT-3 parts are shipped in tape. The carrier tape is

Customize Label

made from dissipative (carbon filled) polycarbonate

a

resin. The cover tape is a multilayer film (Heat Activated

Adhesive in nature) primarily composed of polyester film,

adhesive layer, sealant, and anti-static sprayed agent.

These reeled parts in standard option are shipped with

3,000 units per 7" or 177cm diameter reel. The reels are

dark blue in color and is made of polystyrene plastic (anti-

static coated). Other option comes in 10,000 units per 13"

or 330cm diameter reel. This and some other options are

described in the Packaging Information table.

Antistatic Cover Tape

These full reels are individually labeled and placed inside

a

standard intermediate made of recyclable corrugated

brown paper with a Fairchild logo printing. One pizza box

contains eight reels maximum. And these intermediate

boxes are placed inside

a labeled shipping box which

comes in different sizes depending on the number of parts

shipped.

Human Readable

Label

Embossed

Carrier Tape

3P

SSOT-3 Std Packaging Information

Standard

(no flow code)

Packaging Option

D87Z

Packaging type

TNR

10,000

13"

SSOT-3 Std Unit Orientation

Qty per Reel/Tube/Bag

Reel Size

3,000

7" Dia

Box Dimension (mm)

Max qty per Box

187x107x183 343x343x64

343mm x 342mm x 64mm

Intermediate box for D87Z Option

Human Readable Label

24,000

0.0097

0.1230

30,000

0.0097

0.4150

Weight per unit (gm)

Weight per Reel (kg)

Note/Comments

Human Readable Label sample

Human Readable

Label

187mm x 107mm x 183mm

SSOT-3 Tape Leader and Trailer

Intermediate Box for Standard Option

Configuration: Figure 2.0

Carrier Tape

Cover Tape

Components

Trailer Tape

Leader Tape

300mm minimum or

75 empty pockets

500mm minimum or

125 empty pockets

August 1999, Rev. C

SuperSOT^TM-3 Tape and Reel Data and Package Dimensions, continued

SSOT-3 Embossed Carrier Tape

Configuration: Figure 3.0

P0

P2

D0

D1

T

E1

E2

W

F

Wc

B0

Tc

K0

A0

P1

User Direction of Feed

Dimensions are in millimeter

E1 E2

A0

B0

W

D0

D1

F

P1

P0

K0

T

Wc

Tc

Pkg type

SSOT-3

(8mm)

3.15

+/-0.10

2.77

+/-0.10

8.0

+/-0.3

1.55

+/-0.05

1.125

+/-0.125

1.75

+/-0.10

6.25

min

3.50

+/-0.05

4.0

+/-0.1

4.0

+/-0.1

1.30

+/-0.10

0.228

+/-0.013

5.2

+/-0.3

0.06

+/-02

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

0.5mm

maximum

20 deg maximum

Typical

component

cavity

center line

0.5mm

maximum

B0

20 deg maximum component rotation

Typical

component

center line

Sketch A (Side or Front Sectional View)

Component Rotation

Sketch C (Top View)

Component lateral movement

A0

Sketch B (Top View)

Component Rotation

SSOT-3 Reel Configuration: Figure 4.0

W1 Measured at Hub

Dim A

Max

Dim A

max

See detail AA

Dim N

7"Diameter Option

B Min

Dim C

See detail AA

Dim D

min

W3

13" Diameter Option

W2 max Measured at Hub

DETAIL AA

Dim W2

Dimensions are in inches and millimeters

Reel

Option

Tape Size

8mm

Dim A

Dim B

Dim C

Dim D

Dim N

Dim W1

Dim W3 (LSL-USL)

7.00

177.8

0.059

1.5

512 +0.020/-0.008

13 +0.5/-0.2

0.795

20.2

2.165

55

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.311 – 0.429

7.9 – 10.9

7" Dia

13.00

330

0.059

1.5

512 +0.020/-0.008

13 +0.5/-0.2

0.795

20.2

4.00

100

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.311 – 0.429

7.9 – 10.9

8mm

13" Dia

July 1999, Rev. C

SuperSOT^TM-3 Tape and Reel Data and Package Dimensions, continued

SuperSOT -3 (FS PKG Code 32)

1 : 1

Scale 1:1 on letter size paper

Dimensions shown below are in:

inches [millimeters]

Part Weight per unit (gram): 0.0097

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

CoolFET™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench™

QS™

UHC™

VCX™

CROSSVOLT™

E²CMOS^TM

FACT™

FACT Quiet Series™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

TinyLogic™

FAST^®

FASTr™

GTO™

HiSeC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

FSB6726

C

E

B

SuperSOT^TM-3

PNP General Purpose Amplifier

This device is designed for general purpose medium power amplifiers and switches requiring collector currents

to 1.0 A. Sourced from Process 77.

Absolute Maximum Ratings*

T_{A = 25°C unless otherwise noted}

FSB660/FSB660A

Symbol

Parameter

Units

Collector-Emitter Voltage

30

V

V_CEO

Collector-Base Voltage

Emitter-Base Voltage

40

5

V

V_CBO

V_EBO

Collector Current - Continuous

1.5

A

I_C

Operating and Storage Junction Temperature Range

-55 to +150

°C

T_J,T_stg

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:

1) These ratings are based on a maximum junction temperature of 150°C.

2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

Thermal Characteristics

T_{A = 25°C unless otherwise noted}

Max

Characteristic

Symbol

Units

FSB6726

Total Device Dissipation

Thermal Resistance, Junction to Ambient

500

mW

P_D

250

°C/W

R_qJA

ã

1999 Fairchild Semiconductor Corporation

Page 1 of 2

fsb6726lwp Pr77 RevA

PNP General Purpose Amplifier

(continued)

Electrical Characteristics

T_{A = 25°C unless otherwise noted}

Symbol

Parameter

Test Conditions

Min

Max

Units

OFF CHARACTERISTICS

Collector-Emitter Breakdown Voltage

Collector-Base Breakdown Voltage

Emitter-Base Breakdown Voltage

Collector Cutoff Current

30

40

5

V

BV_CEO

BV_CBO

BV_EBO

I_CBO

I_C= 10 mA

I_C= 100 mA

I_E= 100 mA

V_CB= 40 V

V

100

nA

Emitter Cutoff Current

nA

I_EBO

V_EB= 5V

ON CHARACTERISTICS*

DC Current Gain

h_FE

60

50

-

I_C= 100 mA, V_CE= 1 V

250

500

I_C= 1 A,

V_CE= 1V

Collector-Emitter Saturation Voltage

mV

V

V_CE(sat)

I_C= 1 A, I_B= 100 mA

Base-Emitter On Voltage

1.2

V_BE(on)

I_C= 1 A, V_CE= 1 V

SMALL SIGNAL CHARACTERISTICS

Collector-Base Capacitance

C_cb

30

25

pF

-

V_CB= 10 V, f = 1MHz

hfe

Small Signal Current Gain

2.5

I_C= 50 mA,V_CE= 10V, f=20MHz

*Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%

Page 2 of 2

fsb6726lwp Pr77 RevA

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

CoolFET™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench™

QS™

UHC™

VCX™

CROSSVOLT™

E²CMOS^TM

FACT™

FACT Quiet Series™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

TinyLogic™

FAST^®

FASTr™

GTO™

HiSeC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Discr ete P OWER & Sign a l

Tech n ologies

FSBCW30

C

E

B

SuperSOT^TM-3

PNP General Purpose Amplifier

This device is designed for general purpose medium power

amplifiers and switches requiring collector currents to 300 mA.

Sourced from Process 68. See BC857A for characteristics.

Absolute Maximum Ratings*

TA = 25°C unless otherwise noted

Symbol

Parameter

Value

Units

V_CEO

V_CBO

V_EBO

I_C

Collector-Emitter Voltage

32

V

Collector-Base Voltage

Emitter-Base Voltage

5.0

V

Collector Current - Continuous

Operating and Storage Junction Temperature Range

500

mA

°C

-55 to +150

T_J, T_stg

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:

1) These ratings are based on a maximum junction temperature of 150 degrees C.

2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

Thermal Characteristics

TA = 25°C unless otherwise noted

Symbol

Characteristic

Max

Units

FSBCW30

P_D

Total Device Dissipation

Derate above 25°C

Thermal Resistance, Junction to Ambient

500

4

250

mW

mW/°C

°C/W

R_θJA

*Device mounted on FR-4 PCB 4.5" x 5"; mounting pad 0.02 in²of 2oz copper.

1998 Fairchild Semiconductor Corporation

FSBCW30, Rev B

PNP General Purpose Amplifier

(continued)

Electrical Characteristics

TA = 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Max

Units

OFF CHARACTERISTICS

BV_CEO

Collector-Em itter Breakdown

I_C= 2.0 m A, I_B= 0

32

V

Voltage

BV_CBO

BV_CES

Collector-Base Breakdown Voltage

32

V

I_C= 10 µA, I_E= 0

Collector-Em itter Breakdown

Voltage

BV_EBO

I_CBO

Em itter-Base Breakdown Voltage

5.0

V

I_E= 10 µA, I_C= 0

Collector-Cutoff Current

V_CB= 32 V, I_E= 0

V_CB= 32 V, I_E= 0, T_A= +100

100

10

nA

µA

°C

ON CHARACTERISTICS

h_FE

DC Current Gain

V_CE= 5.0 V, I_C= 2.0 mA

215

500

0.30

0.75

Collector-Emitter Saturation Voltage I_C= 10 mA, I_B= 0.5 mA

Base-Emitter On Voltage V_CE= 5.0 V, I_C= 2.0 mA

V

V_CE(sat)

V_BE(on)

0.60

SMALL SIGNAL CHARACTERISTICS

NF

Noise Figure

10

dB

V_CE= 5.0 V, I = 200 A,

µ

C

R = 2.0 k , f = 1.0 kHz,

Ω

S

B_W= 200 Hz

FSBCW30, Rev

B

PNP General Purpose Amplifier

(continued)

Typical Characteristics

Typical Pulsed Current Gain

vs Collector Current

Collector-Emitter Saturation

Voltage vs Collector Current

500

400

300

200

100

0

0.3

0.25

0.2

V_CE= 5V

125 °C

β

= 10

0.15

0.1

25 °C

- 40 °C

0.05

125 ºC

- 40 ºC

0

0.1

1

10

100

300

0.01

0.1

1

10

100

I _C- COLLECTOR CURRENT (mA)

I_C- COLLECTOR CURRENT (mA)

Base-Emitter Saturation

Voltage vs Collector Current

Base Emitter ON Voltage vs

Collector Current

1.2

1

0.8

0.6

0.4

0.2

0

β

= 10

1

0.8

0.6

0.4

0.2

0

- 40 ºC

25 °C

- 40 ºC

25 °C

125 ºC

V

= 5V

CE

0.1

1

10

100

300

0.1

1

10

100 200

I _C- COLLECTOR CURRENT (mA)

Collector-Cutoff Current

vs. Ambient Temperature

Collector-Emitter Breakdown

Voltage with Resistance

Between Emitter-Base

100

10

V

= 50V

CB

95

90

85

80

75

70

1

0.1

0.01

25

50

75

100

125

0.1

1

10

100

1000

T_A- AMBIENT TEMPERATURE (ºC)

RESISTANCE (kΩ)

FSBCW30, Rev

B

PNP General Purpose Amplifier

(continued)

Typical Characteristics (continued)

Input and Output Capacitance

vs Reverse Voltage

Collector Saturation Region

4

100

Ta = 25°C

f = 1.0 MHz

3

2

Ic =

100 uA

300 mA

10

50 mA

Cib

1

0

Cob

100

300

700

2000 4000

0.1

1

10

100

I

- BASE CURRENT (uA)

B

V

- COLLECTOR VOLTAGE(V)

ce

Switching Times vs

Collector Current

Gain Bandwidth Product

vs Collector Current

300

270

240

210

180

150

120

90

40

t

V

= 5V

s

ce

30

20

10

0

IB1 = IB2 = Ic / 10

V

= 10 V

cc

t

f

t

r

60

30

t

d

0

10

20

30

50

100

200 300

1

10

20

50

100 150

I_C- COLLECTOR CURRENT (mA)

Power Dissipation vs

Ambient Temperature

700

600

500

TO-92

SOT-23

400

300

200

100

0

25

50

75

100

125

150

TEMPERATURE (^oC)

FSBCW30, Rev

B

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

CoolFET™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench™

QS™

CROSSVOLT™

E²CMOS^TM

FACT™

FACT Quiet Series™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

TinyLogic™

FAST^®

FASTr™

GTO™

HiSeC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

September 1997

Revised December 1999

FST16209

18-Bit Bus Exchange Switch

General Description

Features

The Fairchild Switch FST16209 provides 18-bits of high-

speed CMOS TTL-compatible bus switching or exchang-

ing. The low on resistance of the switch allows inputs to be

connected to outputs without adding propagation delay or

generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device operates as a 18-bit bus switch or a 9-bit bus

exchanger, which allows data exchange between the four

signal ports via the data-select terminals.

Ordering Code:

Order Number

FST16209MEA

FST16209MTD

Package Number

MS48A

Package Description

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD48

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

S2

S1

S0

A₁

A₂

Function

L

H

L

Z

B₁

B₂

Z

Disconnect

A₁= B₁

A₁= B₂

A₂= B₁

A₂= B₂

L

H

L

Z

Pin Descriptions

L

H

L

B₁

B₂

Z

H

Z

Pin Name

S2, S1, S0

A₁, A₂

Description

Data-select inputs

Bus A

L

H

L

Z

Disconnect

H

B₁

B₂

B₁

A

₁= B₁, A₂= B₂

₁= B₂, A₂= B₁

H

B₁, B₂

Bus B

DS500056

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN)(Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

(Note 4)

Min

Max

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0 ≤ V_IN≤ 5.5V

_IN= 5.5V

0 ≤ A, B ≤ V_CC

0

V

I_OFF

R_ON

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

14

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, R_U= R_D= 500Ω

_CC= 4.5 − 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL, t_PLH

Prop Delay Bus to Bus (Note 6)

Prop Delay S to Bus

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PHL, t_PLH

_PZH, t_PZL

1.5

7.0

7.5

7.0

8.0

V_I= OPEN

Figure 1

Figure 2

t

Output Enable Time, S to A or B

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time S to A or B

1.0

8.5

9.0

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

_CC= 5.0V,

Control pin Input Capacitance

Input/Output Capacitance

3

pF

V

10

S0, S1, and S2 = GND

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS48A

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

November 1998

Revised December 1999

FST16210

20-Bit Bus Switch

General Description

Features

The Fairchild Switch FST16210 provides 20-Bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as a 10-bit or 20-Bit bus switch.

When OE₁is LOW, the switch is ON and Port 1A is con-

nected to Port 1B. When OE₂is LOW, Port 2A is connected

to Port 2B.

Ordering Code:

Order Number Package Number

Package Description

FST16210MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Logic Diagram

Truth Table

Pin Descriptions

Inputs

Inputs/Outputs

Pin Name

Description

OE₁

OE₂

1A, 1B

2A, 2B

L

H

L

1A = 1B

2A = 2B

OE₁, OE₂

1A, 2A

Bus Switch Enables

Bus A

1A = 1B

Z

2A = 2B

Z

H

Z

1B, 2B

Bus B

H

DS500193

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

-40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

R_ON

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, RU = RD = 500Ω

_CC= 4.5 – 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus

(Note 6)

0.25

ns

V_I= OPEN

Figure 1,

Figure 2

t_PZH, t_PZL

Output Enable Time

1.5

6.0

7.0

6.5

7.2

V_I= 7V for t_PZL

Figure 1,

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

ns

Figure 1,

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

V_CC, OE = 5.0V

Control pin Input Capacitance

Input/Output Capacitance

3

6

pF

V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384(FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

4

July 1997

Revised December 1999

FST16211

24-Bit Bus Switch

General Description

Features

The Fairchild Switch FST16211 provides 24-bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as a 12-bit or 24-bit bus switch.

When OE₁is LOW, the switch is ON and Port 1A is con-

nected to Port 1B. When OE₂is LOW, Port 2A is connected

to Port 2B.

Ordering Code:

Order Number

FST16211MEA

FST16211MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Inputs

Inputs/Outputs

Pin Descriptions

OE₁

OE₂

1A, 1B

2A, 2B

Pin Name

Description

L

H

L

1A = 1B

2A = 2B

1A = 1B

Z

2A = 2B

Z

OE₁, OE₂

1A, 2A

Bus Switch Enables

Bus A

H

Z

H

1B, 2B

Bus B

DS500037

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

-40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

R_ON

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, RU = RD = 500Ω

_CC= 4.5 – 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH, t_PZL

1.5

6.0

7.0

6.5

7.2

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

Parameter

Control pin Input Capacitance

Input/Output Capacitance

Typ

3

Max

Units

pF

Conditions

_CC= 5.0V

V_CC, OE = 5.0V

C_IN

V

C_I/O

6

pF

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS56A

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

July 1997

Revised December 1999

FST16212

24-Bit Bus Exchange Switch

General Description

Features

The Fairchild Switch FST16212 provides 24-bits of high-

speed CMOS TTL-compatible bus switching or exchang-

ing. The low on resistance of the switch allows inputs to be

connected to outputs without adding propagation delay or

generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device operates as a 24-bit bus switch or a 12-bit bus

exchanger, which allows data exchange between the four

signal ports via the data-select terminals.

Ordering Code:

Order Number

FST16212MEA

FST16212MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

A₁

A₂

S2

L

S1

L

S0

L

Function

Z

B₁

B₂

Z

Disconnect

L

H

L

A₁= B₁

A₁= B₂

A₂= B₁

A₂= B₂

L

H

L

Z

Pin Descriptions

L

H

L

B₁

B₂

Z

Pin Name

S2, S1, S0

A₁, A₂

Description

Data-select inputs

Bus A

H

Z

L

H

L

Z

Disconnect

H

B₁

B₂

B₁

A

₁= B₁, A₂= B₂

₁= B₂, A₂= B₁

B₁, B₂

Bus B

H

DS500038

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

R_ON

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

14

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A=+25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, RU = RD = 500Ω

V_CC= 4.5 – 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Prop Delay S to Bus

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PHL,t_PLH

_PZH, t_PZL

1.5

7.0

7.5

8.0

V_I= OPEN

Figure 1

Figure 2

t

Output Enable Time, S to A or B

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time S to A or B

1.0

8.5

9.0

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

Control pin Input Capacitance

Input/Output Capacitance

3

pF

V

_CC= 5.0V

_CC= 5.0V, S0, S1, or S2 =GND

10

V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS56A

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

July 1997

Revised December 1999

FST16213

24-Bit Bus Exchange Switch

General Description

Features

The Fairchild Switch FST16213 provides 24-bits of high-

speed CMOS TTL-compatible bus switching or exchang-

ing. The low on resistance of the switch allows inputs to be

connected to outputs without adding propagation delay or

generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device operates as a 24-bit bus switch or a 12-bit bus

exchanger, which allows data exchange between the four

signal ports via the data-select terminals.

Ordering Code:

Order Number

FST16213MEA

FST16213MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

DS500039

www.fairchildsemi.com

Connection Diagram

Pin Descriptions

Pin Name

S2, S1, S0

A₁, A₂

Description

Data-select inputs

Bus A

B₁, B₂

Bus B

Truth Table

S2 S1 S0

A₁

A₂

Function

L

H

L

Z

B₁

B₂

Z

Disconnect

A

₁= B₁

₁= B₂

₂= B₁

₂= B₂

L

H

L

Z

L

H

L

B₁

B₂

H

Z

L

H

L

A₂and B₂A₁and B₂

A₁= A₂= B₂

H

B₁

B₂

B₁

A₁= B₁, A₂= B₂

A₁= B₂, A₂= B₁

H

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch On Resistance

A to B or B to A

5.5

R_ON

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

4

7

Ω

_IN= 0V, I_IN= 30mA

_IN= 2.4V, I_IN= 15mA

_IN= 0V, I_IN= 64mA

_IN= 0V, I_IN= 30mA

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

(Note 5)

4.5

8

12

20

14

22

30

3

Ω

4.0

11

10

16

22

Ω

Switch On Resistance

A1 to A2

4.5

Ω

4.5

Ω

(Note 5)

4.5

Ω

4.0

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

3

www.fairchildsemi.com

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, RU = RD = 500Ω

_CC= 4.5 − 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL,t_PLH

t_PHL,t_PLH

_PZH, t_PZL

Prop Delay Bus to Bus (Note 6)

Prop Delay A1 to A2

0.25

ns

V_I= OPEN

Figure 1

Figure 2

0.5

7.5

0.5

8.0

V_I= OPEN

Figure 1

Figure 2

t

Output Enable Time, S to A or B

1.5

1.0

1.5

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

t_PZH, t_PZL

t_PHZ, t_PLZ

Output Disable Time S to A or B

8.5

9.5

9.0

10.0

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

V_I= 7V for t_PZL

Output Enable Time, S0 to A2 and B2

Output Disable Time, S0 to A2 and B2

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

Control pin Input Capacitance

Input/Output Capacitance

3

pF

V

10

S0, S1, or S2 = GND

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS56A

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

July 1997

Revised December 1999

FST16232

Synchronous 16-Bit to 32-Bit

Multiplexer/Demultiplexer Bus Switch

General Description

Features

■ 4Ω switch connection between two ports.

The Fairchild Switch FST16232 is a 16-bit to 32-bit high-

speed CMOS TTL-compatible synchronous multiplexer/

demultiplexer bus switch. The low on resistance of the

switch allows inputs to be connected to outputs without

adding propagation delay or generating additional ground

bounce noise.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device allows two separate datapaths to be multi-

plexed onto, or demultiplexed from, a single path. Two con-

trol select pins (S₁, S₀) are synchronous and clocked on

the rising edge of CLK when CLKEN is LOW.

Ordering Code:

Order Number

FST16232MEA

FST16232MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

DS500054

www.fairchildsemi.com

Connection Diagram

Pin Descriptions

Pin Name

S₁, S₀

Description

Control Pins

Clock Input

Clock Enable Input

Bus A

CLK

CLKEN

1A, 2A

1B, 2B

Bus B

Truth Table

Inputs

Function

S₁

S₀

CLK

CLKEN

X

L

X

L

X

↑

H

L

Last State

Disconnect

A = B₁and A = B₂

A = B₁

L

H

L

H

A = B₂

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN)(Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OFF

R_ON

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

3

www.fairchildsemi.com

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, RU = RD = 500Ω

_CC= 4.5 – 5.5V _CC= 4.0V

C

Figure

No.

Symbol

Parameter

Units

Conditions

V

Min

Max

Min

Max

f_MAX

t_PHL, t_PLH

_PHL, t_PLH

Maximum Clock Frequency

Prop Delay Bus to Bus (Note 6)

Prop Delay CLK to B or A

150

MHz

ns

V_I= OPEN

Figure 1

Figure 2

0.25

6.3

0.25

6.0

V_I= OPEN

Figure 1

Figure 2

t

2.0

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH, t_PZL

Output Enable Time

CLK to A = B₁= B₂

Output Enable Time

CLK to A or B₁or B₂

Output Disable Time

CLK to A or B

V_I= 7V for t_PZL

,

Figure 1

Figure 2

1.7

2.0

8.5

6.5

8.5

9.0

6.5

9.0

ns

V_I= OPEN for t_PZH

V_I= 7V for t_PZL

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

,

Figure 1

Figure 2

t_PHZ, t_PLZ

,

Figure 1

Figure 2

1.0

2.5

V_I= OPEN for t_PHZ

t_S

Setup Time S₁, S₀before CLK ↑

2.8

Figure 1

Figure 2

ns

Setup Time CLKEN before CLK ↑

Hold Time S₁, S₀after CLK ↑

1.8

1.0

2.0

1.0

t_H

Figure 1

Figure 2

ns

Hold Time CLKEN after CLK ↑

1.5

3.1

1.5

3.1

t_W

Pulse Width

Clock HIGH or LOW

Figure 1

Figure 2

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

Parameter

Typ

Max

Units

Conditions

C_IN

Control pin Input Capacitance

Input/Output Capacitance

4

7

pF

V

_CC= 5.0V

_CC= 5.0V, S₀, S₁= 0V

C_I/O

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS56A

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

September 1997

Revised December 1999

FST16233

16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch

General Description

Features

The Fairchild Switch FST16233 is a 16-bit to 32-bit high-

speed CMOS TTL-compatible multiplexer/demultiplexer

bus switch. The low on resistance of the switch allows

inputs to be connected to outputs without adding propaga-

tion delay or generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device can be used in applications where two buses

need to be addressed simultaneously. The FST16233 can

be used as two 8-bit to 16-bit multiplexers or as one 16-bit

to 32-bit multiplexer.

Two select (SEL₁, SEL₀) and two test (TEST₀, TEST₁)

inputs provide switch enable and multiplexer select control.

The FST16233 is designed to prevent through-current

when switching buses.

Ordering Code:

Order Number

FST16233MEA

FST16233MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

DS500055

www.fairchildsemi.com

Connection Diagram

Pin Descriptions

Pin Name

SEL₀, SEL₁

TEST₀, TEST₁

A

Description

Select Inputs

Test Inputs

Bus A

B₁, B₂

Bus B

Truth Table

Inputs

Function

SEL

L

TEST

L

A = B₁

A = B₂

H

X

H

A = B₁and A = B₂

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OFF

R_ON

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

3

www.fairchildsemi.com

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50pF, RU= RD = 500Ω

_CC= 4.5 − 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL, t_PLH

A or B, to B or A (Note 6)

SEL to A

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PHL,t_PLH

_PZH, t_PZL

1.5

1.0

6.1

6.5

6.8

7.2

V_I= OPEN

Figure 1

Figure 2

t

Output Enable Time,

SEL or TEST to B

Output Disable Time,

SEL or TEST to B

V_I= 7V for t_PZL

,

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

V_I= OPEN for t_PHZ

t_PHZ, t_PLZ

1.5

7.8

8.5

ns

,

Figure 1

Figure 2

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

_CC= 5.0V, Switch OFF

Control pin Input Capacitance

Input/Output Capacitance

4

6

pF

V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS56A

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

Preliminary

September 1999

Revised December 1999

FST162861

20-Bit Bus Switch with 25Ω Series Resistors in Outputs

(Preliminary)

equivalent 25Ω series resistors to reduce signal-reflection

noise, eliminating the need for external terminating resis-

tors.

General Description

The Fairchild Switch FST162861 provides 20-Bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

Features

■ 25Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

additional ground bounce noise.

The device is organized as a 10-bit or 20-Bit bus switch.

When OE₁is LOW, the switch is ON and Port 1A is con-

■ Low l_CC

.

nected to Port 1B. When OE₂is LOW, Port 2A is connected

to Port 2B. When OE_Xis HIGH, a high impedance state

exists between the A and B ports. The FST162861 has an

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

Ordering Code:

Order Number Package Number

Package Description

FST162861MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Logic Diagram

Truth Table

Inputs

Inputs/Outputs

Pin Descriptions

OE₁

OE₂

1A, 1B

2A, 2B

L

H

L

1A = 1B

2A = 2B

Pin Name

Description

1A = 1B

Z

2A = 2B

Z

OE₁, OE₂

1A, 2A

Bus Switch Enables

Bus A

H

Z

H

1B, 2B

Bus B

DS500319

www.fairchildsemi.com

Preliminary

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 4)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S) (Note 2)

DC Input Voltage (V_IN) (Note 3)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Current

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

-40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: V_Sis the voltage observed/applied at either the A or B Port across

the switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 4: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 5)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

V

µA

Ω

0 ≤ V_IN≤ 5.5V

_IN= 5.5V

0 ≤ A, B ≤ V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch ON Resistance

(Note 6)

5.5

±1.0

38

R_ON

4.5

20

26

28

V

_IN= 0V, I_IN= 64mA

4.5

40

Ω

_IN= 0V, I_IN= 30mA

4.5

35

48

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

TBD

3

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

Preliminary

AC Electrical Characteristics

T_A= −40 °C to +85 °C,

C_L= 50 pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V _CC= 4.0V

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 7)

Output Enable Time

1.25

ns

V_I= OPEN

Figure 1,

Figure 2

t_PZH, t_PZL

1.5

6.0

6.5

V_I= 7V for t_PZL

Figure 1,

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

ns

Figure 1,

Figure 2

V_I= OPEN for t_PHZ

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 8)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

Control Pin Input Capacitance

3

6

pF

V

_CC= 5.0V, V_IN= 0V

Input/Output Capacitance “OFF State”

V_CC, OE = 5.0V, V_IN= 0V

Input/Output Capacitance “ON State”

12

V

_CC= 5.0V, OE = 0.0V, V_IN= 0V

Note 8: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50Ω source terminated in 50Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384(FST3384) bus switch product.

www.fairchildsemi.com

4

Preliminary

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

July 1997

Revised December 1999

FST16292

12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch

General Description

Features

The Fairchild Switch FST16292 provides twelve 2:1 high-

speed CMOS TTL-compatible multiplexer/demultiplexer

bus switches. The low on resistance of the switch allows

inputs to be connected to outputs without adding propaga-

tion delay or generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

■ Internal 500Ω pull-down resistor on A₂port.

The select pin connects the A Port to the selected B Port

output. The A₂Ports are not externally connected, thus

have a 500Ω pull-down resistor to ground.

Ordering Code:

Order Number

FST16292MEA

FST16292MTD

Package Number

MS56A

Package Description

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

MTD56

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Pin Descriptions

Truth Table

Pin Name

SO

Description

Data-select input

Bus A

S0

A₁

A₂

Function

L

B₁

B₂

B₁

A

₁= B₁, A₂= B₂

₁= B₂, A₂= B₁

A₁

H

B₁, B₂

Bus B

DS500104

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0ns/V to 5ns/V

0ns/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 3)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

10

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch On Resistance

(Note 4)

5.5

R_ON

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

12

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

14

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 3: Typical values are at V_CC= 5.0V and T_A=+25°C

Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T_A= −40 °C to +85 °C,

C

_L= 50pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V

V_CC= 4.0V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 5)

Prop Delay S0 to A₁

0.25

7.4

ns

V_I= OPEN

Figure 1

Figure 2

t_PHL,t_PLH

_PZL, t_PZH

1.5

7.0

V_I= OPEN

Figure 1

Figure 2

t

Output Enable Time

S0 to B₁or B₂

V_I= 7V for t_PZL

Figure 1

Figure 2

1.0

6.7

7.5

7.0

7.8

ns

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PLZ, t_PHZ

Output Disable Time

S0 to B₁or B₂

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 5: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 6)

Symbol

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

C_IN

Control pin Input Capacitance

Input/Output Capacitance

3

pF

V

C_I/O

10

_CC= 5.0V, S0 =GND

Note 6: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

Package Number MS56A

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

Preliminary

September 1999

Revised December 1999

FST16861

20-Bit Bus Switch (Preliminary)

General Description

Features

The Fairchild Switch FST16861 provides 20-Bits of high-

speed CMOS TTL-compatible bus switching. The low ON

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as a 10-bit or 20-Bit bus switch.

When OE₁is LOW, the switch is ON and Port 1A is con-

nected to Port 1B. When OE₂is LOW, Port 2A is connected

to Port 2B. When OE_Xis HIGH, a high impedance state

exists between the A and B Ports.

Ordering Code:

Order Number Package Number

Package Description

FST16861MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Logic Diagram

Truth Table

Pin Descriptions

Inputs

Inputs/Outputs

Pin Name

Description

OE₁

OE₂

1A, 1B

2A, 2B

L

H

L

1A = 1B

2A = 2B

OE₁, OE₂

1A, 2A

Bus Switch Enables

Bus A

1A = 1B

Z

2A = 2B

Z

H

Z

1B, 2B

Bus B

H

DS500318

www.fairchildsemi.com

Preliminary

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 4)}

Supply Voltage (V_CC

)

0.5V to +7.0V

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S) (Note 2)

DC Input Voltage (V_IN) (Note 3)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Current

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

-40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: V is the voltage observed/applied at either the A or B Ports across

S

the switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 4: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

= −40 °C to +85 °C

A

V

(V)

CC

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 5)

V

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I

= −18mA

IN

IK

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

IH

IL

0.8

±1.0

10

±1.0

7

V

I

µA

Ω

0≤ V ≤5.5V

IN

I

0

V

= 5.5V

IN

I

OFF-STATE Leakage Current

Switch On Resistance

(Note 6)

5.5

0 ≤A, B ≤V

CC

OZ

R

4.5

4

V

= 0V, I = 64mA

IN

ON

IN

4.5

7

Ω

= 0V, I = 30mA

IN

4.5

8

12

20

3

Ω

= 2.4V, I = 15mA

IN

4.0

11

Ω

= 2.4V, I = 15mA

IN

I

Quiescent Supply Current

5.5

µA

mA

= V or GND, I

= 0

OUT

CC

∆ I

Increase in I per Input

5.5

2.5

One input at 3.4V

Other inputs at V or GND

CC

Note 5: Typical values are at V = 5.0V and T = +25°C

CC

A

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

Preliminary

AC Electrical Characteristics

T

= −40 °C to +85 °C,

A

C

= 50pF, RU = RD = 500Ω

L

Symbol

Parameter

Units

Conditions

Figure No.

V

= 4.5 – 5.5V

V

= 4.0V

CC

Min

Max

Min

Max

t

,t

Prop Delay Bus-to-Bus (Note 7)

Output Enable Time

0.25

ns

V = OPEN

Figure 1,

Figure 2

PHL PLH

I

t

, t

1.5

6.0

6.5

V = 7V for t

I PZL

PZH PZL

Figure 1,

Figure 2

V = OPEN for t

I

PZH

t

, t

Output Disable Time

6.5

ns

V = 7V for t

I PLZ

PHZ PLZ

Figure 1,

Figure 2

V = OPEN for t

I

PHZ

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 8)

Symbol

Parameter

Typ

Max

Units

Conditions

= 5.0V, V = 0V

C

Control Pin Input Capacitance

3

6

pF

V

IN

I/O

CC

IN

Input/Output Capacitance “OFF State”

, OE = 5.0V, V = 0V

IN

Input/Output Capacitance “ON State”

12

= 5.0V, OE = 0.0V, V = 0V

IN

Note 8: T = +25°C, f = 1 Mhz, Capacitance is characterized but not tested.

A

AC Loading and Waveforms

Note: Input driven by 50Ω source terminated in 50Ω

Note: C includes load and stray capacitance

L

Note: Input PRR = 1.0 MHz, T = 500 ns

W

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384(FST3384) bus switch product.

www.fairchildsemi.com

4

Preliminary

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

August 1997

Revised December 1999

FST3125

Quad Bus Switch

General Description

Features

The Fairchild Switch FST3125 provides four high-speed

CMOS TTL-compatible bus switches. The low on resis-

tance of the switch allows inputs to be connected to out-

puts without adding propagation delay or generating

additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as four 1-bit switches with sepa-

rate OE inputs. When OE is LOW, the switch is ON and

Port A is connected to Port B. When OE is HIGH, the

switch is OPEN and

between the two ports.

a high-impedance state exists

Ordering Code:

Order Number

FST3125M

Package Number

Package Description

M14A

MQA16

MTC14

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

FST3125QSC

FST3125MTC

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagrams

Pin Assignment for SOIC and TSSOP

Pin Assignment for QSOP

Pin Descriptions

Truth Table

Pin Name

Description

Inputs

Inputs/Outputs

Bus Switch Enables

OE₁, OE₂, OE₃, OE₄

1A, 2A, 3A, 4A

1B, 2B, 3B, 4B

NC

Bus A

Bus B

OE

L

A,B

A = B

Z

Not Connected

H

DS500043

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN)(Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0ns/V to 5ns/V

0ns/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Min

Typ

Max

(Note 4)

V_IK

Clamp Diode Voltage

High Level Input Voltage

Low Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

0 ≤A, B ≤V_CC

I_OZ

R_ON

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

_IN= 0V, I_IN= 30mA

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND,

4.5

7

Ω

4.5

8

15

20

3

Ω

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

I

_OUT= 0

∆I_CC

5.5

2.5

mA

One input at 3.4V.

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

C_L= 50pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V _CC= 4.0V

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH, t_PZL

1.0

1.5

5.0

5.3

5.5

5.6

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

Control Pin Input Capacitance

3

pF

V_CC= 5.0V

V_CC, OE = 5.0V

Input/Output Capacitance

5

pF

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA16

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC14

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

5

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

August 1997

Revised December 1999

FST3126

Quad Bus Switch

General Description

Features

The Fairchild Switch FST3126 provides four high-speed

CMOS TTL-compatible bus switches. The low on resis-

tance of the switch allows inputs to be connected to out-

puts without adding propagation delay or generating

additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as four 1-bit switches with sepa-

rate OE inputs. When OE is HIGH, the switch is ON and

Port A is connected to Port B. When OE is LOW, the switch

is OPEN and a high-impedance state exists between the

two ports.

Ordering Code:

Order Number

FST3126M

Package Number

M14A

Package Description

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

FST3126QSC

FST3126MTC

MQA16

MTC14

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagrams

Pin Assignment for SOIC and TSSOP

Pin Assignment for QSOP

Pin Descriptions

Truth Table

Pin Name

Description

Inputs

Inputs/Outputs

OE₁, OE₂, OE₃, OE₄Bus Switch Enables

OE

L

A,B

Z

1A, 2A, 3A, 4A

1B, 2B, 3B, 4B

NC

Bus A

Bus B

H

A = B

Not Connected

DS500044

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held high or low. They may not float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

0 ≤A, B ≤V_CC

I_OZ

R_ON

5.5

4.5

4

V_IN= 0V, I_IN= 64mA

V_IN= 0V, I_IN= 30mA

V_IN= 2.4V, I_IN= 15mA

V_IN= V_CCor GND,

4.5

7

Ω

4.5

8

15

20

3

Ω

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

I

_OUT= 0

∆I_CC

5.5

2.5

mA

One input at 3.4V.

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T_A= −40 °C to +85 °C,

C_L= 50pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 − 5.5V _CC= 4.0V

V

Min

Max

0.25

4.5

Min

Max

0.25

5.0

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

V_I=OPEN

Figure 1

Figure 2

ns

t_PZH, t_PZL

1.0

1.5

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

5.7

6.2

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

Control Pin Input Capacitance

Input/Output Capacitance

3

5

pF

V

_CC= 5.0V

_CC= 5.0V, OE = 0V

V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0MHz, t_W= 500ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA16

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC14

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

5

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

June 1997

Revised December 1999

FST3244

Octal Bus Switch

General Description

Features

The Fairchild Switch FST3244 provides 8-bits of high-

speed CMOS TTL-compatible bus switching in a standard

’244 pin-out. The low on resistance of the switch allows

inputs to be connected to outputs without adding propaga-

tion delay or generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as two 4-bit switches with separate

OE inputs. When OE is LOW, the switch is ON and Port A

is connected to Port B. When OE is HIGH, the switch is

OPEN and a high-impedance state exists between the two

ports.

Ordering Code:

Order Number

FST3244WM

FST3244QSC

FST3244MTC

Package Number

M20B

Package Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA20

MTC20

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Inputs

Inputs/Outputs

Pin Descriptions

OE₁

L

OE₂

L

1A, 1B

1A = 1B

Z

2A, 2B

2A = 2B

Z

Pin Name

Description

OE₁, OE₂

1A, 2A

Bus Switch Enable

Bus A

L

H

L

2A = 2B

Z

1B, 2B

Bus B

H

Z

DS500021

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

= −40 °C to +85 °C

A

V

(V)

CC

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V

Clamp Diode Voltage

High Level Input Voltage

Low Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I

= −18mA

IN

IK

2.0

IH

IL

0.8

±1.0

7

V

I

µA

Ω

0≤ V ≤5.5V

IN

I

5.5

0 ≤A, B ≤V

CC

OZ

R

4.5

4

V

= 0V, I = 64mA

IN

ON

IN

4.5

7

Ω

= 0V, I = 30mA

IN

4.5

8

15

20

3

Ω

= 2.4V, I = 15mA

IN

4.0

11

Ω

= 2.4V, I = 15mA

IN

I

Quiescent Supply Current

5.5

µA

mA

= V or GND, I

= 0

OUT

CC

∆ I

Increase in I per Input

5.5

2.5

One input at 3.4V

Other inputs at V or GND

CC

Note 4: Typical values are at V = 5.0V and T = +25°C

CC

A

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

= −40 °C to +85 °C,

A

C

= 50pF, RU = RD = 500Ω

L

Symbol

Parameter

Units

Conditions

Figure No.

V

= 4.5 – 5.5V

V

= 4.0V

CC

Min

Max

Min

Max

t

,t

Prop Delay Bus to Bus(Note 6)

Output Enable Time

0.25

ns

V = OPEN

Figure 1

Figure 2

PHL PLH

I

, t

1.0

5.6

6.2

6.1

V = 7V for t

I PZL

PZH PZL

Figure 1

Figure 2

V = OPEN for t

I

PZH

t

, t

Output Disable Time

5.6

ns

V = 7V for t

I PLZ

PHZ PLZ

Figure 1

Figure 2

V = OPEN for t

I

PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

Parameter

Typ

Max

Units

Conditions

= 5.0V

C

Control Pin Input Capacitance

3

pF

V

IN

CC

Input/Output Capacitance

5

pF

, OE = 5.0V

I/O

CC

Note 7: T = +25°C, f = 1 MHz, Capacitance is characterized but not tested.

A

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C includes load and stray capacitance

L

Note: Input PRR = 1.0 MHz, t = 500 nS

W

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA20

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

June 1997

Revised December 1999

FST3245

Octal Bus Switch

General Description

Features

The Fairchild Switch FST3245 provides 8-bits of high-

speed CMOS TTL-compatible bus switching in a standard

’245 pin-out. The low on resistance of the switch allows

inputs to be connected to outputs without adding propaga-

tion delay or generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as an 8-bit switch. When OE is

LOW, the switch is ON and Port A is connected to Port B.

When OE is HIGH, the switch is OPEN and a high-imped-

ance state exists between the two ports.

Ordering Code:

Order Number

FST3245WM

FST3245QSC

FST3245MTC

Package Number

M20B

Package Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA20

MTC20

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Pin Descriptions

Pin Name

Description

Input OE

Function

Connect

OE

A

Bus Switch Enable

Bus A

L

H

Disconnect

B

Bus B

DS500020

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN< 0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

= −40 °C to +85 °C

A

V

(V)

CC

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I

= −18 mA

IN

IK

2.0

IH

IL

0.8

±1.0

7

V

I

µA

Ω

0≤ V ≤ 5.5V

IN

I

5.5

0 ≤A, B ≤ V

CC

OZ

R

4.5

4

V

= 0V, I = 64 mA

IN

ON

IN

4.5

7

Ω

= 0V, I = 30 mA

IN

4.5

8

15

20

3

Ω

= 2.4V, I = 15 mA

IN

4.0

11

Ω

= 2.4V, I = 15 mA

IN

I

Quiescent Supply Current

5.5

µA

mA

= V or GND, I

= 0

CC

OUT

∆ I

Increase in I per Input

5.5

2.5

One input at 3.4V

Other inputs at V or GND

CC

Note 4: Typical values are at V = 5.0V and T = +25°C

CC

A

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

= −40 °C to +85 °C,

A

C

= 50pF, RU = RD = 500Ω

L

Symbol

Parameter

Units

Conditions

Figure No.

V

= 4.5 – 5.5V

V

= 4.0V

CC

Min

Max

Min

Max

t

,t

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V = OPEN

Figure 1

Figure 2

PHL PLH

I

, t

1.5

5.9

6.0

6.4

V = 7V for t

PZL

Figure 1

Figure 2

PZH PZL

I

V = OPEN for t

I

PZH

PHZ

t

, t

Output Disable Time

5.7

ns

V = 7V for t

PLZ

Figure 1

Figure 2

PHZ PLZ

I

V = OPEN for t

I

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

Parameter

Control Pin Input Capacitance

Input/Output Capacitance

Typ

3

Max

Units

pF

Conditions

= 5.0V

C

V

IN

CC

C

5

pF

, OE = 5.0V

I/O

CC

Note 7: T = +25°C, f = 1 MHz, Capacitance is characterized but not tested.

A

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C includes load and stray capacitance

L

Note: Input PRR = 1.0 MHz t = 500 ns

W

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA20

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

5

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

September 1997

Revised December 1999

FST3253

Dual 4:1 Multiplexer/Demultiplexer Bus Switch

General Description

Features

The Fairchild Switch FST3253 is a dual 4:1 high-speed

CMOS TTL-compatible multiplexer/demultiplexer bus

switch. The low on resistance of the switch allows inputs to

be connected to outputs without adding propagation delay

or generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

When OE is LOW, S₀and S₁connect the A Port to the

selected B Port output. When OE is HIGH, the switch is

OPEN and a high-impedance state exists between the two

ports.

Ordering Code:

Order Number

FST3253M

Package Number

M16A

Package Description

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

FST3253QSC

FST3253MTC

MQA16

MTC16

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

S₁

S₀

OE₁

OE₂

Function

Disconnect 1A

Disconnect 2A

A = B₁

Pin Descriptions

X

L

X

L

H

X

L

X

H

L

Pin Name

Description

OE₁, OE₂

S₀, S₁

Bus Switch Enables

Select Inputs

Bus A

L

H

L

A = B₂

H

A = B₃

A

H

A = B₄

B₁, B₂, B₃, B₄

Bus B

DS500058

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN)(Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0ns/V to 5ns/V

0ns/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to −85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

High Level Input Voltage

Low Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

0 ≤A, B ≤V_CC

I_OZ

R_ON

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

15

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T_A= −40 °C to +85 °C

C_L= 50pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V _CC= 4.0V

V

Min

Max

0.25

5.3

Min

Max

0.25

6.3

t

_PHL,t_PLH

t_PZH, t_PZL

t_PHZ, t_PLZ

Prop Delay Bus to Bus (Note 6)

Prop Delay, Select to Bus A

V_I= OPEN

Figure 1

Figure 2

ns

1.0

Output Enable Time, Select to Bus B

Output Enable Time, I_OEto Bus A, B

Output Disable Time., Select to Bus B

Output Disable Time, I_OEto Bus A, B

5.3

6.0

V_I= 7V for t_PZL

Figure 1

Figure 2

5.3

6.2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

5.8

6.2

Figure 1

Figure 2

5.5

6.2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

Parameter

Typ

Max

Units

Conditions

V_CC= 5.0V

C_IN

C_I/O

Control Pin Input Capacitance

3

13

5

pF

A Port

B Port

Input/Output Capacitance

V_CC, OE = 5.0V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M16A

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA16

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

September 1997

Revised December 1999

FST3257

Quad 2:1 Multiplexer/Demultiplexer Bus Switch

General Description

Features

The Fairchild Switch FST3257 is a quad 2:1 high-speed

CMOS TTL-compatible multiplexer/demultiplexer bus

switch. The low on resistance of the switch allows inputs to

be connected to outputs without adding propagation delay

or generating additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

When OE is LOW, the select pin connects the A Port to the

selected B Port output. When OE is HIGH, the switch is

OPEN and a high-impedance state exists between the two

ports.

Ordering Code:

Order Number

FST3257M

Package Number

M16A

Package Description

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

FST3257QSC

FST3257MTC

MQA16

MTC16

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Pin Descriptions

Truth Table

Pin Name

Description

S

X

L

OE

H

Function

Disconnect

A = B₁

OE

S

Bus Switch Enable

Select Input

Bus A

L

A

B₁–B₂

Bus B

H

L

A = B₂

DS500057

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN)(Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

0 ≤A, B ≤V_CC

I_OZ

R_ON

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

15

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85°C,

_L= 50 pF, RU = RD = 500Ω

_CC= 4.5 – 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

0.25

4.7

Min

Max

0.25

5.2

t

_PHL,t_PLHProp Delay Bus to Bus (Note 6)

Prop Delay, Select to Bus A

Figure 1

Figure 2

ns

V_I= OPEN

1.0

t_PZH, t_PZLOutput Enable Time, Select to Bus B

5.2

5.7

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

Output Enable Time, OE to Bus A, B

t_PHZ, t_PLZOutput Disable Time, Select to Bus B

Output Disable Time, Output Enable Time,

OE to Bus A, B

1.0

1.5

5.1

5.2

5.5

5.6

5.5

V_I= 7V for t_PLZ

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

Parameter

Typ

Max

Units

Conditions

V_CC= 5.0V

C_IN

Control Pin Input Capacitance

3

pF

C_I/O

A Port Input/Output Capacitance

B Port

7

5

pF

V_CC, OE = 5.0V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M16A

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA16

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

June 1997

Revised December 1999

FST3345

8-Bit Bus Switch

General Description

Features

The Fairchild Switch FST3345 provides 8-bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

The device is organized as an 8-bit switch bank with dual

output enable inputs (OE and OE). When OE is LOW or

OE is HIGH, the switch is ON and Port A is connected to

Port B. When OE is HIGH and OE is LOW, the switch is

OPEN and a high-impedance state exists between the two

ports.

Ordering Code:

Order Number

FST3345WM

FST3345QSC

FST3345MTC

Package Number

M20B

Package Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA20

MTC20

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Pin Descriptions

Truth Table

Pin Name

Description

Inputs

Function

OE, OE

Bus Switch Enables

Bus A

OE

X

OE

L

A

B

Connect

Bus B

H

X

L

H

Disconnect

DS500019

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0–5.5

5.5

−1.2

V

I_IN= -18mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

0 ≤A, B ≤V_CC

I_OZ

R_ON

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

15

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

C_L= 50 pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 − 5.5V _CC= 4.0V

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH, t_PZL

1.5

1.0

6.5

8.0

7.0

8.2

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Control Pin Input Capacitance

Input/Output Capacitance

Typ

4

Max

Units

pF

Conditions

_CC= 5.0V

V_CC, OE = 5.0V, OE = 0V

V

5

pF

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz t_W= 500 nS

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA20

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

5

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

December 1993

Revised May 1999

FST3383

10-Bit Low Power Bus-Exchange Switch

General Description

Features

The FST3383 provides two sets of high-speed CMOS TTL-

compatible bus switches. The low on resistance of the

switch allows inputs to be connected to outputs without

adding propagation delay or generating additional ground

bounce noise. The device operates as a 10-bit bus switch

or a 5-bit bus exchanger. The bus exchange (BX) signal

provides nibble swapping of the AB and CD pairs of sig-

nals. This exchange configuration allows byte swapping of

buses in systems. It can also be used as a quad 2-to-1

multiplexer and to create low delay barrel shifters. The bus

enable (BE) signal turns the switches ON.

■ 5Ω switch connection between two ports

■ Zero propagation delay

■ Ultra low power with 0.2 µA typical I_CC

■ Zero ground bounce in flow-through mode

■ Control inputs compatible with TTL level

Ordering Code:

Order Number

FST3383WM

FST3383QSC

FST3383MTC

Package Number

M24B

Package Description

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA24

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Pin Descriptions

Truth Table

Pin Names

Description

A₀–A₄

B₀–B₄

BE BX

Function

Bus Switch Enable

BE

H

L

X

L

High-Z State High-Z State Disconnect

BX

Bus Exchange

Buses A, B

C₀–C₄

D₀– D₄

C₀–C₄

Connect

A₀–A₄, B₀–B₄

C₀–C₄, D₀–D₄

H

D₀–D₄

Exchange

Buses C, D

DS011652.prf

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions

Supply Voltage (V_CC

)

−0.5V to +7.0V

DC Switch Voltage (V_S)

Supply Voltage (V_CC

)

4.0V to 5.5V

DC Input Voltage (V_I) (Note 2)

Free Air Operating Temperature (T_A)

−40°C to +85°C

DC Input Diode Current (I_IN

with V_I< 0

)

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

−20 mA

120 mA

DC Output (I_O) Sink Current

Storage Temperature Range (T_STG

Power Dissipation

)

−65°C to +150°C

0.5W

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

DC Electrical Characteristics

T

= −40°C to +85°C

A

V

(V)

CC

Symbol

Parameter

Units

Conditions

Min

Typ

Max

(Note 3)

V

Maximum Clamp Diode Voltage

Minimum High Level Input Voltage

Maximum Low Level Input Voltage

Maximum Input

4.75

4.75–5.25

0

−1.2

V

I

= −18 mA

IN

IK

2.0

IH

IL

0.8

10

V

I

µA

0 ≤ V ≤ 5.25V

IN

Leakage Current

5.25

±1

I

Maximum 3-STATE I/O Leakage

Short Circuit Current

5.25

±10

µA

mA

Ω

0 ≤ A, B ≤ V

CC

OZ

OS

4.75

100

V (A), V (B) = 0V, V (B), V (A) = 4.75V

I I I I

R

Switch On Resistance (Note 4)

4.75

5

7

V = 0V, I = 30 mA

I ON

ON

10

0.2

15

10

2.5

Ω

V = 2.4V, I = 15 mA

I ON

I

Maximum Quiescent Supply Current

5.25

µA

mA

V = V , GND, I = 0

CC

I

CC

O

∆I

Increase in I per Input (Note 5)

V

= 3.15V, I = 0, Per Control Input

O

CC

IN

Note 3: All typical values are at V = 5.0V, T = 25°C.

CC

A

Note 4: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on

the two (A or B) pins.

Note 5: Per TTL driven input (V = 3.15V, control inputs only). A and B pins do not contribute to I

.

CC

IN

www.fairchildsemi.com

2

AC Electrical Characteristics

T

= −40°C to +85°C, C = 50 pF

L

A

V

(V)

CC

Symbol

Parameter

Units

ns

Min

Typ

Max

(Note 6)

t

,

Data Propagation Delay

to C , D or B to D , C (Note 7)

4.75

0.25

6.5

PLH

PHL

PLH

PHL

A

n

Switch Exchange Time

BX to A , B , C , D

4.75

1.5

ns

n

,

Switch Enable Time

BE to A , B , C or D

n

6.5

ns

PZL

PZH

n

,

Switch Disable Time

BE to A , B , C , or D

n

5.5

ns

PLZ

PHZ

n

Note 6: All typical values are at V = 5.0V, T = 25°C.

CC

A

Note 7: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On resis-

tance of the switch and the load capacitance. The time constant for the switch and alone is of the order of 0.25 ns for 50 pF load. Since this time constant is

much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch when

used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.

Capacitance (Note 8)

Symbol

Parameter

Control Input Capacitance

Input/Output Capacitance

Typ

4

Max

6

Units

pF

Conditions

C

V

= 5.0V

IN

CC

(OFF)

9

13

pF

I/O

Note 8: Capacitance is characterized but not tested.

On-Resistance (R_ON) vs Input Voltage

(V_CC= 5.0V)

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA24

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

September 1997

Revised December 1999

FST3384

10-Bit Low Power Bus Switch

General Description

Features

■ 4Ω switch connection between two ports

■ Minimal propagation delay through the switch

■ Ultra low power with < 0.1 µA typical I_CC

The Fairchild Switch FST3384 provides 10 bits of high-

speed CMOS TTL-compatible bus switches. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise. The device is organized

as two 5-bit switches with separate bus enable (OE) sig-

nals. When OE is LOW, the switch is ON and Port A is con-

nected to Port B. When OE is HIGH, the switch is OPEN

and a high-impedance state exists between the two ports.

■ Zero ground bounce in flow-through mode

■ Control inputs compatible with TTL level

Ordering Code:

Order Number

FST3384WM

FST3384QSC

FST3384MTC

Package Number

M24B

Package Description

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA24

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Pin Descriptions

Pin Names

Description

OEA OEB

B₀–B₄

B₅–B₉

Function

OEA, OEB

Bus Switch Enable

Bus A

Bus B

L

H

L

A₀–A₄

HIGH-Z State A₅–A₉

A₅–A₉

Connect

A₀–A₉

B₀–B₉

HIGH-Z State

H

HIGH-Z State HIGH-Z State Disconnect

DS500046

www.fairchildsemi.com

Print form created on December 13, 1999 4:03

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−50 mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (I_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128 mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150°C

Switch I/O

Free Air Operating Temperature (T_A)

−40°C to +85°C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the “Electrical

Characteristics” table are not guaranteed at the absolute maximum ratings.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40°C to +85°C

V_CC

(V)

Symbol

Parameter

Units

Condition

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

4.5

4.0-5.5

5.5

−1.2

V

I_IN= − 18mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0 ≤ V_IN≤ 5.5V

0 ≤ A, B ≤ V_CC

I_OZ

R_ON

5.5

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

15

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: All typical values are at V_CC= 5.0V, T_A= 25°C.

Note 5: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on

the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40°C to +85°C

_L= 50 pF, RU = RD = 500Ω

_CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 − 5.5V

V

Min

Max

Min

Max

t

_PHL, t_PLH

Prop Delay Bus to Bus (Note 6)

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH, t_PZL

Output Enable Time

OE_A, OE_Bto An, Bn

Output Disable Time

OE_A, OE_Bto An, Bn

1.0

1.5

5.7

5.2

6.2

5.5

V_I= 7V for t_PZL

Figure 1

Figure 2

V_I= OPEN for t_PZH

I_I= 7V for t_PLZ

t_PHZ, t_PLZ

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 6: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O(OFF)

Parameter

Control Input Capacitance

Input/Output Capacitance

Typ

3

Max

6

Units

pF

Conditions

_CC= 5.0V

V_CC, OE = 5.0V

V

5

13

pF

Note 7: Capacitance is characterized but not tested.

AC Loading and Waveforms

FST3384 V_INvs R_ON(Typ)

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 nS

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA24

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

February 1998

FST3384A

10-Bit Low Power Extended Input Voltage Bus Switch

Typical applications include IDE bus connector interfaces,

PCI card interfaces, backplane card interfaces, and other

noisy environments where switches are needed.

General Description

The FST3384A provides 10 bits of high-speed CMOS

TTL-compatible bus switches. The low on resistance of the

switch allows inputs to be connected to outputs without add-

ing propagation delay or generating additional ground

bounce noise. The device is organized as two 5-bit switches

with separate bus enable (BE ) signals. When BE is low, the

switch is on and port A is connected to port B. When BE is

high, the switch is open and a high-impedance state exists

between the two ports.

Features

n Extended input voltage design tolerates input

undershoots up to −1.5V

n 10Ω switch connection between two ports

n Ultra low power with 2 µA typical I_CC

n Zero ground bounce in flow-through mode

n Control inputs compatible with TTL level

n Available in SOIC, QSOP and TSSOP

The FST3384A 10-bit bus switch is pin-for-pin and function

compatible with the FST3384 device. It has the added fea-

ture of allowing extended negative input voltages on the I/O

pins. The FST3384A bus switch, unlike most bus switches

on the market, will not falsely turn on when BE is high and

negative undershoot voltages are encountered on the I/O

pins. Thus it is “undershoot hardened” (see related applica-

tion note) tolerating undershoots up to −1.5V.

Ordering Code:

Order Number

FST3384AQSC

FST3384AMTC

Package Number

MQA24

Package Description

24-Lead (0.150" Wide) Shrink Small Outline Package, QSOP

24-Lead Thin Small Outline Package, TSSOP

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Pin Assignment

SOIC, QSOP and TSSOP

DS012481-1

DS012481-2

DS012481

www.fairchildsemi.com

Pin Descriptions

Truth Table

Pin Names

BE A, BE B

A₀–A₉

Description

Bus Switch Enable

Bus A

B₀–B₉

Bus B

BE A

BE B

B₀–B₄

A₀–A₄

B₅–B₉

A₅–A₉

Function

Connect

L

H

L

A₀–A₄

HIGH-Z State

A₅–A₉

Connect

H

HIGH-Z State

Connect

H

HIGH-Z State

Disconnect

www.fairchildsemi.com

2

Absolute Maximum Ratings (Note 1)

Recommended Operating

Conditions

Supply Voltage (V_CC

)

−0.5V to +7.0V

−0.5 to +7.0V

−20 mA

DC Switch Voltage (V_S)

Supply Voltage (V_CC

)

4.0V to 5.5V

DC Input Input Voltage (V_I) (Note 2)

Free Air Operating Temperature (T_A)

−40˚C to +85˚C

<

DC Input Diode Current with (V_I0)

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be op-

erated at these limits. The parametric values defined in the Electrical Charac-

teristics tables are not guaranteed at the absolute maximum ratings. The

“Recommended Operating Conditions” table will define the conditions for ac-

tual device operation.

DC Output (I_O) Sink Current

120 mA

Storage Temperature Range (T_STG

Power Dissipation

)

−65˚C to +150˚C

0.5W

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

DC Electrical Characteristics

=

Symbol

Parameter

V_CC

(V)

T_A−40˚C to +85˚C

Units

Conditions

Min

Typ

Max

(Note 5)

=

V_IK

V_IH

V_IL

I_IN

Maximum Clamp

4.75

−1.2

V

I_IN−18 mA

Diode Voltage

Minimum High

4.75–5.25

2.0

Level Input Voltage

Maximum Low

0.8

10

Level Input Voltage

Maximum Input

Leakage Current

Maximum 3-STATE

I/O Leakage

0

µA

0 ≤ V_IN≤ 5.25V

0 ≤ A, B ≤ V_CC

±

5.25

1

±

I_OZ

10

=

V_I(A), V_I(B) 0V,

I_OS

Short Circuit Current

4.75

5.25

100

mA

=

V_I(B), V_I(A) 4.75V

= =

V_I0V, I_ON30 mA

R_ON

Switch On

6

12

Ω

= =

V_I2.4V, I_ON15 mA

Resistance (Note 3)

Maximum Quiescent

Supply Current

Increase in I_CC

15

0.2

25

10

=

V_IV_CC, GND

I_CC

µA

=

I_O

0

=

0

∆I_CC

2.5

mA

V_IN3.15V, I_O

Per Control Input

per Input (Note 4)

Note 3: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on the two

(A or B) pins.

=

Note 4: Per TTL driven Input (V

IN

3.15V, control inputs only). A and B pins do not contribute to I .

CC

=

25˚C.

Note 5: All typical values are at V

5.0V, T

CC

A

3

www.fairchildsemi.com

AC Electrical Characteristics

=

Symbol

Parameter

V_CC

(V)

T_A−40˚C to +85˚C

Units

=

C_L50 pF

Min

Typ

Max

(Note 6)

t_PLH

Data Propagation Delay

A_nto B_nor B_nto A_n

(Note 7)

t_PHL

4.75

0.50

6.8

ns

t_PZL

t_PZH

t_PLZ

t_PHZ

Switch Enable Time

BE A, BE B to A_n, B_n

Switch Disable Time

BE A, BE B to A_n, B_n

1.5

6.0

=

25˚C.

Note 6: All typical values are at V

5.0V, T

CC

A

Note 7: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On resistance of

the switch and the load capacitance. The time constant for the switch and alone is of the order of 0.5 ns for 50 pF load. Since this time constant is much smaller than

the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined

by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.

Capacitance (Note 8)

Symbol

Parameter

Control Input Capacitance

Input/Output Capacitance

Typ

4

Max

6

Units

pF

Conditions

=

V_CC5.0V

C_IN

C_I/O(OFF)

=

V_CC5.0V

9

13

pF

Note 8: Capacitance is characterized but not tested.

FST3384A V_INvs R_ON(Typ)

DS012481-3

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead (0.150" Wide) Shrink Small Outline Package, JEDEC (QSC)

(also known as QSOP)

Package Number MQA24

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Small Outline Package, JEDEC (MTC)

Package Number MTC24

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-

VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-

CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys-

tems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, and (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can

be reasonably expected to result in a significant injury

to the user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

Fairchild Semiconductor

Corporation

Fairchild Semiconductor

Europe

Fairchild Semiconductor

Hong Kong Ltd.

National Semiconductor

Japan Ltd.

Americas

Customer Response Center

Tel: 1-888-522-5372

Fax: +49 (0) 1 80-530 85 86

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 8 141-35-0

13th Floor, Straight Block,

Ocean Centre, 5 Canton Rd.

Tsimshatsui, Kowloon

Hong Kong

Tel: 81-3-5620-6175

Fax: 81-3-5620-6179

English Tel: +44 (0) 1 793-85-68-56

Italy

Tel: +39 (0) 2 57 5631

Tel: +852 2737-7200

Fax: +852 2314-0061

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

June 1997

Revised December 1999

FST6800

10-Bit Bus Switch with Pre-Charged Outputs

General Description

Features

The Fairchild Switch FST6800 provides 10-bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise. The device precharges

the B Port to a selectable bias voltage (BiasV) to minimize

live insertion noise.

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Output precharge to minimize live insertion noise.

■ Control inputs compatible with TTL level.

The device is organized as a 10-bit switch with a bus

enable (OE) signal. When OE is LOW, the switch is ON

and Port A is connected to Port B. When OE is HIGH, the

switch is OPEN and the B Port is precharged to BiasV

through an equivalent 10-kΩ resistor.

Ordering Code:

Order Number

FST6800WM

FST6800QSC

FST6800MTC

Package Number

M24B

Package Description

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA24

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Pin Descriptions

Pin Name

Description

OE

B₀–B₉

Function

OE

A

Bus Switch Enable

Bus A

L

A₀–A₉

BiasV

Connect

H

Precharge

B

Bus B

DS500022

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−0.5V to +6.0V

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Precharge Supply (BiasV)

)

4.0V to 5.5V

1.5V to V_CC

0V to 5.5V

Bias V Voltage Range

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN<0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 4)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

Output Current

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

2.0

0.8

V

±1.0

µA

mA

µA

Ω

0≤ V_IN≤5.5V

I_O

4.5

0.25

BiasV = 2.4V, B = 0

0 ≤A ≤V_CC

I_OZ

R_ON

OFF-STATE Leakage Current

Switch On Resistance

(Note 5)

5.5

±1.0

7

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

15

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

mA

∆ I_CC

5.5

2.5

One input at 3.4V

Other inputs at V_CCor GND

Note 4: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

AC Electrical Characteristics

T_A= −40 °C to +85 °C,

C_L= 50pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V

V_CC= 4.0V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V_I= OPEN

Figures 1,

2

t_PZH

t_PZL

t_PHZ

t_PLZ

1.5

6.2

6.1

7.3

6.5

6.8

ns

V_I= OPEN, BiasV = GND

V_I= 7V, BiasV = 3V

Figure 1

Figure 2

Output Disable Time

V_I= OPEN, BiasV = GND

V_I= 7V, BiasV = 3V

Figure 1

Figure 2

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

Parameter

Typ

Max

Units

Conditions

V_CC= 5.0V

Control Pin Input Capacitance

3

pF

C_I/O

Input/Output Capacitance

5

pF

V_CC, OE = 5.0V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA24

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

Preliminary

August 1999

Revised December 1999

FSTD16211

24-Bit Bus Switch with Level Shifting (Preliminary)

General Description

Features

The Fairchild Switch FSTD16211 provides 24-bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise. A diode to V_CChas been

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

integrated into the circuit to allow for level shifting between

5V inputs and 3.3V outputs.

The device is organized as a 12-bit or 24-bit bus switch.

When OE₁is LOW, the switch is ON and Port 1A is con-

nected to Port 1B. When OE₂is LOW, Port 2A is connected

to Port 2B. When OE_1/2is HIGH, a high impedance state

exists between the A and B Ports.

Ordering Code:

Order Number

Package Number

Package Description

FSTD16211MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Inputs

Inputs/Outputs

Pin Descriptions

OE₁

OE₂

1A, 1B

2A, 2B

Pin Name

Description

L

H

L

1A = 1B

2A = 2B

OE₁, OE₂

1A, 2A

Bus Switch Enables

Bus A

1A = 1B

Z

2A = 2B

Z

H

Z

1B, 2B

Bus B

H

DS500313

www.fairchildsemi.com

Preliminary

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 4)}

−0.5V to +7.0V

Supply Voltage (V_CC

)

DC Switch Voltage (V_S) (Note 2)

−0.5V to +7.0V Power Supply Operating (V_CC)

4.0V to 5.5V

0V to 5.5V

DC Input Control Pin Voltage (V_IN)(Note 3)

DC Input Diode Current (l_IK) V_IN< 0V

−0.5V to +7.0V Input Voltage (V_IN

)

−50mA

Output Voltage (V_OUT

)

DC Output (I_OUT

DC V_CC/GND Current (I_CC/I_GND

Storage Temperature Range (T_STG

)

128mA Input Rise and Fall Time (t_r, t_f)

)

+/− 100mA

−65°C to +150 °C

Switch Control Input

Switch I/O

0nS/V to 5nS/V

0nS/V to DC

)

Free Air Operating Temperature (T_A)

-40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: V_Sis the voltage observed/applied at either A or B Ports across the

switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 4: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Min

Typ

Max

(Note 5)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

V_OH

I_I

2.0

0.8

V

See Figure 3

V

Input Leakage Current

±1.0

10

µA

Ω

0≤ V_IN≤5.5V

_IN= 5.5V

0 ≤A, B ≤V_CC

0

V

I_OZ

OFF-STATE Leakage Current

Switch On Resistance

(Note 6)

5.5

±1.0

7

R_ON

4.5

4

V_IN= 0V, I_IN= 64mA

V_IN= 0V, I_IN= 30mA

V_IN= 2.4V, I_IN= 15mA

4.5

7

Ω

4.5

35

50

Ω

4.0

TBD

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

OE₁= OE₂= GND

_IN= V_CCor GND, I_OUT= 0

OE₁= OE₂= V_CC

_IN= V_CCor GND, I_OUT= 0

1.5

10

mA

µA

V

5.5

V

∆ I_CC

One input at 3.4V

2.5

mA

Other inputs at V_CCor GND

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

www.fairchildsemi.com

2

Preliminary

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

C_L= 50pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V _CC= 4.0V

V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 7)

Output Enable Time

0.25

ns

V_I= OPEN

V_I= 7V for t_PZL

Figure 1

Figure 2

t_PZH, t_PZL

1.5

10.0

9.0

11.0

10.0

Figure 1

Figure 2

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

t_PHZ, t_PLZ

Output Disable Time

ns

Figure 1

Figure 2

V_I= OPEN for t_PHZ

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical ON

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 8)

Symbol

Parameter

Control Pin Input Capacitance

Input/Output Capacitance

Typ

3

Max

Units

pF

Conditions

_CC= 5.0V

V_CC, OE = 5.0V

C_IN

V

C_I/O

6

pF

Note 8: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50Ω source terminated in 50Ω

Note: CL includes load and stray capacitance

Note: Input PRR = 1.0 MHz, T_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Preliminary

Output Voltage HIGH vs. Supply Voltage

FIGURE 3.

www.fairchildsemi.com

4

Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

May 1999

Revised November 1999

FSTU32160

16-Bit to 32-Bit

Multiplexer/Demultiplexer Bus Switch with

−2V Undershoot Hardened Circuit (UHC ) Protection

General Description

Features

■ Undershoot hardened to −2V (A and B Ports).

■ Slower Output Enable times prevent signal disruption

■ 4Ω switch connection between two ports.

The Fairchild Switch FSTU32160 is a 16-bit to 32-bit high-

speed CMOS TTL-compatible multiplexer/demultiplexer

bus switch. The low on resistance of the switch allows

inputs to be connected to outputs without adding propaga-

tion delay or generating additional ground bounce noise.

■ Minimal propagation delay through the switch.

■ Low l_CC

.

The device can be used in applications where two buses

need to be addressed simultaneously. The FSTU32160 is

designed so that the A Port demultiplexes into B₁or B₂or

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

■ See Applications Note AN-5008 for details

both. The A and B Ports are “undershoot hardened” with

UHC protection to support an extended range to 2.0V

below ground. Fairchild’s integrated Undershoot Hardened

Circuit, UHC senses undershoot at the I/O’s, and responds

by preventing voltage differentials from developing and

turning on the switch.

Two select (SEL₁, SEL₂) inputs provide switch enable con-

trol. When SEL₁, SEL₂are HIGH, the device precharges

the B Port to a selectable bias voltage (Bias V) to minimize

live insertion noise.

Ordering Code:

Order Number

Package Number

Package Description

FSTU32160MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

UHC is a trademark of Fairchild Semiconductor Corporation.

DS500244

www.fairchildsemi.com

Connection Diagram

Pin Descriptions

Pin Name

SEL₁, SEL₂

A

Description

Select Inputs

Bus A

B₁, B₂

Bus B

Truth Table

Inputs

Function

SEL₁

SEL₂

L

H

L

H

L

x A = x B₁

x A = x B₂

L

x A = x B₁and x B₂

x B₁, x B₂= BiasV

H

Logic Diagram

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 4)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−2.0V to +7.0V

−0.5V to +7.0V

DC Switch Voltage (V_S) (Note 2)

BiasV Voltage Range

Power Supply Operating (V_CC

Precharge Supply (BiasV)

)

4.0V to 5.5V

1.5 to V_CC

0V to 5.5V

DC Input Control Pin Voltage

(V_IN) (Note 3)

Input Voltage (V_IN

)

−0.5V to +7.0V

−50 mA

Output Voltage (V_OUT

)

DC Input Diode Current (l_IK) V_IN< 0V

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC Output Current (I_OUT

DC V_CC/GND Current (I_CC/I_GND

Storage Temperature Range (T_STG

)

128 mA

0nS/V to 5nS/V

0nS/V to DC

)

+/− 100 mA

−65°C to +150 °C

Switch I/O

)

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: V_Sis the voltage observed/applied at either the A or B Ports across

the switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 4: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

Symbol

Parameter

V_CC

Units

Conditions

Min

Typ

Max

(V)

4.5

(Note 5)

V_IK

Clamp Diode Voltage

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

4.0–5.5

5.5

2.0

0.8

±1.0

10

V

µA

mA

0 ≤ V_IN≤ 5.5V

_IN= 5.5V

BiasV = 2.4V, SEL_X= 2.0V

_X= 0

0

V

I_O

Output Current

4.5

0.25

B

I_OZH, I_OZLOFF-STATE Leakage Current

5.5

±1.0

µA

0 ≤ A, ≤ V_CC, V

BiasV₁= BiasV₂= 5.5V

0 ≤ B, ≤ V_CC, V

BiasV₁= BiasV₂= FLOATING

R_ON

Switch On Resistance

(Note 6)

4.5

4.0

5.5

4

7

Ω

V

_IN= 0V, I_IN= 64 mA

_IN= 0V, I_IN= 30 mA

8

14

20

3

Ω

_IN= 2.4V, I_IN= 15 mA

_IN= V_CCor GND, I_OUT= 0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

µA

mA

∆ I_CC

2.5

One input at 3.4V

Other inputs at V_CCor GND

SEL₁, SEL₂= 0V

I_BIAS

Bias Pin Leakage Current

Voltage Undershoot

5.5

±1.0

−2.0

µA

B_X= 0V, BiasV_X= 5.5V

V_IKU

V

0.0 mA ≥ I_IN≥ −50 mA

SEL₁, SEL₂= 5.5V

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

3

www.fairchildsemi.com

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

_L= 50 pF, RU= RD = 500Ω

_CC= 4.5 − 5.5V _CC= 4.0V

C

Symbol

Parameter

Units

Conditions

Figure No.

V

Min

Max

Min

Max

t

_PHL, t_PLH

A or B, to B or A (Note 7)

0.25

ns

V_I= OPEN

Figure 2

Figure 3

t_PZH

t_PZL

t_PHZ

t_PLZ

Output Enable Time,

SEL to A, B

V_I= OPEN for t_PZH

BiasV = GND

Figure 2

Figure 3

7.0

1.0

30.0

6.9

35.0

7.3

ns

Output Enable Time,

SEL to A, B

V_I= 7V for t_PZL

BiasV = 3V

Figure 2

Figure 3

Output Disable Time,

SEL to A, B

V_I= OPEN for t_PHZ

BiasV = GND

Figure 2

Figure 3

Output Disable Time,

SEL to A, B

V_I= 7V for t_PLZ

BiasV = 3V

,

Figure 2

Figure 3

7.7

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 8)

Symbol

Parameter

Typ

Max

Units

Conditions

V_CC= 5.0V

C_IN

C_{I/O OFF}

Control pin Input Capacitance

4

8

pF

Input/Output Capacitance “OFF State”

V_CC= 5.0V, Switch OFF

Note 8: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

Undershoot Characteristic (Note 9)

Symbol

V_OUTU

Parameter

Min

Typ

Max

Units

Conditions

Output Voltage During Undershoot

2.5

V

_OH− 0.3

V

Figure 1

Note 9: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage

undershoot event.

FIGURE 1.

Device Test Conditions

Transient

Input Voltage (V ) Waveform

IN

Parameter

Value

see Waveform

100K

Units

V_IN

V

Ω

V

R₁= R₂

V_TRI

11.0

V_CC

5.5

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4

AC Loading and Waveforms

Note: Input driven by 50Ω source terminated in 50Ω

Note: C_Lincludes load and stray capacitance, C_L= 50 pF

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 2. AC Test Circuit

FIGURE 3. AC Waveforms

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

June 1999

Revised November 1999

FSTU32160A

16-Bit to 32-Bit

Multiplexer/Demultiplexer Bus Switch with

−2V Undershoot Hardened Circuit (UHC ) Protection

General Description

Features

■ Undershoot hardened to −2V (A and B Ports).

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

The Fairchild Switch FSTU32160A is a 16-bit to 32-bit

high-speed CMOS TTL-compatible multiplexer/demulti-

plexer bus switch. The low on resistance of the switch

allows inputs to be connected to outputs without adding

propagation delay or generating additional ground bounce

noise.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

The device can be used in applications where two buses

need to be addressed simultaneously. The FSTU32160A is

designed so that the A Port demultiplexes into B₁or B₂or

■ Control inputs compatible with TTL level.

■ See Applications Note AN-5008 for details

both. The A and B Ports are “undershoot hardened” with

UHC protection to support an extended range to 2.0V

below ground. Fairchild’s integrated Undershoot Hardened

Circuit, UHC senses undershoot at the I/O’s, and responds

by preventing voltage differentials from developing and

turning on the switch.

Two select (SEL₁, SEL₂) inputs provide switch enable con-

trol. When SEL₁, SEL₂are HIGH, the device precharges

the B Port to a selectable bias voltage (Bias V) to minimize

live insertion noise.

Ordering Code:

Order Number Package Number

Package Description

FSTU32160AMTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

UHC is a trademark of Fairchild Semiconductor Corporation.

DS500258

www.fairchildsemi.com

Connection Diagram

Pin Descriptions

Pin Name

SEL₁, SEL₂

A

Description

Select Inputs

Bus A

B₁, B₂

Bus B

Truth Table

Inputs

Function

SEL₁

SEL₂

L

H

L

H

L

x A = x B₁

x A = x B₂

L

x A = x B₁and x B₂

x B₁, x B₂= BiasV

H

Logic Diagram

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 4)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−2.0V to +7.0V

−0.5V to +7.0V

DC Switch Voltage (V_S) (Note 2)

BiasV Voltage Range

Power Supply Operating (V_CC

Precharge Supply (BiasV)

)

4.0V to 5.5V

1.5 to V_CC

0V to 5.5V

DC Input Control Pin Voltage

(V_IN) (Note 3)

Input Voltage (V_IN

)

−0.5V to +7.0V

−50 mA

Output Voltage (V_OUT

)

DC Input Diode Current (l_IK) V_IN< 0V

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC Output Current (I_OUT

DC V_CC/GND Current (I_CC/I_GND

Storage Temperature Range (T_STG

)

128 mA

0nS/V to 5nS/V

0nS/V to DC

)

+/− 100 mA

−65°C to +150 °C

Switch I/O

)

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: V_Sis the voltage observed/applied at either the A or B Ports across

the switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 4: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

Symbol

Parameter

V_CC

Units

Conditions

Min

Typ

Max

(V)

4.5

(Note 5)

V_IK

Clamp Diode Voltage

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

4.0–5.5

5.5

2.0

0.8

±1.0

10

V

µA

mA

0 ≤ V_IN≤ 5.5V

_IN= 5.5V

BiasV = 2.4V

_X= 0

0

V

I_O

Output Current

4.5

0.25

B

I_OZH, I_OZLOFF-STATE Leakage Current

5.5

±1.0

µA

0 ≤ A ≤ V_CC, V

BiasV₁= BiasV₂= 5.5V

0 ≤ B ≤ V_CC, V

BiasV₁= BiasV₂= Floating

R_ON

Switch On Resistance

(Note 6)

4.5

4.0

5.5

4

7

Ω

V

_IN= 0V, I_IN= 64 mA

_IN= 0V, I_IN= 30 mA

8

14

20

3

Ω

_IN= 2.4V, I_IN= 15 mA

_IN= V_CCor GND, I_OUT= 0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

µA

mA

∆ I_CC

2.5

One input at 3.4V

Other inputs at V_CCor GND

SEL₁, SEL₂= 0V

I_BIAS

Bias Pin Leakage Current

Voltage Undershoot

5.5

±1.0

−2.0

µA

B_X= 0V, BiasV_X= 5.5V

V_IKU

V

0.0 mA ≥ I_IN≥ −50 mA

SEL₁, SEL₂= 5.5V

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

3

www.fairchildsemi.com

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

C_L= 50 pF, RU= RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 − 5.5V _CC= 4.0V

V

Min

Max

Min

Max

t

_PHL, t_PLH

A or B, to B or A (Note 7)

0.25

ns

V_I= OPEN

Figure 2

Figure 3

t_PZH

t_PZL

t_PHZ

t_PLZ

Output Enable Time,

SEL to A, B

V_I= OPEN for t_PZH

BiasV = GND

V_I= 7V for t_PZL

BiasV = 3V

Figure 2

Figure 3

0.5

1.0

4.0

4.8

5.9

7.4

4.5

5.5

6.9

7.0

ns

Output Enable Time,

SEL to A, B

Figure 2

Figure 3

Output Disable Time,

SEL to A, B

V_I= Open for t_PHZ

BiasV = GND

V_I= 7V for t_PLZ

BiasV = 3V

Figure 2

Figure 3

Output Disable Time,

SEL to A, B

Figure 2

Figure 3

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).

Capacitance (Note 8)

Symbol

C_IN

C_{I/O OFF}

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

Control pin Input Capacitance

4

8

pF

V

Input/Output Capacitance “OFF State”

_CC= 5.0V, Switch OFF

Note 8: T_A= +25°C, f = 1 Mhz, Capacitance is characterized but not tested.

Undershoot Characteristic (Note 9)

Symbol

V_OUTU

Parameter

Min

Typ

Max

Units

Conditions

Output Voltage During Undershoot

2.5

V

_OH− 0.3

V

Figure 1

Note 9: This is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot

event.

FIGURE 1.

Device Test Conditions

Transient

Input Voltage (V ) Waveform

IN

Parameter

V_IN

Value

Units

See Waveform

100K

V

Ω

V

R₁- R₂

V_TRI

11.0

V_CC

5.5

www.fairchildsemi.com

4

AC Loading and Waveforms

Note: Input driven by 50Ω source terminated in 50Ω

Note: C_Lincludes load and stray capacitance, C_L= 50 pF

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 2. AC Test Circuit

FIGURE 3. AC Waveforms

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD56

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6

August 1999

Revised December 1999

FSTU3257

Quad 2:1 Multiplexer/Demultiplexer Bus Switch with

−2V Undershoot Hardened Circuit (UHC ) Protection

General Description

Features

■ Undershoot hardened to −2V (A and B Ports)

The Fairchild Switch FSTU3257 is a quad 2:1 high-speed

CMOS TTL-compatible multiplexer/demultiplexer bus

switch. The low on resistance of the switch allows inputs to

be connected to outputs without adding propagation delay

or generating additional ground bounce noise.

■ Soft enable turn-on to minimize bus to bus charge

sharing during enable

■ 4Ω switch connection between two ports.

■ Minimal propagation delay through the switch.

When OE is LOW, the select pin connects the A Port to the

selected B Port output. The A and B Ports are “undershoot

hardened” with UHC protection to support an extended

range of 2.0V below ground. Fairchild’s integrated Under-

shoot Hardened Circuit UHC senses undershoot at the I/O

and responds by preventing voltage differentials from

developing and turning on the switch. When OE is HIGH,

the switch is OPEN and a high-impedance state exists

between the two ports.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Control inputs compatible with TTL level.

■ See Applications Note AN-5008 for details

Ordering Code:

Order Number

FSTU3257QSC

FSTU3257MTC

Package Number

MQA16

Package Description

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MTC16

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

UHC is a trademark of Fairchild Semiconductor Corporation.

DS500302

www.fairchildsemi.com

Logic Diagram

Connection Diagram

Pin Descriptions

Truth Table

Pin Name

Description

S

X

L

OE

H

Function

Disconnect

A = B₁

OE

S

Bus Switch Enable

Select Input

Bus A

L

A

H

L

A = B₂

B₁–B₂

Bus B

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 4)}

−0.5V to +7.0V

Supply Voltage (V_CC

)

DC Switch Voltage (V_S) (Note 2)

−2.0V to +7.0V Power Supply Operating (V_CC

)

4.0V to 5.5V

0V to 5.5V

DC Input Control Pin Voltage (V_IN)(Note 3)

DC Input Diode Current (l_IK) V_IN<0V

−0.5V to +7.0V Input Voltage (V_IN

)

−50mA

Output Voltage (V_OUT

)

DC Output (I_OUT

DC V_CC/GND Current (I_CC/I_GND

Storage Temperature Range (T_STG

)

128mA Input Rise and Fall Time (t_r, t_f)

)

+/− 100mA

−65°C to +150 °C

Switch Control Input

Switch I/O

0nS/V to 5nS/V

0nS/V to DC

)

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: V_Sis the voltage observed/applied at either the A or B Ports across

the switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 4: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40 °C to +85 °C

V_CC

(V)

Symbol

Parameter

Units

Conditions

Typ

Min

Max

(Note 5)

V_IK

Clamp Diode Voltage

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

2.0

0.8

±1.0

7

V

µA

Ω

0≤ V_IN≤5.5V

0 ≤A, B ≤V_CC

I_OZ

R_ON

OFF-STATE Leakage Current

5.5

Switch On Resistance

(Note 6)

4.5

4

V

_IN= 0V, I_IN= 64mA

4.5

7

Ω

_IN= 0V, I_IN= 30mA

4.5

8

15

20

3

Ω

_IN= 2.4V, I_IN= 15mA

_IN= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

∆ I_CC

One input at 3.4V

5.5

2.5

mA

V

Other inputs at V_CCor GND

0.0 mA ≥ I_IN≥ −50 mA

OE = 5.5V

V_IKU

Voltage Undershoot

−2.0

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

3

www.fairchildsemi.com

AC Electrical Characteristics

T

_A= −40 °C to +85°C,

_L= 50pF, RU = RD = 500Ω

_CC= 4.5 – 5.5V V_CC= 4.0V

Min Max

C

Figure

No.

Symbol

Parameter

Units

Conditions

V

Min

Max

0.25

30.0

Prop Delay Bus to Bus (Note 7)

Prop Delay, Select to Bus A

0.25

35.0

Figure 2

Figure 3

t

_PHL,t_PLH

ns V_I= OPEN

7.0

t_PZH, t_PZLOutput Enable Time, Select to Bus B

V_I= 7V for t_PZL

Figure 2

Figure 3

ns

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

Output Enable Time, OE to Bus A, B

7.0

1.5

30.0

8.4

35.0

9.8

t_PHZ, t_PLZOutput Disable Time, Select to Bus B

Figure 2

Figure 3

V_I= OPEN for t_PHZ

Output Disable Time, Output Enable Time, OE to Bus A, B

1.5

8.8

9.8

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 8)

Symbol

Parameter

Typ

Max

Units

Conditions

V_CC= 5.0V

C_IN

Control Pin Input Capacitance

3

pF

A Port

B Port

7.5

5.5

14

pF

C_I/O

Input/Output Capacitance

V_CC, OE = 5.0V

C_I/OON State

Input/Output Capacitance ON State (A or B Port)

V

_CC= 5.0V Switch ON

Note 8: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

Undershoot Characteristic (Note 9)

Symbol

V_OUTU

Parameter

Min

Typ

_OH− 0.3

Max

Units

Conditions

Output Voltage During Undershoot

2.5

V

Figure 1

Note 9: This is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot

event.

FIGURE 1.

Device Test Conditions

Transient

Input Voltage (V ) Waveform

Parameter

V_IN

Value

Units

IN

See Waveform

100K

V

Ω

V

R₁- R₂

V_TRI

11.0

V_CC

5.5

www.fairchildsemi.com

4

AC Loading and Waveforms

Note: Input driven by 50Ω source terminated in 50Ω

Note: C_Lincludes load and stray capacitance

Note: Input PRR = 1.0 MHz, t_W= 500 nS

FIGURE 2. AC Test Circuit

FIGURE 3. AC Waveforms

5

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide

Package Number MQA16

www.fairchildsemi.com

6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

7

www.fairchildsemi.com

May 1999

Revised December 1999

FSTU3384

10-Bit Bus Switch with

−2V Undershoot Hardened Circuit (UHC ) Protection

General Description

Features

The Fairchild Switch FSTU3384 provides 10 bits of high-

speed CMOS TTL-compatible bus switches. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay generating addi-

tional ground bounce noise. Both the A Ports and the B

Ports are “undershoot hardened” with UHC protection to

support an extended input range to 2.0V below ground.

Fairchild’s integrated Undershoot Hardened Circuit, UHC

senses undershoot at the I/Os, and responds by preventing

voltage differentials from developing and turning on the

switch. The device is organized as two 5-bit switches with

separate bus enable (OE) signals. When OE is LOW, the

switch is ON and Port A is connected to Port B. When OE

is HIGH, the switch is OPEN and a high-impedance state

exists between the two ports.

■ 4Ω switch connection between two ports

■ Undershoot Hardened to -2.0V.

■ Minimal propagation delay through the switch

■ Low l_CC

.

■ Zero ground bounce in flow-through mode

■ Control inputs compatible with TTL level

■ See Applications Note AN-5008 for details.

Ordering Code:

Order Number

FSTU3384WM

FSTU3384QSC

FSTU3384MTC

Package Number

M24B

Package Description

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA24

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Truth Table

Pin Descriptions

B₀–B₄

A₀–A₄

HIGH-Z State A₅–A₉

B₅–B₉

A₅–A₉

HIGH-Z State

OEA OEB

Function

Connect

Pin Names

Description

Bus Switch Enable

Bus A

Bus B

L

H

L

OEA, OEB

A₀–A₉

B₀–B₉

H

HIGH-Z State HIGH-Z State Disconnect

UHC is a trademark of Fairchild Semiconductor Corporation.

DS500195

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−2.0V to +7.0V

−0.5V to +7.0V

−50 mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Input Voltage (V_IN

Output Voltage (V_OUT

)

4.0V to 5.5V

0V to 5.5V

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (I_IK) V_IN<0V

DC Output (I_OUT) Sink Current

)

128 mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0nS/V to 5nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150°C

Switch I/O

Free Air Operating Temperature (T_A)

−40°C to +85°C

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the “Electrical

Characteristics” table are not guaranteed at the absolute maximum ratings.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T

_A= −40°C to +85°C

V_CC

(V)

Symbol

Parameter

Units

Condition

Typ

Min

Max

(Note 5)

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

OFF-STATE Leakage Current

Switch On Resistance

(Note 4)

4.5

4.0-5.5

5.5

−1.2

V

I_IN= − 18 mA

V_IH

V_IL

I_I

2.0

0.8

±1.0

7

V

µA

Ω

0 ≤ V_IN≤ 5.5V

I_OZ

R_ON

5.5

0 ≤ A, B ≤ V_CC, V_IN= V_IH

4.5

4

V

_S= 0V, I_IN= 64 mA

4.5

7

Ω

_S= 0V, I_IN= 30 mA

4.5

8

15

20

3

Ω

_S= 2.4V, I_IN= 15 mA

_S= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

∆ I_CC

5.5

2.5

mA

OE input at 3.4V

Other inputs at V_CCor GND

I_BIAS

I_OZU

V_IKU

Bias Pin Leakage Current

Switch Undershoot Current

Voltage Undershoot

5.5

±1.0

100

µA

V

OE = 0V, B = 0V, BiasV = 5.5V

I

_IN= − 20 mA, OE = 5.5V, V_OUT≥ V_IH

−2.0

0.0 mA ≥ I_IN≥ − 50 mA, OE = 5.5V

Note 4: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on

the two (A or B) pins.

Note 5: All typical values are at V_CC= 5.0V, T_A= 25°C.

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40°C to +85°C

C_L= 50 pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V_CC= 4.5 − 5.5V

V

_CC= 4.0V

Min

Max

Min

Max

t

_PHL, t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V_I= OPEN

Figure 1,

Figure 2

t_PZH, t_PZL

V_I= 7V for t_PZL

Figure 1,

Figure 2

1.0

1.5

5.7

5.2

6.2

5.5

ns

V_I= OPEN for t_PZH

V_I= 7V for t_PLZ

OE_A, OE_Bto A_n, B_n

Output Disable Time

t_PHZ, t_PLZ

Figure 1,

Figure 2

V_I= OPEN for t_PHZ

OE_A, OE_Bto A_n, B_n

Note 6: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

Control Input Capacitance

3

pF

V

C_I/O(OFF) Input/Output Capacitance

5

pF

V_CC, OE = 5.0V

Note 7: Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω

Note: C_Lincludes load and stray capacitance, C_L= 50 pF

Note: Input PRR = 1.0 MHz, t_W= 500 nS

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide

Package Number MQA24

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

December 1998

Revised December 1999

FSTU6800

10-Bit Bus Switch with Pre-Charged Outputs

and −2V Undershoot Hardened Circuit (UHC ) Protection

General Description

Features

■ 4Ω switch connection between two ports.

The Fairchild Switch FSTU6800 provides 10-bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise. Both the A Ports and the B

Ports are “undershoot hardened” with UHC protection to

support an extended input range to 2.0V below ground.

Fairchild’s integrated Undershoot Hardened Circuit, UHC

senses undershoot at the I/Os, and responds by preventing

voltage differentials from developing and turning on the

switch. The device also precharges the B Port to a select-

able bias voltage (BiasV) to minimize live insertion noise.

■ Undershoot Hardened to -2.0V.

■ Soft enable turn-on to minimize bus-to-bus charge

sharing during enable.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Output precharge to minimize live insertion noise.

■ Control inputs compatible with TTL level.

■ See Applications Note AN-5008 for details.

The device is organized as a 10-bit switch with a bus

enable (OE) signal. When OE is LOW, the switch is ON

and Port A is connected to Port B. When OE is HIGH, the

switch is OPEN and the B Port is precharged to BiasV

through an equivalent 10-kΩ resistor.

Ordering Code:

Order Number

FSTU6800WM

FSTU6800QSC

FSTU6800MTC

Package Number

M24B

Package Description

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA24

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Diagram

Connection Diagram

Pin Descriptions

Pin Name

Description

Truth Table

OE

A

Bus Switch Enable

Bus A

B₀–B₉

OE

L

Function

Connect

A₀–A₉

BiasV

B

Bus B

H

Precharge

BiasV

Bus B Voltage Bias

UHC is a trademark of Fairchild Semiconductor Corporation.

DS500194

www.fairchildsemi.com

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−2.0V to +7.0V

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Precharge Supply (BiasV)

)

4.0V to 5.5V

1.5V to V_CC

0V to 5.5V

Bias V Voltage Range

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN< 0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0 nS/V to 5 nS/V

0nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T_A= −40 °C to +85 °C

V_CC

Symbol

Parameter

Units

Conditions

Typ

(Note 5)

(V)

Min

Max

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

Output Current

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18mA

V_IH

V_IL

I_I

2.0

0.8

V

±1.0

µA

mA

µA

Ω

0 ≤ V_IN≤ 5.5V

I_O

4.5

0.25

BiasV = 2.4V, B = 0

0 ≤ A ≤ V_CC, V_IN= V_IH

I_OZ

R_ON

OFF-STATE Leakage Current

Switch On Resistance

(Note 4)

5.5

±1.0

7

4.5

4

V

_S= 0V, I_IN= 64 mA

4.5

7

Ω

_S= 0V, I_IN= 30 mA

4.5

8

15

20

3

Ω

_S= 2.4V, I_IN= 15 mA

_S= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

∆ I_CC

5.5

2.5

mA

OE input at 3.4V

Other inputs at V_CCor GND

I_BIAS

I_OZU

V_IKU

Bias Pin Leakage Current

Switch Undershoot Current

Voltage Undershoot

5.5

±1.0

100

µA

V

OE = 0V, B = 0V, BiasV = 5.5V

I

_IN= −20 mA, OE = 5.5V, V_OUT≥ V_IH

−2.0

0.0 mA ≥ I_IN≥ −50 mA, OE = 5.5V

Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

www.fairchildsemi.com

2

AC Electrical Characteristics

T

_A= −40 °C to +85 °C,

C_L= 50 pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V

_CC= 4.5 – 5.5V

V

_CC= 4.0V

Min

Max

Min

Max

t

_PHL,t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH

t_PZL

t_PHZ

t_PLZ

7.0

1.0

30.0

6.1

35.0

6.5

V_I= OPEN

BiasV = GND

Figure 1

Figure 2

V_I= 7V

BiasV = 3V

Output Disable Time

V_I= OPEN

BiasV = GND

Figure 1

Figure 2

7.3

6.8

V_I= 7V

BiasV = 3V

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

V_CC, OE = 5.0V

Control Pin Input Capacitance

Input/Output Capacitance

3

5

pF

V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω

Note: C_Lincludes load and stray capacitance, C_L= 50 pF

Note: Input PRR = 1.0 MHz, t_W= 500 nS

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

3

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide

Package Number MQA24

www.fairchildsemi.com

4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

5

www.fairchildsemi.com

Preliminary

December 1998

Revised December 1999

FSTU6800A

10-Bit Bus Switch with Pre-Charged Outputs

and −2V Undershoot Hardened Circuit (UHC ) Protection

(Preliminary)

General Description

Features

The Fairchild Switch FSTU6800A provides 10-bits of high-

speed CMOS TTL-compatible bus switching. The low on

resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

additional ground bounce noise. Both the A Ports and the B

Ports are “undershoot hardened” with UHC protection to

support an extended input range to 2.0V below ground.

Fairchild’s integrated Undershoot Hardened Circuit, UHC

senses undershoot at the I/Os, and responds by preventing

voltage differentials from developing and turning on the

switch. The device also precharges the B Port to a select-

able bias voltage (BiasV) to minimize live insertion noise.

■ 4Ω switch connection between two ports.

■ Undershoot Hardened to -2.0V.

■ Soft enable turn-on to minimize bus-to-bus charge

sharing during enable.

■ Low l_CC

.

■ Zero bounce in flow-through mode.

■ Output precharge to minimize live insertion noise.

■ Control inputs compatible with TTL level.

■ See Applications Note AN-5008 for details.

The device is organized as a 10-bit switch with a bus

enable (OE) signal. When OE is LOW, the switch is ON

and Port A is connected to Port B. When OE is HIGH, the

switch is OPEN and the B Port is precharged to BiasV

through an equivalent 10-kΩ resistor.

Ordering Code:

Order Number

FSTU6800AWM

FSTU6800AQSC

FSTU6800AMTC

Package Number

M24B

Package Description

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MQA24

MTC24

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

UHC is a trademark of Fairchild Semiconductor Corporation.

DS500209

www.fairchildsemi.com

Preliminary

Logic Diagram

Connection Diagram

Pin Descriptions

Truth Table

Pin Name

Description

OE

B₀–B₉

Function

OE

A

Bus Switch Enable

Bus A

L

A₀–A₉

BiasV

Connect

H

Precharge

B

Bus B

BiasV

Bus B Voltage Bias

www.fairchildsemi.com

2

Preliminary

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 3)}

Supply Voltage (V_CC

)

−0.5V to +7.0V

−2.0V to +7.0V

−0.5V to +7.0V

−50mA

DC Switch Voltage (V_S)

Power Supply Operating (V_CC

Precharge Supply (BiasV)

)

4.0V to 5.5V

1.5V to V_CC

0V to 5.5V

Bias V Voltage Range

DC Input Voltage (V_IN) (Note 2)

DC Input Diode Current (l_IK) V_IN< 0V

DC Output (I_OUT) Sink Current

Input Voltage (V_IN

)

Output Voltage (V_OUT

)

128mA

Input Rise and Fall Time (t_r, t_f)

Switch Control Input

DC V_CC/GND Current (I_CC/I_GND

)

+/− 100mA

0 nS/V to 5 nS/V

0 nS/V to DC

Storage Temperature Range (T_STG

)

−65°C to +150 °C

Switch I/O

Free Air Operating Temperature (T_A)

−40 °C to +85 °C

Note 1: The Absolute Maximum Ratings are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The Recommended Operating Conditions tables will define the conditions

for actual device operation.

Note 2: The input and output negative voltage ratings may be exceeded if

the input and output diode current ratings are observed.

Note 3: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

T_A= −40 °C to +85 °C

V_CC

Symbol

Parameter

Units

Conditions

Typ

(Note 5)

(V)

Min

Max

V_IK

Clamp Diode Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

Input Leakage Current

Output Current

4.5

4.0–5.5

5.5

−1.2

V

I_IN= −18 mA

V_IH

V_IL

I_I

2.0

0.8

V

±1.0

µA

mA

µA

Ω

0 ≤ V_IN≤ 5.5V

I_O

4.5

0.25

BiasV = 2.4V, B = 0

0 ≤ A ≤ V_CC, V_IN= V_IH

I_OZ

R_ON

OFF-STATE Leakage Current

Switch On Resistance

(Note 4)

5.5

±1.0

7

4.5

4

V

_S= 0V, I_IN= 64 mA

4.5

7

Ω

_S= 0V, I_IN= 30 mA

4.5

8

15

20

3

Ω

_S= 2.4V, I_IN= 15 mA

_S= V_CCor GND, I_OUT= 0

4.0

11

Ω

I_CC

Quiescent Supply Current

Increase in I_CCper Input

5.5

µA

∆ I_CC

OE input at 3.4V

5.5

2.5

mA

Other inputs at V_CCor GND

I_BIAS

I_OZU

V_IKU

Bias Pin Leakage Current

Switch Undershoot Current

Voltage Undershoot

5.5

±1.0

100

µA

V

OE = 0V, B = 0V, BiasV = 5.5V

I

_IN= −20 mA, OE = 5.5V, V_OUT≥ V_IH

−2.0

0.0 mA ≥ I_IN≥ −50 mA, OE = 5.5V

Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the two (A or B) pins.

Note 5: Typical values are at V_CC= 5.0V and T_A= +25°C

3

www.fairchildsemi.com

Preliminary

AC Electrical Characteristics

T_A= −40 °C to +85 °C,

C_L= 50 pF, RU = RD = 500Ω

Symbol

Parameter

Units

Conditions

Figure No.

V_CC= 4.5 – 5.5V

V_CC= 4.0V

Min

Max

Min

Max

t

_PHL, t_PLH

Prop Delay Bus to Bus (Note 6)

Output Enable Time

0.25

6.5

6.8

ns

V_I= OPEN

Figure 1

Figure 2

t_PZH

t_PZL

t_PHZ

t_PLZ

1.0

6.2

6.1

7.3

V_I= OPEN

BiasV = GND

Figure 1

Figure 2

1.0

V_I= 7V

BiasV = 3V

Output Disable Time

V_I= OPEN

BiasV = GND

Figure 1

Figure 2

V_I= 7V

BiasV = 3V

Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance).

Capacitance (Note 7)

Symbol

C_IN

C_I/O

Parameter

Typ

Max

Units

Conditions

_CC= 5.0V

V_CC, OE = 5.0V

Control Pin Input Capacitance

Input/Output Capacitance

3

5

pF

V

Note 7: T_A= +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω

Note: C_Lincludes load and stray capacitance, C_L= 50 pF

Note: Input PRR = 1.0 MHz, t_W= 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

www.fairchildsemi.com

4

Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide

Package Number MQA24

5

www.fairchildsemi.com

Preliminary

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Technology Description

The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its

74LVX3L384 (FST3384) bus switch product.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

6


型号：	FSTU6800A
厂家：	ETC
描述：
文件：	总178页 (文件大小：3945K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FSTU6800A [ETC]

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