GS74108TP-15I [ETC]
512K x 8 4Mb Asynchronous SRAM; 512K ×8 4Mb的异步SRAM型号: | GS74108TP-15I |
厂家: | ETC |
描述: | 512K x 8 4Mb Asynchronous SRAM |
文件: | 总12页 (文件大小:245K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
GS74108TP/J
SOJ, TSOP
Commercial Temp
Industrial Temp
8, 10, 12, 15ns
3.3V VDD
Center VDD & VSS
512K x 8
4Mb Asynchronous SRAM
SOJ 512K x 8 Pin Configuration
Features
• Fast access time: 8, 10, 12, 15ns
• CMOS low power operation: 150/125/110/90 mA at min. cycle time.
• Single 3.3V ± 0.3V power supply
• All inputs and outputs are TTL compatible
• Fully static operation
36
1
A4
NC
35
A5
2
A3
34
A6
3
A2
33
A7
4
A1
32
A8
5
A0
• Industrial Temperature Option: -40° to 85°C
• Package line up
31
6
CE
OE
30
J: 400mil, 36 pin SOJ package
TP: 400mil, 44 pin TSOP Type II package
7
DQ1
DQ2
VDD
VSS
DQ3
DQ4
WE
A17
A16
A15
A14
A13
DQ8
29
8
DQ7
36 pin
28
9
VSS
400mil SOJ
27
Description
10
11
12
13
14
15
16
17
18
VDD
26
DQ6
The GS74108 is a high speed CMOS static RAM organized as
524,288-words by 8-bits. Static design eliminates the need for exter-
nal clocks or timing strobes. Operating on a single 3.3V power supply
and all inputs and outputs are TTL compatible. The GS74108 is avail-
able in 400 mil SOJ and 400 mil TSOP Type-II packages.
25
DQ5
24
A9
23
A10
22
A11
21
A12
20
19
A18
NC
Pin Descriptions
Symbol
A0 to A18
Description
Address input
DQ1 to DQ8
CE
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3V power supply
Ground
WE
OE
VDD
VSS
NC
No connect
Rev: 1.06 7/2000
1/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
TSOP-II 512K x 8 Pin Configuration
NC
NC
A4
1
44
NC
NC
NC
A5
2
43
42
3
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
4
A3
5
A2
A6
6
A1
A7
7
A0
A8
8
CE
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A9
9
DQ1
DQ2
VDD
VSS
DQ3
DQ4
WE
A17
A16
10
11
12
13
14
15
16
17
18
44 pin
400mil TSOP II
A10
A11
A12
A18
NC
A15
A14
19
20
A13
NC
NC
21
22
24
23
NC
NC
Block Diagram
A0
Row
Decoder
Memory Array
Address
Input
Buffer
Column
Decoder
A18
CE
WE
OE
I/O Buffer
Control
DQ8
DQ1
Rev: 1.06 7/2000
2/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Truth Table
CE
H
OE
X
WE
X
DQ1 to DQ8
Not Selected
Read
VDD Current
ISB1, ISB2
L
L
H
L
X
L
Write
IDD
L
H
H
High Z
Note: X: “H” or “L”
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
-0.5 to +4.6
V
-0.5 to VDD+0.5
(≤ 4.6V max.)
Input Voltage
VIN
V
V
-0.5 to VDD+0.5
(≤ 4.6V max.)
Output Voltage
VOUT
Allowable power dissipation
Storage temperature
PD
0.7
W
oC
TSTG
-55 to 150
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.06 7/2000
3/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Recommended Operating Conditions
Parameter
Supply Voltage for -10/12/15
Supply Voltage for -8
Input High Voltage
Symbol
VDD
Min
3.0
Typ
3.3
3.3
-
Max
3.6
Unit
V
VDD
3.135
2.0
3.6
V
VIH
VDD+0.3
0.8
V
Input Low Voltage
VIL
-0.3
-
V
Ambient Temperature,
Commercial Range
oC
oC
TAc
TAI
0
-
-
70
85
Ambient Temperature,
Industrial Range
-40
Note:
1. Input overshoot voltage should be less than VDD+2V and not exceed 20ns.
2. Input undershoot voltage should be greater than -2V and not exceed 20ns.
Capacitance
Parameter
Symbol
CIN
Test Condition
VIN=0V
Max
Unit
pF
Input Capacitance
Output Capacitance
5
7
COUT
VOUT=0V
pF
Notes:
1. Tested at TA=25°C, f=1MHz
2. These parameters are sampled and are not 100% tested
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage
Current
IIL
VIN = 0 to VDD
-1uA
1uA
1uA
Output Leakage
Current
Output High Z
VOUT = 0 to VDD
ILO
-1uA
2.4
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = - 4mA
ILO = + 4mA
0.4V
Rev: 1.06 7/2000
4/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Power Supply Currents
0 to 70°C
-40 to 85°C
Parameter Symbol Test Conditions
8ns 10ns 12ns 15ns 10ns 12ns 15ns
CE ≤ VIL
Operating
Supply
Current
All other inputs
≥ VIH or ≤ VIL
Min. cycle time
IOUT = 0 mA
IDD
150mA 125mA 110mA 90mA 135mA 120mA 100mA
CE ≥ VIH
Standby
Current
All other inputs
≥ VIH or ≤VIL
Min. cycle time
ISB1
ISB2
70mA 65mA 60mA 55mA 75mA 70mA 65mA
CE ≥ VDD - 0.2V
All other inputs
≥ VDD - 0.2V or ≤ 0.2V
Standby
Current
30mA
40mA
AC Test Conditions
Output Load 1
Parameter
Input high level
Input low level
Conditions
DQ
VIH=2.4V
VIL=0.4V
tr=1V/ns
tf=1V/ns
1.4V
30pF1
50Ω
Input rise time
VT=1.4V
Input fall time
Input reference level
Output reference level
Output load
Output Load 2
1.4V
3.3V
Fig. 1& 2
589Ω
434Ω
DQ
Note:
5pF1
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.
Rev: 1.06 7/2000
5/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
AC Characteristics
Read Cycle
-8
-10
-12
-15
Parameter
Symbol
Unit
Min Max Min Max Min Max Min Max
Read cycle time
tRC
tAA
tAC
tOE
tOH
8
---
---
---
3
---
8
10
---
---
---
3
---
10
10
4
12
---
---
---
3
---
12
12
5
15
---
---
---
3
---
15
15
6
ns
ns
ns
ns
ns
ns
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
8
3.5
---
---
---
---
---
---
---
---
*
3
3
3
3
tLZ
*
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
0
---
4
0
---
5
0
---
6
0
---
7
ns
ns
ns
tOLZ
*
---
---
---
---
---
---
---
---
tHZ
*
3.5
4
5
6
tOHZ
* These parameters are sampled and are not 100% tested
Read Cycle 1: CE = OE = V , WE = V
IL
IH
tRC
Address
Data Out
tAA
tOH
Previous Data
Data valid
Rev: 1.06 7/2000
6/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Read Cycle 2: WE = V
IH
tRC
Address
CE
tAA
tAC
tHZ
tLZ
OE
tOE
tOHZ
tOLZ
DATA VALID
Data Out
High impedance
Write Cycle
-8
-10
-12
-15
Parameter
Symbol
Unit
Min Max Min Max Min Max Min Max
Write cycle time
Address valid to end of write
Chip enable to end of write
Data set up time
tWC
tAW
tCW
tDW
tDH
8
5.5
5.5
4
---
---
---
---
---
---
---
---
---
---
10
7
---
---
---
---
---
---
---
---
---
---
12
8
---
---
---
---
---
---
---
---
---
---
15
10
10
7
---
---
---
---
---
---
---
---
---
---
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
8
5
6
Data hold time
0
0
0
0
Write pulse width
tWP
tAS
5.5
0
7
8
10
0
Address set up time
0
0
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
tWR
tWR1
0
0
0
0
0
0
0
0
tWLZ*
tWHZ*
3
3
3
3
Write to output in High Z
---
3.5
---
4
---
5
---
6
ns
* These parameters are sampled and are not 100% tested
Rev: 1.06 7/2000
7/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Write Cycle 1: WE control
tWC
Address
tAW
tWR
OE
tCW
CE
tAS
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
tWHZ
tWLZ
HIGH IMPEDANCE
Write Cycle 2: CE control
tWC
Address
tAW
tWR1
OE
CE
tAS
tCW
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
HIGH IMPEDANCE
Rev: 1.06 7/2000
8/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
36 Pin SOJ, 400 mil
Dimension in inch
Dimension in mm
Symbol
min nom max min nom max
A
A1
A2
B
-
-
-
0.146
-
-
-
-
3.70
-
L
0.026
0.66
D
c
0.105 0.110 0.115 2.67 2.80 2.92
0.013 0.017 0.021 0.33 0.43 0.53
0.024 0.028 0.032 0.61 0.71 0.81
0.006 0.008 0.012 0.15 0.20 0.30
0.920 0.924 0.929 23.37 23.47 23.60
0.395 0.400 0.405 10.04 10.16 10.28
B1
c
1
e
D
A
E
e
-
0.05
-
-
1.27
-
HE
GE
L
0.430 0.435 0.440 10.93 11.05 11.17
0.354 0.366 0.378 9.00 9.30 9.60
B
B1
y
Q
Detail A
0.082
-
-
-
-
-
2.08
-
-
-
-
-
y
0.004
0.10
0o
10o
0o
10o
Q
Note:
1. Dimension D& E do not include interlead flash
2. Dimension B1 does not include dambar protrusion / intrusion
3. Controlling dimension: inches
Rev: 1.06 7/2000
9/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
44 Pin, 400 mil TSOP-II
Dimension in inch Dimension in mm
D
Symbol
min nom max min nom max
c
44
23
22
A
A1
A2
B
-
-
-
0.047
-
-
-
-
1.20
-
0.002
0.05
0.037 0.039 0.041 0.95 1.00 1.05
0.01 0.014 0.018 0.25 0.35 0.45
A
c
-
0.006
-
-
0.15
-
D
0.721 0.725 0.729 18.31 18.41 18.51
0.396 0.400 0.404 10.06 10.16 10.26
1
e
E
B
e
-
0.031
-
-
0.80
-
HE
L
0.455 0.463 0.471 11.56 11.76 11.96
0.016 0.020 0.024 0.40 0.50 0.60
y
L1
y
-
-
0.031
-
-
-
0.80
-
-
-
0.004
-
-
0.10
0o
5o
0o
5o
Q
Q
Detail A
Note:
1. Dimension D& E do not include interlead flash
2. Dimension B does not include dambar protrusion / intrusion
3. Controlling dimension: mm
Rev: 1.06 7/2000
10/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Ordering Information
*
Package
Access Time
Temp. Range
Status
Part Number
GS74108TP-8
GS74108TP-10
GS74108TP-12
GS74108TP-15
GS74108TP-8I
GS74108TP-10I
GS74108TP-12I
GS74108TP-15I
GS74108J-8
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil SOJ
8 ns
10 ns
12 ns
15 ns
8 ns
Commercial
Commercial
Commercial
Commercial
Industrial
10 ns
12 ns
15 ns
8 ns
Industrial
Industrial
Industrial
Commercial
Commercial
Commercial
Commercial
Industrial
GS74108J-10
GS74108J-12
GS74108J-15
GS74108J-8I
400 mil SOJ
10 ns
12 ns
15 ns
8 ns
400 mil SOJ
400 mil SOJ
400 mil SOJ
GS74108J-10I
GS74108J-12I
GS74108J-15I
400 mil SOJ
10 ns
12 ns
15 ns
Industrial
400 mil SOJ
Industrial
400 mil SOJ
Industrial
* Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS74108TP-8T
Rev: 1.06 7/2000
11/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108TP/J
Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Page #/Revisions/Reason
1. Page 2/Pins 16 - 20 and 26 - 30 on 44 pin TSOP II Pin Configuration/
Correction.
741081.04d 5/1999/741081.05 1/
2000
Content
1. GSI Logo
2.
GS74108Rev1.05 10/19991/
2000K;Rev 5 2/2000L
Format/Content
Rev: 1.06 7/2000
12/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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