GVT7264A16J-12 [ETC]

x16 SRAM ; X16 SRAM
GVT7264A16J-12
型号: GVT7264A16J-12
厂家: ETC    ETC
描述:

x16 SRAM
X16 SRAM

静态存储器
文件: 总11页 (文件大小:85K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH, INC.  
ASYNCHRONOUS  
SRAM  
64K x 16 SRAM  
WITH SINGLE CHIP ENABLE  
REVOLUTIONARY PINOUT  
FEATURES  
GENERAL DESCRIPTIO N  
Fast access times: 10, 12, 15and 20ns  
Fast OE# access times: 5, 6, 7 and 8ns  
Single +5V +10% power supply  
Fully static -- no clock or timing strobes necessary  
All inputs and outputs are TTL-compatible  
Three state outputs  
Center power and ground pins for greater noise immunity  
Easy memory expansion with CE# and OE# options  
Automatic CE# power down  
High-performance, low-power consumption, CMOS  
double-poly, double-metal process  
The GVT7264A16 is organized as a 65,536 x 16 SRAM  
using a four-transistor memory cell with a high performance,  
silicon gate, low-power CMOS process. Galvantech SRAMs  
are fabricated using double-layer polysilicon, double-layer  
metal technology.  
This device offers center power and ground pins for  
improved performance and noise immunity. Static design  
eliminates the need for external clocks or timing strobes. For  
increased system flexibility and eliminating bus contention  
problems, this device offers chip enable (CE#), separate byte  
enable controls (BLE# and BHE#) and output enable (OE#)  
with this organization.  
Packaged in 44-pin, 400-mil SOJ and 44-pin, 400-mil  
TSOP  
The device offers a low power standby mode when chip  
is not selected. This allows system designers to meet low  
standby power requirements.  
OPTIONS  
MARKING  
Timing  
10ns access  
12ns access  
15ns access  
20ns access  
-10  
-12  
-15  
-20  
PIN ASSIGNMENT  
44-Pin SOJ  
44-Pin TSOP  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A4  
A3  
A5  
A6  
Packages  
44-pin SOJ (400 mil)  
44-pin TSOP (400 mil)  
2
J
TS  
3
A2  
A1  
A0  
A7  
4
OE#  
BHE#  
BLE#  
DQ16  
DQ15  
DQ14  
DQ13  
VSS  
VCC  
DQ12  
DQ11  
DQ10  
DQ9  
NC  
5
Power consumption  
Standard  
Low  
6
CE#  
DQ1  
DQ2  
DQ3  
DQ4  
VCC  
VSS  
DQ5  
DQ6  
DQ7  
DQ8  
WE#  
A15  
A14  
A13  
A12  
NC  
None  
L
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Temperature  
Commercial  
Industrial  
None (0°C to 70°C)  
I
(-40°C to 85°C)  
A8  
A9  
A10  
A11  
NC  
Galvantech, Inc. reserves the right to chaneg  
products or specifications without notic.e  
Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051  
Tel (408) 566-0688 Fax (408) 566-0699 Web Site: http://www.galvantech.com  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
FUNCTIONAL BLOCK DIAGRAM  
VCC  
VSS  
BLE#  
DQ1  
A0  
DQ8  
MEMORY ARRAY  
512 ROWS X 128 X 16  
COLUMNS  
DQ9  
DQ16  
A15  
POWER  
DOWN  
CE#  
BHE#  
WE#  
COLUMN DECODER  
OE#  
January 22, 199 9  
2
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
TRUTH TABLE  
DQ1-  
DQ8  
DQ9-  
DQ16  
MODE  
CE#  
WE#  
OE#  
BLE#  
BHE#  
POWE R  
LOW BYTE READ (DQ1-DQ8)  
HIGH BYTE READ (DQ9-DQ16)  
WORD READ (DQ1-DQ16)  
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
H
L
H
L
Q
HIGH-Z  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
HIGH-Z  
Q
L
L
Q
D
Q
HIGH-Z  
D
LOW BYTE WRITE (DQ1-DQ8)  
HIGH BYTE WRITE (DQ9-DQ16)  
WORD WRITE (DQ1-DQ16)  
X
X
X
X
H
L
H
L
L
H
L
HIGH-Z  
D
L
L
D
X
H
H
X
H
X
HIGH-Z HIGH-Z  
HIGH-Z HIGH-Z  
OUTPUT DISABLE  
STANDBY  
H
X
X
X
X
HIGH-Z HIGH-Z  
STANDBY  
PIN DESCRIPTIONS  
SOJ & TSOP  
SYMBO L  
TYPE  
DESCRIPTIO N  
Addresses Inputs: These inputs determine which cell is addressed .  
Pin Number s  
5, 4, 3, 2, 1, 44, 43,  
42, 27, 26, 25, 24,  
21, 20, 19, 18  
A0-A15  
Input  
Input  
17  
WE#  
CE#  
Write Enable: This input determines if the cycle is a READ or WRITE cycle. WE# is LOW  
for a WRITE cycle and HIGH for a READ cycle .  
Input  
6
Chip Enable: This active LOW input is used to enable the device. When CE# is LOW, the  
chip is selected. When CE# is HIGH, the chip is disabled and automatically goes into  
standby power mode.  
Input  
39, 40  
41  
BLE#, BHE#  
Byte Enable: These active LOW inputs allow individual bytes to be written or read. When  
BLE# is LOW, the data is written to or read from the lower byte (DQ1-DQ8). When BHE# is  
LOW, the data is written to or read from the higher byte (DQ9-DQ16) .  
Input  
OE#  
Output Enable: This active LOW input enables the output drivers .  
Input/Output  
7, 8, 9, 10, 13, 14,  
15, 16, 29, 30, 31,  
32, 35, 36, 37, 38  
DQ1-DQ16  
SRAM Data I/O: Data inputs and data outputs. Lower byte is DQ1-DQ8 and upper byte is  
DQ9-DQ16.  
11, 33  
12, 34  
VCC  
VSS  
Supply  
Supply  
Power Supply: 5V +10%  
Ground  
January 22, 199 9  
3
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
*Stresses greater than those listed under “Absolute Maximum  
Ratings” may cause permanent damage to the device.This is a stress  
rating only and functional operation of the device at these or any  
other conditions above those indicated in the operational sections of  
this specification is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect reliability.  
ABSOLUTE MAXIMUM RATINGS *  
Voltage on VCC Supply Relative to VSS........-0.5V to +7.0V  
V
..........................................................-0.5V to VCC+0.5V  
IN  
o
o
Storage Temperature (plastic) ..........................-55 C to +125  
Junction Temperature .....................................................+125  
Power Dissipation ...........................................................1.2W  
Short Circuit Output Current .......................................50mA  
o
DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITION S  
(All Temperature Ranges; VCC = 5V +10% unless otherwise noted)  
DESCRIPTIO N  
CONDITION S  
SYMBO L  
MIN  
MAX  
UNITS  
NOTE S  
Input High (Logic 1) voltage  
Input Low (Logic 0) Voltage  
Input Leakage Current  
VIH  
VIl  
2.2  
-0.5  
-5  
VCC+1  
V
V
1, 2  
1, 2  
0.8  
5
0V < VIN < VCC  
ILI  
uA  
uA  
Output Leakage Current  
Output(s) disabled,  
0V < VOUT < VCC  
ILO  
-5  
5
Output High Voltage  
Output Low Voltage  
Supply Voltage  
IOH = -4.0mA  
IOL = 8.0mA  
VOH  
VOL  
2.4  
4.5  
V
V
V
1
1
1
0.4  
5.5  
VCC  
POWER  
NOTES  
UNITS  
DESCRIPTIO N  
CONDITION S  
SYM  
TYP  
-10  
-12  
-15  
-20  
Power Supply  
Current: Operating f=fMAX; outputs open  
Device selected; CE# < VIL; VCC =MAX;  
Icc  
120  
260  
240  
60  
220  
200  
55  
190  
170  
50  
150  
130  
45  
mA  
3, 14  
standard  
low  
standard  
low  
TTL Standby  
CE# >VIH; VCC = MAX; f=fMAX  
ISB1  
25  
mA  
mA  
14  
50  
45  
40  
35  
CMOS Standby  
CE1# >VCC -0.2; VCC = MAX;  
all other inputs < VSS +0.2 or >VCC -0.2;  
all inputs static; f= 0  
ISB2  
0.02  
standard  
low  
10  
10  
10  
10  
14  
1.0  
1.0  
1.0  
1.0  
CAPACITANCE  
DESCRIPTIO N  
CONDITION S  
SYMBO L  
MAX  
UNITS  
NOTE S  
Input Capacitance  
TA = 25oC; f = 1 MHz  
VCC = 5V  
CI  
6
8
pF  
pF  
4
4
Input/Output Capacitance (DQ)  
CI/O  
January 22, 199 9  
4
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
AC ELECTRICAL CHARACTERISTICS  
(Note 5) (All Temperature Ranges; VCC = 5V +10%)  
- 10  
- 12  
- 15  
- 20  
DESCRIPTIO N  
SYM  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
MIN  
MAN UNITS NOTES  
READ Cycle  
READ cycle time  
tRC  
tAA  
tACE  
tOH  
tLZCE  
tHZCE  
tAOE  
tLZOE  
tHZOE  
tABE  
tLZBE  
tHZBE  
tPU  
10  
12  
15  
20  
ns  
ns  
ns  
ns  
ns  
Address access time  
10  
10  
12  
12  
15  
15  
20  
20  
Chip Enable access time  
Output hold from address change  
Chip Enable to output in Low-Z  
Chip disable to output in High-Z  
Output Enable access time  
Output Enable to output in Low-Z  
Output Enable to output in High-Z  
Byte Enable access time  
Byte Enable to output in Low-Z  
Byte disable to output in High-Z  
Chip Enable to power-up time  
Chip disable to power-down time  
WRITE Cycle  
3
3
4
4
4
4
4
4
4, 7  
5
5
6
6
7
7
8
8
ns 4, 6, 7  
ns  
ns  
0
0
0
0
5
6
6
7
7
8
8
9
ns  
ns  
ns  
4, 6  
4, 7  
0
0
0
0
0
0
0
0
5
6
7
8
ns 4, 6, 7  
ns  
ns  
4
4
tPD  
10  
12  
15  
20  
WRITE cycle time  
tWC  
tCW  
tAW  
10  
8
12  
8
15  
9
20  
10  
10  
ns  
ns  
ns  
Chip Enable to end of write  
Address valid to end of write, with OE#  
HIGH  
8
8
9
Address setup time  
tAS  
tAH  
tWP2  
tWP1  
tDS  
0
0
0
0
0
0
0
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address hold from end of write  
WRITE pulse width  
10  
8
10  
8
11  
9
12  
10  
8
WRITE pulse width, with OE# HIGH  
Data setup time  
6
6
7
Data hold time  
tDH  
0
0
0
0
Write disable to output in Low-Z  
Write Enable to output in High-Z  
Byte Enable to end of write  
tLZWE  
tHZWE  
tBW  
3
4
5
5
4, 7  
5
6
7
8
ns 4, 6, 7  
ns  
8
8
9
10  
January 22, 199 9  
5
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
OUTPUT LOADS  
AC TEST CONDITIONS  
Q
Input pulse levels  
0V to 3.0V  
Z0 = 50 W  
50W  
Vt = 1.5V  
30 pF  
Input rise and fall times  
Input timing reference levels  
Output reference levels  
Output load  
1.5ns  
1.5V  
Fig. 1 OUTPUT LOAD EQUIVALENT  
1.5V  
See Figures 1 and 2  
+5V  
480W  
Q
5 pF  
255W  
Fig. 2 OUTPUT LOAD EQUIVALENT  
8. WE# is HIGH for READ cycle.  
NOTES  
9. Device is continuously selected. Chip enable and output enables  
are held in their active state.  
1. All voltages referenced to VSS (GND).  
t
2. Overshoot:  
Undershoot:  
V
V
£ +7.0V for t £ RC /2.  
IH  
IL  
t
10. Address valid prior to, or coincident with, latest occurring chip  
enable.  
£ -2.0V for t £ RC /2  
3.  
I is given with no output current.I increases with greater  
cc cc  
11. t  
= Read Cycle Time.  
output loading and faster cycle times.  
RC  
12. Chip Enable and Write Enable can initiate and terminate a  
WRITE cycle.  
4. This parameter is sampled.  
5. Test conditions as specified with the output loading as shown in  
Fig. 1 unless otherwise noted.  
13. Capacitance derating applies to capacitance different from the  
load capacitance shown in Fig. 1.  
6. Output loading is specified withC =5pF as in Fig. 2. Transition  
L
o
14. Typical values are measured at 5V, 25 C and 20ns cycle time.  
is measured +500mV from steady state voltage.  
t
7. At any given temperature and voltage condition, HZCE is less  
t
t
t
than LZCE and HZWE is less than LZWE.  
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only )  
DESCRIPTIO N  
CONDITION S  
SYMBO L MIN  
TYP  
MAX  
UNITS NOTE S  
Vcc for Retention Data  
Data Retention Current  
VDR  
ICCDR  
ICCDR  
2
V
CE# >VCC -0.2;  
all other inputs < VSS +0.2  
or >VCC -0.2;  
Vcc = 2V  
Vcc = 3V  
2
3
400  
600  
uA  
uA  
13  
13  
all inputs static; f= 0  
Chip Deselect to  
Data Retention Time  
tCDR  
tR  
0
ns  
ns  
4
Operation Recovery Time  
tRC  
4, 11  
January 22, 199 9  
6
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
LOW VCC DATA RETENTION WAVEFOR M  
DATA RETENTION MODE  
V
4.5V  
4.5V  
VCC  
CE#  
DR  
t
CDR  
t
RC  
V
IH  
IL  
V
READ CYCLE NO. 1(8, 9)  
t
RC  
ADDR  
VALID  
t
AA  
t
OH  
Q
PREVIOUS DATA VALID  
DATA VALID  
READ CYCLE NO. 2(7, 8, 10, 12)  
t
RC  
CE#  
t
HZCE  
t
ABE  
t
BLE#  
BHE#  
t
AOE  
HZBE  
t
LZOE  
OE#  
t
LZBE  
t
t
ACE  
HZOE  
t
LZCE  
Q
HIGH Z  
DATA VALID  
DON'T CARE  
UNDEFINED  
January 22, 199 9  
7
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
WRITE CYCLE NO. 1(7, 12, 13)  
(Write Enable Controlled with Output Enable OE# active LOW))  
t
WC  
ADDR  
CE#  
t
t
AW  
t
AH  
CW  
t
BW  
BLE#  
BHE#  
t
t
AS  
WP2  
WE#  
t
t
DS  
DH  
t
D
Q
DATA VALID  
HIGH Z  
t
HZWE  
LZWE  
WRITE CYCLE NO. 2(12, 13)  
(Write Enable Controlled with Output Enable OE# inactive HIG)H  
t
WC  
ADDR  
CE#  
t
t
AW  
t
AH  
CW  
t
BW  
BLE#  
BHE#  
t
t
AS  
WP1  
WE#  
t
t
DS  
DH  
D
Q
DATA VALID  
HIGH Z  
DON'T CARE  
UNDEFINED  
January 22, 199 9  
8
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
WRITE CYCLE NO. 3(12, 13)  
(Chip Enable Controlled)  
t
WC  
ADDR  
CE#  
t
t
AW  
AH  
t
t
AS  
CW  
t
BW  
BLE#  
BHE#  
t
WP1  
WE#  
D
t
t
DS  
DH  
DATA VALID  
Q
HIGH Z  
DON'T CARE  
WRITE CYCLE NO. 4(12, 13)  
(Byte Enable Controlled)  
t
WC  
ADDR  
t
t
AW  
AH  
t
t
AS  
BW  
BLE#  
BHE#  
t
CW  
CE#  
t
WP1  
WE#  
D
t
t
DS  
DH  
DATA VALID  
Q
HIGH Z  
DON'T CARE  
January 22, 199 9  
9
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
Package Dimensions  
44-pin 400 Mil Plastic SOJ (J)  
1.129 (28.68)  
1.123 (28.52)  
.405 (10.29)  
.395 (10.03)  
.445 (11.30)  
.435 (11.05)  
PIN #1 INDEX  
.148 (3.76)  
.138 (3.51)  
.050 (1.27) TYP  
.030 (0.76)  
MIN  
.095 (2.41)  
.080 (2.03)  
SEATING  
PLANE  
.020 (0.51)  
.015 (0.38)  
.380 (9.65)  
.360 (9.14)  
MAX  
MIN  
Note: All dimensions in inches (millimeters)  
or typical, min where noted.  
44-pin 400 Mil Plastic TSOP (TS)  
.741 (18.81)  
.721 (18.31)  
.402 (10.21)  
.398 (10.11)  
.467 (11.86)  
.459 (11.66)  
PIN #1 INDEX  
.0315 (0.80) TYP  
.007 (0.18)  
.005 (0.12)  
SEATING  
PLANE  
.018 (0.45)  
.010 (0.25)  
.032 (0.80)  
.047 (1.20)  
MAX  
.024 (0.60)  
.016 (0.40)  
.008 (0.20)  
.002 (0.05)  
MAX  
MIN  
Note: All dimensions in inches (millimeters)  
or typical, max where noted.  
January 22, 199 9  
10  
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  
GVT7264A16  
REVOLUTIONARY PINOUT 64K X 16  
GALVANTECH,INC.  
Ordering Information  
GVT 7264A16 XX - XX X X  
Galvantech Prefix  
Part Number  
Temperature (Blank = Commercial  
I = Industrial)  
Power (Blank= Standard,  
L= Low Power)  
Speed (10 = 10ns, 12= 12ns  
15 = 15ns, 20 = 20ns)  
Package (J = 400 mil SOJ,  
TS = TSOP TYPE II)  
January 22, 199 9  
11  
Galvantech, Inc. reserves the right to change products or specifications without not.ice  
Rev. 1/99  

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