HD74ACT139RP [ETC]
DECODER/DEMUX|2-TO-4-LINE|ACT-CMOS|SOP|16PIN|PLASTIC ;
| 型号： | HD74ACT139RP |
| 厂家： | 
ETC |
| 描述： | DECODER/DEMUX|2-TO-4-LINE|ACT-CMOS|SOP|16PIN|PLASTIC 逻辑集成电路 光电二极管 驱动 |
| 文件： | 总10页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74AC139/HD74ACT139
Dual 1-of-4 Decoder/Demultiplexer
Description
The HD74AC139/HD74ACT139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two
independent decoders, each accepting two inputs and providing four mutually-exclusive active-Low
outputs. Each decoder has an active-Low Enable input which can be used as a data input for a 4-output
demultiplexer. Each half of the HD74AC139/HD74ACT139 can be used as a function generator providing
all four minterms of two variables.
Features
•
•
•
•
•
Multifunction Capability
Two Completely Independent 1-of-4 Decoders
Active Low Mutually Exclusive Outputs
Outputs Source/Sink 24 mA
HD74ACT139 has TTL-Compatible Inputs
HD74AC139/HD74ACT139
Pin Arrangement
1
2
3
4
5
16 VCC
Ea
A0a
A1a
O0a
O1a
15 Eb
14
13
A0b
A1b
12 O0b
11 O1b
10 O2b
O2a 6
7
8
O3a
GND
9
O3b
(Top view)
Logic Symbol
E
A0
A1
E
A0
A1
DECODER a
DECODER b
O0 O1 O2 O3
O0 O1 O2 O3
Pin Names
A0, A1
Address Inputs
Enable Inputs
E
O0 to O 3 Outputs
2
HD74AC139/HD74ACT139
Logic Diagram
Ea
A0a A1a
Eb
A0b A1b
O0a
O1a
O2a
O3a
O0b
O1b
O2b
O3b
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
Functional Description
The HD74AC139/HD74ACT139 is a high-speed dual 1-of-4 decoder/demultiplexer. The device has two
independent decoders, each of which accepts two binary weighted inputs (A0 to A1) and provides four
mutually exclusive active-Low outputs (O0 to O3). Each decoder has an active-Low enable (E). When E is
High all outputs are forced High. The enable can be used as the data input for a 4-output demultiplexer
application. Each half of the HD74AC139/HD74ACT139 generates all four minterms of two variables.
These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure
a, and thereby reducing the number of packages required in a logic network.
Truth Table
Inputs
Outputs
E
A0
X
L
A1
X
L
O0
H
L
O1
H
H
L
O2
H
H
H
L
O3
H
H
H
H
L
H
L
L
H
L
L
H
H
H
L
H
H
H
H
L
H
H
H :
High Voltage Level
Low Voltage Level
Immaterial
L
:
:
X
3
HD74AC139/HD74ACT139
Figure a: Gate Functions (each half)
E
E
A0
A0
O0
O0
A1
E
A1
E
A0
A0
O1
O2
O1
O2
A1
E
A1
E
A0
A0
A1
E
A1
E
A0
A0
O3
O3
A1
A1
DC Characteristics (unless otherwise specified)
Item
Symbol Max
Unit
Condition
Maximum quiescent supply current
ICC
ICC
ICCT
80
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current
Maximum ICC/input (HD74ACT139)
8.0
1.5
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
mA
VIN = VCC – 2.1 V, VCC = 5.5 V
Ta = Worst case
4
HD74AC139/HD74ACT139
AC Characteristics: HD74AC139
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
Max
11.5
8.5
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
13.0
9.5
Unit
Propagation delay
An to On
tPLH
tPHL
tPLH
tPHL
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
8.0
6.5
7.0
5.5
9.5
7.0
8.0
6.0
ns
Propagation delay
An to On
10.0
7.5
11.0
8.5
ns
ns
ns
Propagation delay
En to On
12.0
8.5
13.0
10.0
11.0
8.5
Propagation delay
En to On
10.0
7.5
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Characteristics: HD74ACT139
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
Typ
Max
Min
Max
Unit
Propagation delay
An to On
tPLH
tPHL
tPLH
tPHL
5.0
5.0
5.0
5.0
1.0
6.0
6.0
7.0
7.0
8.5
1.0
9.5
ns
Propagation delay
An to On
1.0
1.0
1.0
9.5
1.0
1.0
1.0
10.5
11.0
10.5
ns
ns
ns
Propagation delay
En to On
10.0
9.5
Propagation delay
En to On
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Symbol
CIN
Typ
Unit
Condition
VCC = 5.5 V
VCC = 5.0 V
Input capacitance
Power dissipation capacitance
4.5
pF
pF
CPD
40.0
5
Unit: mm
19.20
20.00 Max
16
1
9
8
1.3
1.11 Max
7.62
+ 0.13
– 0.05
0.25
2.54 ± 0.25
0.48 ± 0.10
0° – 15°
Hitachi Code
DP-16
JEDEC
EIAJ
Conforms
Conforms
Weight (reference value) 1.07 g
Unit: mm
10.06
10.5 Max
9
16
1
8
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0° – 8°
1.27
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
M
0.12
Hitachi Code
JEDEC
EIAJ
FP-16DA
—
Conforms
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.24 g
Unit: mm
9.9
10.3 Max
9
16
1
8
1.27
+ 0.10
6.10
– 0.30
1.08
0.635 Max
0° – 8°
+ 0.67
0.60
– 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
0.25
M
Hitachi Code
JEDEC
EIAJ
FP-16DN
Conforms
Conforms
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.15 g
Unit: mm
5.00
5.30 Max
16
9
1
8
0.65
0.13 M
0.65 Max
1.0
+ 0.08
– 0.07
*0.22
0.20 ± 0.06
6.40 ± 0.20
0° – 8°
0.50 ± 0.10
0.10
Hitachi Code
JEDEC
EIAJ
TTP-16DA
—
—
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.05 g
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received the latest product standards or specifications before final design, purchase or use.
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contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
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failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
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