HWD485CPA [ETC]
Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers; 低功耗，限摆率限制RS - 485 / RS -422收发器
| 型号： | HWD485CPA |
| 厂家： | 
ETC |
| 描述： | Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers |
| 文件： | 总20页 (文件大小：494K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
Ge n e ra l De s c rip t io n
__Ne xt Ge ne ra tion De vic e Fe a ture s
The HWD481, HWD483, HWD485, HWD487–HWD491, and
HWD1487 are low-power transceivers for RS-485 and RS-
422 communication. Each part contains one driver and one
receiver. The HWD483, HWD487, HWD488, and HWD489
feature reduced slew-rate drivers that minimize EMI and
reduce reflections caused by improperly terminated cables,
thus allowing error-free data transmission up to 250kbps.
The driver slew rates of the HWD481, HWD485, HWD490,
HWD491, and HWD1487 are not limited, allowing them to
transmit up to 2.5Mbps.
♦ For Fault-Tolerant Applications
HWD3430: ±80V Fault-Protected, Fail-Safe, 1/4
Unit Load, +3.3V, RS-485 Transceiver
HWD3440E–HWD3444E: ±15kV ESD-Protected,
±60V Fault-Protected, 10Mbps, Fail-Safe,
RS-485/J1708 Transceivers
♦ For Space-Constrained Applications
HWD3460–HWD3464: +5V, Fail-Safe, 20Mbps,
Profibus RS-485/RS-422 Transceivers
HWD3362: +3.3V, High-Speed, RS-485/RS-422
Transceiver in a SOT23 Package
These transceivers draw between 120µA and 500µA of
supply current when unloaded or fully loaded with disabled
drivers. Additionally, the HWD481, HWD483, and HWD487
have a low-current shutdown mode in which they consume
only 0.1µA. All parts operate from a single 5V supply.
HWD3280E–HWD3284E: ±15kV ESD-Protected,
52Mbps, +3V to +5.5V, SOT23, RS-485/RS-422,
True Fail-Safe Receivers
HWD3293/HWD3294/HWD3295: 20Mbps, +3.3V,
SOT23, RS-855/RS-422 Transmitters
Drivers are short-circuit current limited and are protected
against excessive power dissipation by thermal shutdown
circuitry that places the driver outputs into a high-imped-
ance state. The receiver input has a fail-safe feature that
guarantees a logic-high output if the input is open circuit.
♦ For Multiple Transceiver Applications
HWD3030E–HWD3033E: ±15kV ESD-Protected,
+3.3V, Quad RS-422 Transmitters
The HWD487 and HWD1487 feature quarter-unit-load
receiver input impedance, allowing up to 128 HWD487/
HWD1487 transceivers on the bus. Full-duplex communi-
cations are obtained using the HWD488–HWD491, while
the HWD481, HWD483, HWD485, HWD487, and HWD1487
are designed for half-duplex applications.
♦ For Fail-Safe Applications
HWD3080–HWD3089: Fail-Safe, High-Speed
(10Mbps), Slew-Rate-Limited RS-485/RS-422
Transceivers
________________________Ap p lic a t io n s
♦ For Low-Voltage Applications
HWD3483E/HWD3485E/HWD3486E/HWD3488E/
HWD3490E/HWD3491E: +3.3V Powered, ±15kV
ESD-Protected, 12Mbps, Slew-Rate-Limited,
True RS-485/RS-422 Transceivers
Low-Power RS-485 Transceivers
Low-Power RS-422 Transceivers
Level Translators
Transceivers for EMI-Sensitive Applications
Industrial-Control Local Area Networks
Ordering Information appears at end of data sheet.
______________________________________________________________S e le c t io n Ta b le
RECEIVER/
DRIVER
ENABLE
QUIESCENT
CURRENT
(µA)
NUMBER OF
TRANSMITTERS
ON BUS
PART
NUMBER
HALF/FULL DATA RATE SLEW-RATE LOW-POWER
PIN
COUNT
DUPLEX
(Mbps)
LIMITED
SHUTDOWN
HWD481
HWD483
HWD485
HWD487
HWD488
HWD489
HWD490
HWD491
HWD1487
Half
Half
Half
Half
Full
Full
Full
Full
Half
2.5
0.25
2.5
No
Yes
No
Yes
Yes
No
Yes
No
No
No
No
No
Yes
Yes
Yes
Yes
No
300
120
300
120
120
120
300
300
230
32
32
8
8
32
8
0.25
0.25
0.25
2.5
Yes
Yes
Yes
No
128
32
8
8
Yes
No
32
14
8
32
2.5
No
Yes
Yes
32
14
8
2.5
No
128
1
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (V ).............................................................12V
14-Pin SO (derate 8.33mW/°C above +70°C)...............667mW
8-Pin µMAX (derate 4.1mW/°C above +70°C) ..............830mW
8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW
14-Pin CERDIP (derate 9.09mW/°C above +70°C).......727mW
Operating Temperature Ranges
CC
Control Input Voltage (RE, DE)...................-0.5V to (V + 0.5V)
Driver Input Voltage (DI).............................-0.5V to (V + 0.5V)
Driver Output Voltage (A, B)...................................-8V to +12.5V
Receiver Input Voltage (A, B).................................-8V to +12.5V
CC
CC
Receiver Output Voltage (RO).....................-0.5V to (V +0.5V)
HWD4_ _C_ _/HWD1487C_ A ...............................0°C to +70°C
HWD4_ _E_ _/HWD1487E_ A.............................-40°C to +85°C
HWD4_ _MJ_/HWD1487MJA ...........................-55°C to +125°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
CC
Continuous Power Dissipation (T = +70°C)
A
8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) ....727mW
14-Pin Plastic DIP (derate 10.00mW/°C above +70°C) ..800mW
8-Pin SO (derate 5.88mW/°C above +70°C).................471mW
DC ELECTRICAL CHARACTERISTICS
(V = 5V ±5%, T = T
to T , unless otherwise noted.) (Notes 1, 2)
MAX
A
MIN
CC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Differential Driver Output (no load)
V
OD1
5
V
R = 50Ω (RS-422)
2
Differential Driver Output
(with load)
V
OD2
V
R = 27Ω (RS-485), Figure 4
1.5
5
Change in Magnitude of Driver
Differential Output Voltage for
Complementary Output States
∆V
R = 27Ω or 50Ω, Figure 4
0.2
V
V
V
OD
Driver Common-Mode Output
Voltage
V
OC
R = 27Ω or 50Ω, Figure 4
R = 27Ω or 50Ω, Figure 4
3
Change in Magnitude of Driver
Common-Mode Output Voltage
for Complementary Output States
∆V
0.2
OD
Input High Voltage
Input Low Voltage
Input Current
V
2.0
V
V
DE, DI, RE
DE, DI, RE
DE, DI, RE
DE = 0V;
IH
V
IL
0.8
±2
I
IN1
µA
V
= 12V
= -7V
1.0
IN
V
CC
= 0V or 5.25V,
mA
all devices except
HWD487/HWD1487
Input Current
(A, B)
V
IN
-0.8
I
IN2
V
= 12V
= -7V
0.25
-0.2
IN
HWD487/HWD1487,
mA
V
DE = 0V, V = 0V or 5.25V
CC
V
IN
Receiver Differential Threshold
Voltage
V
TH
-7V ≤ V ≤ 12V
-0.2
3.5
0.2
CM
Receiver Input Hysteresis
∆V
V
CM
= 0V
70
mV
V
TH
Receiver Output High Voltage
Receiver Output Low Voltage
V
I = -4mA, V = 200mV
O ID
OH
V
OL
I
= 4mA, V = -200mV
0.4
±1
V
O
ID
Three-State (high impedance)
Output Current at Receiver
I
0.4V ≤ V ≤ 2.4V
µA
kΩ
kΩ
OZR
O
-7V ≤ V ≤ 12V, all devices except
HWD487/HWD1487
CM
12
48
Receiver Input Resistance
R
IN
-7V ≤ V ≤ 12V, HWD487/HWD1487
CM
2
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
DC ELECTRICAL CHARACTERISTICS (continued)
(V = 5V ±5%, T = T
to T , unless otherwise noted.) (Notes 1, 2)
MAX
A
MIN
CC
PARAMETER
SYMBOL
CONDITIONS
HWD488/HWD489,
DE, DI, RE = 0V or V
MIN
TYP
MAX
UNITS
120
250
CC
HWD490/HWD491,
DE, DI, RE = 0V or V
300
500
CC
DE = V
500
300
300
230
350
250
120
0.1
900
500
500
400
650
400
250
10
CC
HWD481/HWD485,
No-Load Supply Current
(Note 3)
RE = 0V or V
I
µA
CC
DE = 0V
DE = V
CC
CC
HWD1487,
RE = 0V or V
CC
DE = 0V
DE = 5V
DE = 0V
HWD483
HWD487
HWD483/HWD487,
RE = 0V or V
CC
Supply Current in Shutdown
Driver Short-Circuit Current,
I
µA
HWD481/483/487, DE = 0V, RE = V
SHDN
CC
I
-7V ≤ V ≤12V (Note 4)
35
250
mA
OSD1
O
V
O
= High
Driver Short-Circuit Current,
= Low
I
-7V ≤ V ≤12V (Note 4)
35
7
250
95
mA
mA
OSD2
O
V
O
Receiver Short-Circuit Current
I
0V ≤ V ≤ V
O CC
OSR
SWITCHING CHARACTERISTICS—HWD481/HWD485, HWD490/HWD491, HWD1487
(V = 5V ±5%, T = T
to T , unless otherwise noted.) (Notes 1, 2)
MAX
A
MIN
CC
PARAMETER
Driver Input to Output
SYMBOL
CONDITIONS
Figures 6 and 8, R = 54Ω,
MIN
10
TYP
30
30
5
MAX
60
UNITS
ns
t
t
PLH
PHL
DIFF
C
= C = 100pF
L2
L1
10
60
Driver Output Skew to Output
Driver Rise or Fall Time
t
Figures 6 and 8, R
= 54Ω, C = C = 100pF
10
ns
SKEW
DIFF
L1
L2
HWD481, HWD485, HWD1487
HWD490C/E, HWD491C/E
HWD490M, HWD491M
3
5
3
15
15
15
40
40
40
40
90
90
90
40
Figures 6 and 8,
t , t
R
R = 54Ω,
DIFF
25
ns
F
C
= C = 100pF
L1
L2
40
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable Time from Low
Driver Disable Time from High
t
Figures 7 and 9, C = 100pF, S2 closed
70
ns
ns
ns
ns
ZH
L
t
Figures 7 and 9, C = 100pF, S1 closed
70
ZL
LZ
HZ
L
t
Figures 7 and 9, C = 15pF, S1 closed
70
L
t
Figures 7 and 9, C = 15pF, S2 closed
70
L
HWD481, HWD485, HWD1487 20
200
150
200
Figures 6 and 10,
Receiver Input to Output
t
, t
R
C
= 54Ω,
DIFF
HWD490C/E, HWD491C/E
HWD490M, HWD491M
20
20
ns
PLH PHL
= C = 100pF
L1
L2
Figures 6 and 10, R
= 54Ω,
| t
- tPHL | Differential
DIFF
PLH
t
13
ns
SKD
C
= C = 100pF
L2
L1
Receiver Skew
Receiver Enable to Output Low
Receiver Enable to Output High
Receiver Disable Time from Low
Receiver Disable Time from High
Maximum Data Rate
t
Figures 5 and 11, C = 15pF, S1 closed
20
20
20
20
50
50
50
50
ns
ns
ZL
RL
t
Figures 5 and 11, C = 15pF, S2 closed
RL
ZH
t
LZ
Figures 5 and 11, C = 15pF, S1 closed
ns
RL
t
Figures 5 and 11, C = 15pF, S2 closed
RL
ns
HZ
f
2.5
50
Mbps
ns
MAX
Time to Shutdown
t
HWD481 (Note 5)
200
600
SHDN
3
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
SWITCHING CHARACTERISTICS—HWD481/HWD485, HWD490/HWD491, HWD1487 (continued)
(V = 5V ±5%, T = T
to T , unless otherwise noted.) (Notes 1, 2)
MAX
A
MIN
CC
PARAMETER
SYMBOL
CONDITIONS
Figures 7 and 9, C = 100pF, S2 closed
MIN
TYP
MAX
UNITS
Driver Enable from Shutdown to
Output High (HWD481)
t
t
t
t
40
100
ns
ZH(SHDN)
ZL(SHDN)
ZH(SHDN)
ZL(SHDN)
L
Driver Enable from Shutdown to
Output Low (HWD481)
Figures 7 and 9, C = 100pF, S1 closed
40
100
1000
1000
ns
ns
ns
L
Receiver Enable from Shutdown
to Output High (HWD481)
Figures 5 and 11, C = 15pF, S2 closed,
L
A - B = 2V
300
300
Receiver Enable from Shutdown
to Output Low (HWD481)
Figures 5 and 11, C = 15pF, S1 closed,
L
B - A = 2V
SWITCHING CHARACTERISTICS—HWD483, HWD487/HWD488/HWD489
(V = 5V ±5%, T = T
to T , unless otherwise noted.) (Notes 1, 2)
MAX
A
MIN
CC
PARAMETER
Driver Input to Output
SYMBOL
CONDITIONS
MIN
250
250
TYP
800
800
MAX
2000
2000
UNITS
t
t
PLH
PHL
Figures 6 and 8, R
= 54Ω,
= 54Ω,
= 54Ω,
DIFF
ns
C
= C = 100pF
L2
L1
Figures 6 and 8, R
DIFF
Driver Output Skew to Output
Driver Rise or Fall Time
t
100
800
ns
ns
SKEW
C
= C = 100pF
L2
L1
Figures 6 and 8, R
DIFF
t , t
R
250
2000
F
C
= C = 100pF
L2
L1
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable Time from Low
Driver Disable Time from High
t
Figures 7 and 9, C = 100pF, S2 closed
250
250
300
300
250
250
2000
2000
3000
3000
2000
2000
ns
ns
ns
ns
ZH
L
t
Figures 7 and 9, C = 100pF, S1 closed
L
ZL
LZ
HZ
t
Figures 7 and 9, C = 15pF, S1 closed
L
t
Figures 7 and 9, C = 15pF, S2 closed
L
t
t
PLH
PHL
Figures 6 and 10, R
= 54Ω,
DIFF
Receiver Input to Output
ns
ns
C
= C = 100pF
L2
L1
Figures 6 and 10, R
= C = 100pF
= 54Ω,
I t
- tPHL I Differential
DIFF
PLH
t
100
SKD
C
L1
L2
Receiver Skew
Receiver Enable to Output Low
Receiver Enable to Output High
Receiver Disable Time from Low
Receiver Disable Time from High
Maximum Data Rate
t
Figures 5 and 11, C = 15pF, S1 closed
20
20
20
20
50
50
50
50
ns
ns
ZL
RL
t
Figures 5 and 11, C = 15pF, S2 closed
RL
ZH
t
LZ
Figures 5 and 11, C = 15pF, S1 closed
ns
RL
t
Figures 5 and 11, C = 15pF, S2 closed
ns
HZ
RL
f
t
, t < 50% of data period
PLH PHL
250
50
kbps
ns
MAX
Time to Shutdown
t
HWD483/HWD487 (Note 5)
200
600
SHDN
Driver Enable from Shutdown to
Output High
HWD483/HWD487, Figures 7 and 9,
t
t
2000
ns
ns
ns
ns
ZH(SHDN)
C
= 100pF, S2 closed
L
Driver Enable from Shutdown to
Output Low
HWD483/HWD487, Figures 7 and 9,
= 100pF, S1 closed
t
2000
2500
2500
ZL(SHDN)
C
L
Receiver Enable from Shutdown
to Output High
HWD483/HWD487, Figures 5 and 11,
= 15pF, S2 closed
ZH(SHDN)
C
L
Receiver Enable from Shutdown
to Output Low
HWD483/HWD487, Figures 5 and 11,
t
ZL(SHDN)
C
= 15pF, S1 closed
L
4
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
NOTES FOR ELECTRICAL/SWITCHING CHARACTERISTICS
Note 1: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device
ground unless otherwise specified.
Note 2: All typical specifications are given for V = 5V and T = +25°C.
CC
A
Note 3: Supply current specification is valid for loaded transmitters when DE = 0V.
Note 4: Applies to peak current. See Typical Operating Characteristics.
Note 5: The HWD481/HWD483/HWD487 are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less
than 50ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are
guaranteed to have entered shutdown. See Low-Power Shutdown Mode section.
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V = 5V, T = +25°C, unless otherwise noted.)
CC
A
OUTPUT CURRENT vs.
RECEIVER OUTPUT LOW VOLTAGE
OUTPUT CURRENT vs.
RECEIVER OUTPUT HIGH VOLTAGE
RECEIVER OUTPUT HIGH VOLTAGE vs.
TEMPERATURE
-20
-18
-16
-14
-12
-10
4.8
4.6
45
I
RO
= 8mA
40
35
4.4
4.2
30
25
20
15
10
5
4.0
3.8
-8
3.6
3.4
3.2
3.0
-6
-4
-2
0
0
0
0.5
1.0
1.5
2.0
2.5
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT HIGH VOLTAGE (V)
-50 -25
0
25
50
75 100 125
OUTPUT LOW VOLTAGE (V)
TEMPERATURE (°C)
RECEIVER OUTPUT LOW VOLTAGE vs.
TEMPERATURE
DRIVER OUTPUT CURRENT vs.
DIFFERENTIAL OUTPUT VOLTAGE
DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs. TEMPERATURE
0.9
0.8
2.4
2.3
90
80
70
R = 54Ω
I
RO
= 8mA
0.7
0.6
2.2
2.1
2.0
60
50
0.5
0.4
1.9
1.8
1.7
40
30
20
10
0.3
0.2
0.1
1.6
1.5
0
0
-50 -25
0
25
50
75 100 125
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
DIFFERENTIAL OUTPUT VOLTAGE (V)
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
5
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V = 5V, T = +25°C, unless otherwise noted.)
CC
A
HWD481/HWD485/HWD490/HWD491
SUPPLY CURRENT vs. TEMPERATURE
OUTPUT CURRENT vs.
DRIVER OUTPUT LOW VOLTAGE
OUTPUT CURRENT vs.
DRIVER OUTPUT HIGH VOLTAGE
600
500
140
-120
-100
-80
HWD481/HWD485; DE = V , RE = X
CC
120
100
80
400
300
200
100
0
-60
-40
-20
0
60
HWD485; DE = 0, RE = X,
HWD481; DE = RE = 0
HWD490/HWD491; DE = RE = X
40
20
0
HWD481; DE = 0, RE = V
CC
-50 -25
0
25
50
75 100 125
0
2
4
6
8
10
12
-7 -6 -5 -4 -3 -2 -1
0
1
2
3
4 5
TEMPERATURE (°C)
OUTPUT LOW VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
HWD1487
SUPPLY CURRENT vs. TEMPERATURE
HWD483/HWD487–HWD489
SUPPLY CURRENT vs. TEMPERATURE
600
500
600
500
400
300
200
100
0
400
300
200
100
0
HWD483; DE = V , RE = X
CC
HWD1487; DE = V , RE = X
CC
HWD487; DE = V , RE = X
CC
HWD483/HWD487; DE = RE = 0,
HWD488/HWD489; DE = RE = X
HWD1487; DE = 0V, RE = X
HWD483/HWD487; DE = 0, RE = V
CC
-60 -40 -20
0
20 40 60 80 100 120 140
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
6
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
______________________________________________________________P in De s c rip t io n
PIN
HWD481/HWD483/
HWD485/HWD487/
HWD1487
NAME
FUNCTION
HWD488/
HWD490
HWD489/
HWD491
DIP/SO
µMAX
DIP/SO
µMAX
DIP/SO
Receiver Output: If A > B by 200mV, RO will be high;
If A < B by 200mV, RO will be low.
1
3
2
4
2
RO
Receiver Output Enable. RO is enabled when RE is low; RO is
high impedance when RE is high.
2
3
4
4
5
6
—
—
—
5
3
4
5
RE
Driver Output Enable. The driver outputs, Y and Z, are enabled
by bringing DE high. They are high impedance when DE is low. If
the driver outputs are enabled, the parts function as line drivers.
While they are high impedance, they function as line receivers if
RE is low.
—
3
DE
Driver Input. A low on DI forces output Y low and output Z high.
Similarly, a high on DI forces output Y high and output Z low.
DI
5
7
4
5
6
7
6, 7
9
GND
Y
Ground
—
—
6
—
—
8
Noninverting Driver Output
6
8
10
Z
Inverting Driver Output
—
8
—
2
—
A
Noninverting Receiver Input and Noninverting Driver Output
Noninverting Receiver Input
—
7
—
1
12
A
—
7
—
1
—
B
Inverting Receiver Input and Inverting Driver Output
Inverting Receiver Input
—
8
—
2
11
B
1
3
14
V
CC
Positive Supply: 4.75V ≤ V ≤ 5.25V
CC
—
—
—
—
1, 8, 13
N.C.
No Connect—not internally connected
TOP VIEW
R
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
HWD481
HWD483
HWD485
HWD487
HWD1487
B
DE
A
DI
R
D
RO
RE
DE
DI
1
8
7
V
B
D
D
CC
GND
B
A
2
3
4
Rt
Rt
DIP/SO
6
5
A
GND
RO
R
1
2
3
4
A
B
8
7
6
5
V
CC
GND
DI
HWD481
HWD483
HWD485
HWD487
HWD1487
RE
RO
DE
RE
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH.
TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
µMAX
Figure 1. HWD481/HWD483/HWD485/HWD487/HWD1487 Pin Configuration and Typical Operating Circuit
7
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
TOP VIEW
V
CC
V
CC
V
1
2
3
4
R
8
7
6
5
A
B
Z
CC
HWD488
HWD490
1
RO
DI
Y
Z
5
6
3
2
Rt
GND
Y
DI
RO
DI
D
D
R
DIP/SO
8
7
A
B
Rt
RO
R
D
B
A
1
2
3
4
8
7
6
5
Z
Y
HWD488
HWD490
V
CC
GND
DI
4
RO
GND
NOTE: TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
GND
µMAX
Figure 2. HWD488/HWD490 Pin Configuration and Typical Operating Circuit
TOP VIEW
DE
V
CC
V
CC
RE
HWD489
HWD491
4
14
N.C.
1
2
3
4
5
6
7
14
V
CC
9
Y
R
RO
RE
13 N.C.
5
Rt
DI
RO
DI
D
R
10
12
11
10
9
A
Z
DE
B
12
11
A
2
DI
Z
Rt
RO
NC
R
D
D
GND
GND
Y
B
1, 8, 13
8
N.C.
3
6, 7
DIP/SO
RE GND
GND DE
Figure 3. HWD489/HWD491 Pin Configuration and Typical Operating Circuit
HWD4 8 7 /HWD1 4 8 7 :
1 2 8 Tra n s c e ive rs o n t h e Bu s
The 48kΩ, / -unit-load receiver input impedance of the
__________Ap p lic a t io n s In fo rm a t io n
The HWD481/HWD483/HWD485/HWD487–HWD491 and
1
4
HWD1487 are low-power transceivers for RS-485 and RS-
422 communications. The HWD481, HWD485, HWD490,
HWD491, and HWD1487 can transmit and receive at data
ra te s up to 2.5Mb p s , while the HWD483, HWD487,
HWD488, and HWD489 are specified for data rates up to
250kbps. The HWD488–HWD491 are full-duplex trans-
ceivers while the HWD481, HWD483, HWD485, HWD487,
and HWD1487 are half-duplex. In addition, Driver Enable
(DE) and Receiver Enable (RE) pins are included on the
HWD481, HWD483, HWD485, HWD487, HWD489,
HWD491, and HWD1487. When disabled, the driver and
receiver outputs are high impedance.
HWD487 and HWD1487 allows up to 128 transceivers
on a bus, compared to the 1-unit load (12kΩ input
imp e d a nc e ) of s ta nd a rd RS-485 d rive rs (32 tra ns-
c e ive rs ma ximum). Any c omb ina tion of HWD487/
HWD1487 and other RS-485 transceivers with a total of
32 unit loa d s or le s s c a n b e p ut on the b us . The
HWD481/HWD483/HWD485 and HWD488–HWD491 have
standard 12kΩ Receiver Input impedance.
8
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
_________________________________________________________________Te s t Circ u it s
Y
1kΩ
R
R
TEST POINT
RECEIVER
OUTPUT
V
CC
S1
S2
V
OD
C
RL
1kΩ
15pF
V
OC
Z
Figure 4. Driver DC Test Load
Figure 5. Receiver Timing Test Load
3V
DE
V
CC
S1
S2
C
500Ω
L1
A
OUTPUT
UNDER TEST
Y
R
DIFF
RO
DI
C
L
V
ID
B
Z
RE
C
L2
Figure 6. Driver/Receiver Timing Test Circuit
Figure 7. Driver Timing Test Load
monics with large amplitudes are evident. Figure 13
shows the same information displayed for a HWD483,
HWD487, HWD488, or HWD489 transmitting under the
same conditions. Figure 13’s high-frequency harmonics
have much lower amplitudes, and the potential for EMI
is significantly reduced.
HWD4 8 3 /HWD4 8 7 /HWD4 8 8 /HWD4 8 9 :
Re d u c e d EMI a n d Re fle c t io n s
The HWD483 and HWD487–HWD489 are slew-rate limit-
ed, minimizing EMI and reducing reflections caused by
improperly terminated cables. Figure 12 shows the dri-
ve r outp ut wa ve form a nd its Fourie r a na lys is of a
150kHz s ig na l tra ns mitte d b y a HWD481, HWD485,
HWD490, HWD491, or HWD1487. High-frequency har-
9
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
_______________________________________________________S w it c h in g Wa ve fo rm s
3V
0V
3V
0V
DE
DI
1.5V
1.5V
1.5V
1.5V
V
t
t
PHL
PLH
1/2 V
O
t
t
, t
LZ
ZL(SHDN) ZL
Z
Y, Z
V
O
2.3V
+0.5V
-0.5V
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
OL
V
OL
Y
1/2 V
O
V
DIFF
= V (Y) - V (Z)
Y, Z
0V
V
O
V
OH
2.3V
V
DIFF
90%
90%
0V
-V
10%
10%
O
t
, t
t
HZ
ZH(SHDN) ZH
t
R
t
F
t
| t - t
|
SKEW = PLH PHL
Figure 8. Driver Propagation Delays
Figure 9. Driver Enable and Disable Times (except HWD488 and
HWD490)
3V
RE
1.5V
1.5V
0V
V
OH
t
LZ
t
, t
ZL(SHDN) ZL
RO
1.5V
1.5V
V
OL
V
CC
OUTPUT
RO
1.5V
V
+ 0.5V
- 0.5V
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
OL
t
t
PLH
PHL
V
ID
A-B
0V
0V
-V
ID
INPUT
RO
V
OH
1.5V
0V
t
, t
t
HZ
ZH(SHDN) ZH
Figure 11. Receiver Enable and Disable Times (except HWD488
and HWD490)
Figure 10. Receiver Propagation Delays
_________________Fu n c t io n Ta b le s (HWD481/HWD483/HWD485/HWD487/HWD1487)
Table 1. Transmitting
Table 2. Receiving
INPUTS
OUTPUTS
INPUTS
OUTPUT
RE
DE
A-B
RO
RE
DE
DI
Z
Y
0
0
> +0.2V
1
0
1
X
1
1
0
1
0
0
0
0
0
< -0.2V
Inputs open
X
X
0
1
0
0
0
1
0
X
X
High-Z
High-Z
High-Z
1
High-Z
1
High-Z
*
*
*
X = Don't care
X = Don't care
High-Z = High impedance
Shutdown mode for HWD481/HWD483/HWD487
High-Z = High impedance
Shutdown mode for HWD481/HWD483/HWD487
*
*
10
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
10dB/div
10dB/div
0Hz
5MHz
0Hz
5MHz
500kHz/div
500kHz/div
Figure 12. Driver Output Waveform and FFT Plot of HWD481/
HWD485/HWD490/HWD491/HWD1487 Transmitting a 150kHz
Signal
Figure 13. Driver Output Waveform and FFT Plot of HWD483/
HWD487–HWD489 Transmitting a 150kHz Signal
Lo w -P o w e r S h u t d o w n Mo d e
(HWD4 8 1 /HWD4 8 3 /HWD4 8 7 )
A low-power shutdown mode is initiated by bringing
both RE high and DE low. The devices will not shut
down unless both the driver and receiver are disabled.
In shutdown, the devices typically draw only 0.1µA of
supply current.
Drive r Ou t p u t P ro t e c t io n
Excessive output current and power dissipation caused
by faults or by bus contention are prevented by two
mechanisms. A foldback current limit on the output
stage provides immediate protection against short cir-
cuits over the whole common-mode voltage range (see
Typical Operating Characteristics). In addition, a ther-
mal shutdown circuit forces the driver outputs into a
hig h-imp e d a nc e s ta te if the d ie te mp e ra ture ris e s
excessively.
RE and DE may be driven simultaneously; the parts are
guaranteed not to enter shutdown if RE is high and DE
is low for less than 50ns. If the inputs are in this state
for at least 600ns, the parts are guaranteed to enter
shutdown.
P ro p a g a t io n De la y
Many digital encoding schemes depend on the differ-
e nc e b e twe e n the d rive r a nd re c e ive r p rop a g a tion
delay times. Typical propagation delays are shown in
Figures 15–18 using Figure 14’s test circuit.
For the HWD481, HWD483, and HWD487, the t
and
ZH
t
enable times assume the part was not in the low-
ZL
power shutdown state (the HWD485/HWD488–HWD491
and HWD1487 can not be shut down). The t
ZH(SHDN)
The difference in receiver delay times, | t
- t
|, is
PLH PHL
and t
enable times assume the parts were shut
down (see Electrical Characteristics).
ZL(SHDN)
typ ic a lly und e r 13ns for the HWD481, HWD485,
HWD490, HWD491, and HWD1487 and is typically less
than 100ns for the HWD483 and HWD487–HWD489.
It takes the drivers and receivers longer to become
e na b le d from the low-p owe r s hutd own s ta te
The driver skew times are typically 5ns (10ns max) for
the HWD481, HWD485, HWD490, HWD491, a nd
HWD1487, and are typically 100ns (800ns max) for the
HWD483 and HWD487–HWD489.
(t
), t
) than from the operating mode
(t , t ). (The parts are in operating mode if the R E ,
ZH(SHDN
ZH ZL
ZL(SHDN)
–—–
DE inputs equal a logical 0,1 or 1,1 or 0, 0.)
11
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
100pF
Z
B
A
TTL IN
t , t < 6ns
RECEIVER
OUT
R
D
R
F
R = 54Ω
Y
100pF
Figure 14. Receiver Propagation Delay Test Circuit
A
B
V
= 5V
CC
500mV/div
V
= 5V
CC
500mV/div
T = +25°C
A
T = +25°C
A
B
A
RO
2V/div
RO
2V/div
20ns/div
20ns/div
Figure 15. HWD481/HWD485/HWD490/HWD491/HWD487
Receiver t
Figure 16. HWD481/HWD485/HWD490/HWD491/HWD1487
Receiver t
PHL
PLH
A
B
500mV/div
500mV/div
V
CC
= 5V
V = 5V
CC
T = +25°C
A
T = +25°C
A
B
A
RO
2V/div
2V/div
RO
400ns/div
400ns/div
Figure 17. HWD483, HWD487–HWD489 Receiver t
Figure 18. HWD483, HWD487–HWD489 Receiver t
PLH
PHL
12
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
Figures 21 and 22 show typical network applications
c irc uits . The s e p a rts c a n a ls o b e us e d a s line
repeaters, with cable lengths longer than 4000 feet, as
shown in Figure 23.
Lin e Le n g t h vs . Da t a Ra t e
The RS-485/RS-422 standard covers line lengths up to
4000 feet. For line lengths greater than 4000 feet, see
Figure 23.
To minimize reflections, the line should be terminated at
both ends in its characteristic impedance, and stub
lengths off the main line should be kept as short as possi-
ble. The slew-rate-limited HWD483 and HWD487–HWD489
are more tolerant of imperfect termination.
Figures 19 and 20 show the system differential voltage
for the parts driving 4000 feet of 26AWG twisted-pair
wire at 110kHz into 120Ω loads.
Typ ic a l Ap p lic a t io n s
The HWD481, HWD483, HWD485, HWD487–HWD491, and
HWD1487 transceivers are designed for bidirectional data
communications on multipoint bus transmission lines.
5V
5V
DI
DI
0V
0V
1V
1V
V -V
Y
Z
V -V
0V
Y
Z
0V
-1V
-1V
5V
0V
5V
0V
RO
RO
2µs/div
2µs/div
Figure 20. HWD483, HWD487–HWD489 System Differential
Voltage at 110kHz Driving 4000ft of Cable
Figure 19. HWD481/HWD485/HWD490/HWD491/HWD1487 System
Differential Voltage at 110kHz Driving 4000ft of Cable
120Ω
120Ω
DE
B
B
DI
D
D
DI
DE
A
B
A
B
A
A
RO
RE
RO
RE
R
R
R
R
D
D
HWD481
HWD483
HWD485
HWD487
HWD1487
DE
DI
RO
RE
DI
RO RE
DE
Figure 21. HWD481/HWD483/HWD485/HWD487/HWD1487 Typical Half-Duplex RS-485 Network
13
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
A
Y
120Ω
120Ω
120Ω
RO
RE
R
DI
D
B
Z
Z
B
DE
DE
RE
RO
120Ω
DI
R
D
Y
A
Y
Z
B
A
Y
Z
B
A
R
R
D
DI
D
DI
HWD489
HWD491
DE RE RO
DE RE RO
NOTE: RE AND DE ON HWD489/HWD491 ONLY.
Figure 22. HWD488–HWD491 Full-Duplex RS-485 Network
Is o la t e d RS -4 8 5
For isolated RS-485 applications, see the HWD253 and
HWD1480 data sheets.
HWD488–HWD491
A
RO
RE
DE
120Ω
120Ω
R
DATA IN
B
Z
DI
DATA OUT
D
Y
NOTE: RE AND DE ON HWD489/HWD491 ONLY.
Figure 23. Line Repeater for HWD488–HWD491
14
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
_______________Ord e rin g In fo rm a t io n
__Ord e rin g In fo rm a t io n (c o n t in u e d )
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
8 Plastic DIP
8 SO
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
8 Plastic DIP
8 SO
HWD490CPA
HWD490CSA
HWD490CUA
HWD490C/D
HWD490EPA
HWD490ESA
HWD490MJA
HWD491CPD
HWD491CSD
HWD491C/D
HWD491EPD
HWD491ESD
HWD491MJD
HWD1487CPA
HWD1487CSA
HWD1487CUA
HWD1487C/D
HWD1487EPA
HWD1487ESA
HWD1487MJA
HWD481CPA
HWD481CSA
HWD481CUA
HWD481C/D
HWD481EPA
HWD481ESA
HWD481MJA
HWD483CPA
HWD483CSA
HWD483CUA
HWD483C/D
HWD483EPA
HWD483ESA
HWD483MJA
HWD485CPA
HWD485CSA
HWD485CUA
HWD485C/D
HWD485EPA
HWD485ESA
HWD485MJA
HWD487CPA
HWD487CSA
HWD487CUA
HWD487C/D
HWD487EPA
HWD487ESA
HWD487MJA
HWD488CPA
HWD488CSA
HWD488CUA
HWD488C/D
HWD488EPA
HWD488ESA
HWD488MJA
HWD489CPD
HWD489CSD
HWD489C/D
HWD489EPD
HWD489ESD
HWD489MJD
8 µMAX
8 µMAX
Dice*
Dice*
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 CERDIP
14 Plastic DIP
14 SO
8 CERDIP
8 Plastic DIP
8 SO
Dice*
8 µMAX
Dice*
14 Plastic DIP
14 SO
8 Plastic DIP
8 SO
14 CERDIP
8 Plastic DIP
8 SO
8 CERDIP
8 Plastic DIP
8 SO
8 µMAX
Dice*
8 µMAX
Dice*
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 CERDIP
* Contact factory for dice specifications.
8 CERDIP
8 Plastic DIP
8 SO
8 µMAX
Dice*
_________________Ch ip To p o g ra p h ie s
8 Plastic DIP
8 SO
HWD481/HWD483/HWD485/HWD487/HWD1487
8 CERDIP
8 Plastic DIP
8 SO
V
CC
RO
N.C.
8 µMAX
Dice*
N.C.
B
RE
DE
DI
0.054"
(1.372mm)
8 Plastic DIP
8 SO
A
8 CERDIP
14 Plastic DIP
14 SO
GND
Dice*
0.080"
(2.032mm)
14 Plastic DIP
14 SO
14 CERDIP
15
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
_____________________________________________Ch ip To p o g ra p h ie s (c o n t in u e d )
HWD488/HWD490
HWD489/HWD491
V
CC
V
CC
RO
A
RO
A
B
Z
B
Z
RE
DE
DI
0.054"
(1.372mm)
N.C.
N.C.
DI
0.054"
(1.372mm)
Y
Y
GND
GND
0.080"
0.080"
(2.032mm)
(2.032mm)
TRANSISTOR COUNT: 248
SUBSTRATE CONNECTED TO GND
16
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
P a c k a g e In fo rm a t io n
INCHES
MILLIMETERS
DIM
A
MIN
MAX
0.069
0.010
0.019
0.010
MIN
1.35
0.10
0.35
0.19
MAX
1.75
0.25
0.49
0.25
0.053
0.004
0.014
0.007
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
DIM
D
MIN
MAX
0.197
0.344
0.394
MIN
4.80
8.55
9.80
MAX
5.00
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0∞-8∞
e
A1
L
FRONT VIEW
SIDE VIEW
TITLE:
PACKAGE OUTLINE, .150" SOIC
17
Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
P a c k a g e In fo rm a t io n (c o n t in u e d )
.
4X S
8
8
MILLIMETERS
INCHES
DIM MIN
MAX
MAX
MIN
-
-
0.043
0.006
0.037
0.014
0.007
0.120
1.10
0.15
0.95
0.36
0.18
3.05
A
0.002
0.030
0.010
0.005
0.116
0.05
0.75
0.25
0.13
2.95
A1
A2
b
E
H
ÿ 0.50±0.1
c
D
e
0.0256 BSC
0.65 BSC
0.6±0.1
E
H
0.116
0.188
0.016
0∞
0.120
2.95
4.78
0.41
0∞
3.05
5.03
0.66
6∞
0.198
0.026
6∞
L
1
1
α
S
0.6±0.1
0.0207 BSC
0.5250 BSC
D
BOTTOM VIEW
TOP VIEW
A1
A2
A
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FRONT VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
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Lo w -P o w e r, S le w -Ra t e -Lim it e d
RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
P a c k a g e In fo rm a t io n (c o n t in u e d )
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Chengdu Sino Microelectronics System Co.,Ltd
(Http://www.csmsc.com)
Headquarters of CSMSC:
Beijing Office:
Address: 2nd floor, Building D,
Science & Technology
Industrial Park, 11 Gaopeng
Avenue, Chengdu High-Tech
Zone,Chengdu City, Sichuan
Province, P.R.China
Address: Room 505, No. 6 Building,
Zijin Garden, 68 Wanquanhe
Rd., Haidian District,
Beijing, P.R.China
PC: 100000
Tel: +86-10-8265-8662
Fax: +86-10-8265-86
PC: 610041
Tel: +86-28-8517-7737
Fax: +86-28-8517-5097
Shenzhen Office:
Address: Room 1015, Building B,
Zhongshen Garden,
Caitian Rd, Futian District,
Shenzhen, P.R.China
PC: 518000
Tel : +86-775-8299-5149
+86-775-8299-5147
+86-775-8299-6144
Fax: +86-775-8299-6142
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