IDT74LVCR16952APV [ETC]

Dual 8-bit Bus Transceiver ; 双8位总线收发器\n


型号：	IDT74LVCR16952APV
厂家：	ETC
描述：	Dual 8-bit Bus Transceiver 双8位总线收发器\n 总线收发器
文件：	总6页 (文件大小：130K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74LVCR16952A

INDUSTRIALTEMPERATURERANGE

3.3VCMOS16-BITREGISTEREDTRANSCEIVER

IDT74LVCR16952A

3.3V CMOS 16-BIT

REGISTERED TRANSCEIVER

WITH 3-STATE OUTPUTS

AND 5 VOLT TOLERANT I/O

DESCRIPTION:

FEATURES:

–

Typicalt^SK(0)(Output Skew) < 250ps

This 16-bit registered transceiver is built using advanced dual metal

CMOStechnology. Thishigh-speed,lowpowerdeviceisorganizedastwo

independent8-bitD-type registeredtransceivers withseparate inputand

outputcontrolforindependentcontrolofdata flowineitherdirection. For

example,theA-to-BEnable(CEAB)mustbeLOWtoenterdatafromtheA

port.CLKABcontrolstheclockingfunction. WhenCLKABtogglesfromLOW-

to-HIGH, the data present on the A port will be clocked into the register.

OEABperformstheoutputenablefunctionontheBport. Dataflowfromthe

BporttoAportissimilarbutrequiresusingCEBA,CLKBA,andOEBAinputs.

Full16-bitoperationisachievedbytyingthecontrolpinsoftheindependent

transceiverstogether.

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

VCC = 3.3V ±0.3V, Normal Range

VCC = 2.7V to 3.6V, Extended Range

CMOS power levels (0.4µW typ. static)

All inputs, outputs and I/O are 5 Volt tolerant

Supports hot insertion

–

Drive Features for LVC162952A:

–

Balanced Output Drivers: ±12mA

Low Switching Noise

Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows

the use of this device as a translator in a mixed 3.3V/5V supply system.

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

The LVCR162952Ahas series resistors inthe device output structure

which will significantly reduce line noise when used with light loads.This

driver has been developed to drive ±12mA at the designated threshold

levels.

FUNCTIONALBLOCKDIAGRAM

1CEBA

2CEBA

1CLKBA

2CLKBA

1OEAB

²OEAB

1CEAB

2CEAB

1CLKAB

2CLKAB

1OEBA

2OEBA

1A1

2A1

1B1

2B1

TO SEVEN OTHER CHANNELS

INDUSTRIAL TEMPERATURE RANGE

SEPTEMBER 2000

1999 Integrated Device Technology, Inc.

DSC-4484/-

IDT74LVCR16952A

INDUSTRIALTEMPERATURERANGE

3.3VCMOS16-BITREGISTEREDTRANSCEIVER

PINCONFIGURATION

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

Symbol

Description

Max.

Unit

OEAB

TERM

Terminal Voltage with Respect to GND

Storage Temperature

– 0.5 to +6.5

– 65 to +150

OEBA

CLKBA

CEBA

T_STG

I_OUT

°C

CLKAB

DC Output Current

– 50 to +50

– 50

CEAB

GND

1A1

IIK

Continuous Clamp Current,

VI < 0 or VO < 0

GND

1B1

IOK

ICC

Continuous Current through

±100

1B2

ISS

each VCC or GND

V^CC

LVC Link

V^CC

1B3

1B4

1B5

1A3

1A4

1A5

NOTE:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

GND

1B6

GND

1A6

1A7

1A8

SO56-1

SO56-2

SO56-3

1B8

2A1

2A2

2B1

CAPACITANCE (T^A= +25^oC, f = 1.0MHz)

Symbol

Parameter⁽¹⁾

Conditions

Typ. Max. Unit

2A3

2B3

CIN

Input Capacitance

VIN = 0V

4.5

GND

2A4

2A5

GND

2B4

2B5

2B6

COUT

CI/O

Output

Capacitance

I/O Port

VOUT = 0V

VIN = 0V

6.5

Capacitance

V^CC

2A7

V^CC

2B7

LVC Link

NOTE:

1. As applicable to the device type.

2A8

2B8

GND

CEAB

CEBA

CLKBA

OEBA

CLKAB

FUNCTION TABLE ^{(1, 2)}

OEAB

Inputs

Outputs

xBx

xCEAB

xCLKAB

xOEAB

xAx

B ⁽³⁾

SSOP/ TSSOP/ TVSOP

TOP VIEW

↑

B ⁽³⁾

PIN DESCRIPTION

↑

Pin Names

Description

A-to-B Output Enable Input (Active LOW)

B-to-A Output Enable Input (Active LOW)

A-to-B Clock Enable Input (Active LOW)

B-to-A Clock Enable Input (Active LOW)

A-to-B Clock Input

NOTES:

OEAB

1. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = High-Impedance

↑ = LOW-to-HIGH Transition

2. A-to-B data flow is shown: B-toA data flow is similar but uses xCEBA,

xCLKBA, and xOEBA.

3. Output level of B before the indicated steady-state input conditions

were established.

OEBA

CEAB

xCEBA

xCLKAB

xCLKBA

xAx

B-to-A Clock Input

A-to-B Data Inputs or B-to-A 3-State Outputs

B-to-A Data Inputs or A-to-B 3-State Outputs

xBx

1998 Integrated Device Technology, Inc.

DSC-123456

IDT74LVCR16952A

INDUSTRIALTEMPERATURERANGE

3.3VCMOS16-BITREGISTEREDTRANSCEIVER

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Operating Condition: T^A= –40^OC to +85^OC

Symbol

Parameter

Test Conditions

Min.

Typ.⁽¹⁾

Max. Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

VCC = 3.6V

1.7

—

VIL

Input LOW Voltage Level

Input Leakage Current

—

0.7

0.8

±5

IIH

VI = 0 to 5.5V

µA

IIL

IOZH

High Impedance Output Current

(3-State Output pins)

VCC = 3.6V

VO = 0 to 5.5V

—

±10

IOZL

IOFF

VIK

Input/Output Power Off Leakage

Clamp Diode Voltage

VCC = 0V, VIN or VO ≤ 5.5V

VCC = 2.3V, IIN = – 18mA

VCC = 3.3V

—

– 0.7

100

—

±50

– 1.2

—

µA

Input Hysteresis

µA

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VCC = 3.6V

VIN = GND or VCC

(2)

—

3.6 ≤ VIN ≤ 5.5V

∆ICC

Quiescent Power Supply

Current Variation

One input at V_CC- 0.6V

other inputs at VCC or GND

500

µA

LVC Link

NOTES:

1. Typical values are at V^CC= 3.3V, +25°C ambient.

2. This applies in the disabled state only.

OUTPUT DRIVE CHARACTERISTICS

Symbol

Parameter

Output HIGH Voltage

Test Conditions⁽¹⁾

Min.

Max.

Unit

VOH

VCC = 2.3V to 3.6V

VCC = 2.3V

IOH = – 0.1mA

IOH = – 4mA

IOH = – 6mA

IOH = – 4mA

IOH = – 8mA

IOH = – 6mA

IOH = – 12mA

IOL = 0.1mA

IOL = 4mA

VCC – 0.2

1.9

1.7

2.2

—

VCC = 2.7V

VCC = 3.0V

—

2.4

—

VOL

Output LOW Voltage

VCC = 2.3V to 3.6V

VCC = 2.3V

—

0.2

0.4

0.55

0.4

0.6

0.55

0.8

—

IOL = 6mA

—

VCC = 2.7V

VCC = 3.0V

IOL = 4mA

—

IOL = 8mA

—

IOL = 6mA

—

IOL = 12mA

—

LVC Link

NOTE:

1. V^IHand V^ILmust be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the

appropriate V^CCrange. T^A= – 40°C to +85°C.

IDT74LVCR16952A

INDUSTRIALTEMPERATURERANGE

3.3VCMOS16-BITREGISTEREDTRANSCEIVER

OPERATING CHARACTERISTICS, V

= 3.3V ± 0.3V, T = 25°C

Symbol

Parameter

Test Conditions

Typical

Unit

CPD

Power Dissipation Capacitance per transceiver Outputs enabled

Power Dissipation Capacitance per transceiver Outputs disabled

CL = 0pF, f = 10Mhz

CPD

SWITCHING CHARACTERISTICS ⁽¹⁾

VCC = 2.7V

CC = 3.3V±0.3V

Symbol

tPLH

tPHL

tPZH

tPZL

Parameter

Min

Max.

Min

Max.

Unit

Propagation Delay

7.6

6.6

xCLKAB, xCLKBA to xBx, xAx

Output Enable Time

1.5

2.5

1.5

1.8

1.5

2.5

1.5

1.4

xOEBA, xOEAB to xAx, xBx

Output Disable Time

tPHZ

tPLZ

7.5

—

6.5

—

500

xOEBA, xOEAB to xAx, xBx

Set-up Time, HIGH or LOW

xAx, xBx before xCLKAB↑, xCLKBA↑

Hold Time, HIGH or LOW

xAx, xBx after xCLKAB↑, xCLKBA↑

Set-up Time, HIGH or LOW

xCEAB, xCEBA before xCLKAB↑, xCLKBA↑

Hold Time, HIGH or LOW

tSU

xCEAB, xCEBA after xCLKAB↑, xCLKBA↑

Pulse Width HIGH or LOW

xCLKAB or xCLKBA

(2)

tSK(o)

Output Skew

—

NOTES:

1. See test circuits and waveforms. T^A= – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

IDT74LVCR16952A

INDUSTRIALTEMPERATURERANGE

3.3VCMOS16-BITREGISTEREDTRANSCEIVER

TESTCIRCUITS ANDWAVEFORMS:

PROPAGATIONDELAY

TESTCONDITIONS

Symbol

(1)

(2)

VCC = 3.3V ±0.3V VCC = 2.7V VCC = 2.5V ±0.2V

Unit

VLOAD

2 xVcc

Vcc

VIH

SAME PHASE

INPUT TRANSITION

VIH

2.7

1.5

300

2.7

1.5

300

tPHL

VCC / 2

150

tPLH

VOH

OUTPUT

VLZ

VHZ

VOL

150

VIH

LVC Link

OPPOSITE PHASE

INPUT TRANSITION

LVC Link

TEST CIRCUITS FOR ALL OUTPUTS

VLOAD

ENABLEANDDISABLETIMES

VCC

Open

GND

DISABLE

ENABLE

VIH

500Ω

CONTROL

INPUT

VIN

VOUT

Pulse ^{(1, 2)}

Generator

tPZL

tPLZ

D.U.T.

VLOAD/2

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

500Ω

VOL+VLZ

VOL

tPHZ

tPZH

VOH

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

LVC Link

VOH-VHZ

DEFINITIONS:

C^L= Load capacitance: includes jig and probe capacitance.

R^T= Termination resistance: should be equal to Z^OUTof the Pulse

Generator.

LVC Link

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control

Disable-HIGH.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; t^F≤ 2.5ns; t^R≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; t^F≤ 2ns; t^R≤ 2ns.

SWITCHPOSITION

SET-UP, HOLD, AND RELEASE TIMES

Test

Switch

VIH

DATA

INPUT

Open Drain

Disable Low

Enable Low

Disable High

Enable High

All Other tests

VLOAD

tSU

VIH

TIMING

INPUT

GND

Open

tREM

VIH

ASYNCHRONOUS

CONTROL

LVC Link

VIH

SYNCHRONOUS

CONTROL

OUTPUT SKEW - tsk (x)

tSU

LVC Link

VIH

INPUT

PULSEWIDTH

tPLH1

tPHL1

VOH

LOW-HIGH-LOW

PULSE

OUTPUT 1

OUTPUT 2

VOL

tSK (x)

VOH

HIGH-LOW-HIGH

PULSE

VOL

LVC Link

tPLH2

tPHL2

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

LVC Link

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For t^SK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74LVCR16952A

INDUSTRIALTEMPERATURERANGE

3.3VCMOS16-BITREGISTEREDTRANSCEIVER

ORDERINGINFORMATION

XXXX

IDT

LVC

Bus-Hold

Family Device Type Package

Temp. Range

Shrink Small Outline Package (SO56-1)

Thin Shrink Small Outline Package (SO56-2)

Thin Very Small Outline Package (SO56-3)

16-Bit Registered Transceiver with 3-State Outputs

952A

R16

Double-Density with Resistors, ±12mA

Blank No Bus-hold

-40°C to +85°C

CORPORATE HEADQUARTERS

2975StenderWay

for SALES:

800-345-7015 or 408-727-6116

Santa Clara, CA 95054

fax: 408-492-8674

www.idt.com*

*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

IDT74LVCR16952APV [ETC]

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