IRLR3815 [ETC]
TRANSISTOR | MOSFET | N-CHANNEL | 55V V(BR)DSS | 30A I(D) | TO-252AA ; 晶体管| MOSFET | N沟道| 55V V（ BR ） DSS | 30A I（ D） | TO- 252AA\n
| 型号： | IRLR3815 |
| 厂家： | 
ETC |
| 描述： | TRANSISTOR | MOSFET | N-CHANNEL | 55V V(BR)DSS | 30A I(D) | TO-252AA
|
| 文件： | 总11页 (文件大小：174K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94527
IRLR3815
AUTOMOTIVE MOSFET
IRLU3815
HEXFET® Power MOSFET
Features
●
●
●
●
●
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
D
VDSS = 55V
Repetitive Avalanche Allowed up to Tjmax
RDS(on) = 14mΩ
G
Description
ID = 30A
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this product are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features com-
bine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications.
S
D-Pak
I-Pak
IRLU3815
IRLR3815
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon limited)
Continuous Drain Current, VGS @ 10V (See Fig.9)
Continuous Drain Current, VGS @ 10V (Package limited)
Pulsed Drain Current
61
43
A
30
240
PD @TC = 25°C
Power Dissipation
120
W
W/°C
V
Linear Derating Factor
0.77
VGS
Gate-to-Source Voltage
± 16
EAS
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
200
600
mJ
EAS (6 sigma)
IAR
See Fig.12a, 12b, 15, 16
A
EAR
TJ
Repetitive Avalanche Energy
Operating Junction and
mJ
-55 to + 175
TSTG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
110
Max.
1.3
Units
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)
50
°C/W
Junction-to-Ambient–––
HEXFET(R) is a registered trademark of International Rectifier.
www.irf.com
1
08/02/02
IRLR/U3815
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
Static Drain-to-Source On-Resistance
–––
–––
1.0
42
12
14
14
17
VGS = 10V, ID = 30A
VGS = 5.0V, ID = 26A
VDS = 10V, ID = 250µA
VDS = 25V, ID = 30A
mΩ
VGS(th)
gfs
IDSS
Gate Threshold Voltage
––– 3.0
––– –––
V
S
Forward Transconductance
––– ––– 20
––– ––– 250
––– ––– 200
––– ––– -200
V
DS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
VGS = 16V
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -16V
ID = 30A
Qg
–––
–––
–––
–––
–––
–––
61
9.0
17
92
14
25
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 10V
7.4 –––
51 –––
83 –––
VDD = 28V
ns
ID = 30A
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 8.5Ω
VGS = 10V
––– 100 –––
D
Between lead,
nH 6mm (0.25in.)
from package
LD
Internal Drain Inductance
4.5
7.5
–––
–––
–––
–––
G
LS
Internal Source Inductance
and center of die contact
S
Ciss
Input Capacitance
––– 1870 –––
––– 390 –––
VGS = 0V
Coss
Output Capacitance
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
–––
74 –––
pF
ƒ = 1.0MHz, See Fig. 5
Coss
––– 2380 –––
––– 290 –––
––– 540 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
D
IS
MOSFET symbol
––– –––
––– –––
61
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
240
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 1.3
––– 62 93
––– 110 170
V
TJ = 25°C, IS = 30A, VGS = 0V
ns
TJ = 25°C, IF = 30A, VDD = 25xjkl V
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRLR/U3815
10000
1000
100
10
1000
100
10
VGS
15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
2.0V
VGS
15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
2.0V
TOP
TOP
BOTTOM
BOTTOM
1
2.0V
2.0V
0.1
1
0.01
0.001
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.00
100.00
10.00
1.00
70
60
T
= 25°C
J
T
= 175°C
J
T
= 25°C
J
50
40
30
20
10
0
T
= 175°C
J
V
= 25V
DS
20µs PULSE WIDTH
0.10
1.0
3.0
5.0
7.0
9.0
11.0
13.0
15.0
0
10
20
30
40
50
60
V
, Gate-to-Source Voltage (V)
I ,Drain-to-Source Current (A)
GS
D
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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3
IRLR/U3815
12
10
8
100000
I
=
30A
V
= 0V,
f = 1 MHZ
D
GS
V
V
V
= 44V
= 27V
= 11V
DS
DS
DS
C
= C + C , C SHORTED
iss
gs gd ds
C
= C
gd
rss
C
= C + C
oss
ds gd
10000
1000
100
C
C
iss
6
oss
4
C
rss
2
10
0
0
10
20
30
40
50
60
70
1
10
100
Q
, Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
10
1
°
T = 175
J
C
100µsec
1msec
°
T = 25
J
C
1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
100
V
= 0 V
GS
0.1
0.0
0.5
1.0
1.5
2.0
1
10
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRLR/U3815
70
60
50
40
30
20
10
0
2.5
2.0
1.5
1.0
0.5
0.0
61A
=
I
D
LIMITED BY PACKAGE
V
= 10V
GS
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
25
50
75
100
125
150
175
T , Junction Temperature
(
C)
°
, Case Temperature ( C)
J
T
C
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs. Temperature
Case Temperature
10
1
D = 0.50
0.20
0.10
0.05
P
DM
0.1
t
1
SINGLE PULSE
0.02
0.01
t
(THERMAL RESPONSE)
2
Notes:
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLR/U3815
500
400
300
200
100
0
15V
I
D
TOP
12A
21A
30A
DRIVER
+
BOTTOM
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
2
V0GVS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
°
( C)
150
175
Starting Tj, Junction Temperature
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
2.0
1.5
1.0
0.5
V
G
Charge
I
= 250µA
D
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
V
GS
-75 -50 -25
0
25 50 75 100 125 150 175 200
3mA
T , Temperature ( °C )
J
I
I
D
G
Current Sampling Resistors
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRLR/U3815
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
0.01
assuming
Tj = 25°C due to
∆
avalanche losses
0.05
0.10
1
0.1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
220
TOP
BOTTOM 10% Duty Cycle
= 30A
Single Pulse
200
180
160
140
120
100
80
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
60
40
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
20
0
25
50
75
100
125
150
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Fig 16. Maximum Avalanche Energy
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
vs. Temperature
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7
IRLR/U3815
Driver Gate Drive
P.W.
P.W.
Period
DꢀUꢀT
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
•
•
•
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
-
+
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
•
•
•
•
dv/dt controlled by RG
Driver same type as D!U!T!
ISD controlled by Duty Factor "D"
D!U!T! - Device Under Test
RG
+
-
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
DꢀUꢀTꢀ
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRLR/U3815
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
- A -
1.27 (.050)
5.46 (.215)
0.58 (.023)
0.46 (.018)
0.88 (.035)
5.21 (.205)
4
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
10.42 (.410)
9.40 (.370)
1.02 (.040)
1.64 (.025)
LEAD ASSIGNMENTS
1 - GATE
1
2
3
2 - DRAIN
0.51 (.020)
MIN.
- B -
3 - SOURCE
4 - DRAIN
1.52 (.060)
1.15 (.045)
0.89 (.035)
0.64 (.025)
3X
0.58 (.023)
0.46 (.018)
1.14 (.045)
0.76 (.030)
2X
0.25 (.010)
M A M B
NOTES:
2.28 (.090)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
4.57 (.180)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
D-Pak (TO-252AA) Part Marking Information
EXAM
PLE:
THIS I
S AN IRFR120
PAR
T NUMBER
W
ITH ASSEMBLY
INTERNATIONAL
LOT CO
DE 1234
ASSEMBLED
DATE CODE
RECTI
FIER
IRFU120
916A
34
ON WW 16, 1999
IN THE ASSEMBLY
YEAR 9 =
WEEK 16
LINE A
LOGO
1999
LINE "A"
12
ASSEMBLY
LOT CODE
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9
IRLR/U3815
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
- A -
0.58 (.023)
0.46 (.018)
1.27 (.050)
5.46 (.215)
0.88 (.035)
5.21 (.205)
LEAD ASSIGNMENTS
1 - GATE
4
2 - DRAIN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - DRAIN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
- B -
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
2.28 (.090)
1.91 (.075)
9.65 (.380)
8.89 (.350)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.76 (.030)
1.14 (.045)
0.89 (.035)
3X
0.89 (.035)
0.64 (.025)
3X
0.25 (.010)
M A M B
0.58 (.023)
0.46 (.018)
2.28 (.090)
2X
I-Pak (TO-251AA) Part Marking Information
10
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IRLR/U3815
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C,
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
L = 0.45mH, RG = 25Ω, IAS = 30A, VGS =10V.
Part not recommended for use above this
value.
This value determined from sample failure population. 100%
tested to this value in production.
ISD ≤ 30A, di/dt ≤ 280A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
,
When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to
application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/02
www.irf.com
11
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