IS62LV5128L-85B [ETC]

x8 SRAM ; X8 SRAM\n
IS62LV5128L-85B
型号: IS62LV5128L-85B
厂家: ETC    ETC
描述:

x8 SRAM
X8 SRAM\n

静态存储器
文件: 总10页 (文件大小:63K)
中文:  中文翻译
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®
IS62LV5128L  
IS62LV5128LL  
512K x 8 LOW POWER and LOW Vcc  
CMOS STATIC RAM  
ISSI  
MAY 2000  
FEATURES  
DESCRIPTION  
• Access times of 70, 85 and 100 ns  
The ISSI IS62LV5128L and IS62LV5128LL is a low  
CMOS low power operation:  
— 120 mW (typical) operating  
— 6 µW (typical) standby  
voltage, 524,288 words by 8 bits, CMOS SRAM. It is  
fabricated using ISSI’s low voltage, six transistor (6T),  
CMOS technology. The device is targeted to satisfy the  
demands of the state-of-the-art technologies such as  
cell phones and pagers.  
• Low data retention voltage: 2V (min.)  
• Output Enable (OE) and Chip Enable  
(CE) inputs for ease in applications  
When CE is HIGH (deselected), the device assumes a  
standbymodeatwhichthepowerdissipationcanbereduced  
down with CMOS input levels. Additionally, easy memory  
expansion is provided by using Chip Enable and Output  
Enable inputs, CE and OE. The active LOW Write Enable (WE)  
controls both writing and reading of the memory.  
• TTL compatible inputs and outputs  
• Fully static operation:  
— No clock or refresh required  
• Single 2.5V to 3.3V power supply  
• Available in 36-pin mini BGA  
The IS62LV5128L and IS62LV5128LL are available in a  
36-pin mini BGA package.  
FUNCTIONAL BLOCK DIAGRAM  
512K x 8  
MEMORY ARRAY  
A0-A18  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE  
CONTROL  
CIRCUIT  
OE  
WE  
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any  
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
1
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
PIN CONFIGURATION  
36-pin mini BGA (B)  
PIN DESCRIPTIONS  
A0-A18  
CE  
Address Inputs  
1
2
3
4
5
6
Chip Enable Input  
Output Enable Input  
Write Enable Input  
Input/Output  
OE  
WE  
I/O0-I/O7  
NC  
A
B
C
D
E
F
A0  
I/O4  
I/O5  
GND  
Vcc  
I/O6  
I/O7  
A9  
A1  
A2  
NC  
WE  
NC  
A3  
A4  
A5  
A6  
A7  
A8  
I/O0  
I/O1  
Vcc  
No Connection  
Power  
Vcc  
GND  
Ground  
GND  
I/O2  
I/O3  
A14  
A18  
CE  
A17  
A16  
A12  
OE  
A15  
A13  
G
H
A10  
A11  
TRUTHTABLE  
Mode  
WE  
CE  
OE  
I/O Operation  
Vcc Current  
Not Selected  
Output Disabled H  
Read  
Write  
X
H
L
L
L
X
H
L
High-Z  
High-Z  
DOUT  
DIN  
ISB1, ISB2  
ICC  
H
L
ICC  
X
ICC  
OPERATING RANGE  
Range  
Ambient Temperature  
VCC  
Commercial  
0°C to +70°C  
2.5V to 3.3V  
Industrial  
40°C to +85°C  
2.5V to 3.3V  
2
Integrated Silicon Solution, Inc. 1-800-379-4774  
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
ABSOLUTE MAXIMUM RATINGS(1)  
Symbol Parameter  
Value  
0.5 to Vcc + 0.5  
0.3 to +4.0  
40 to +85  
65 to +150  
1
Unit  
V
V
°C  
°C  
W
VTERM  
VCC  
Terminal Voltage with Respect to GND  
Vcc related to GND  
TBIAS  
TSTG  
PT  
Temperature Under Bias  
Storage Temperature  
Power Dissipation  
Note:  
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation of the  
device at these or any other conditions above those indicated in the operational sections of  
this specification is not implied. Exposure to absolute maximum rating conditions for  
extendedperiodsmayaffectreliability.  
CAPACITANCE(1,2)  
Symbol  
CIN  
Parameter  
Conditions  
VIN = 0V  
Max.  
Unit  
pF  
Input Capacitance  
Output Capacitance  
6
8
COUT  
VOUT = 0V  
pF  
Notes:  
1. Tested initially and after any design or process changes that may affect these parameters.  
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.0V.  
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)  
Symbol Parameter  
Test Conditions  
Min.  
Max.  
Unit  
VOH  
Output HIGH Voltage  
VCC = 3.3V, IOH = 1.0 mA  
VCC = 2.5V, IOH = 0.5 mA  
2.2  
2.0  
V
VOL  
Output LOW Voltage  
VCC = 3.0V, IOL = 2.1 mA  
VCC = 2.5V, IOL = 0.5 mA  
0.4  
0.4  
V
VIH  
VIL  
ILI  
Input HIGH Voltage  
Input LOW Voltage(1)  
Input Leakage  
2.2  
0.2  
1  
VCC + 0.3  
V
V
µA  
µA  
0.4  
1
1
GND VIN VCC  
GND VOUT VCC, OUTPUTS Disabled  
ILO  
Output Leakage  
1  
Note:  
1. VIL = 3.0V for pulse width less than 10 ns.  
Integrated Silicon Solution, Inc. 1-800-379-4774  
3
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
IS62LV5128L POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)  
-70  
Min. Max.  
-85  
Min. Max.  
-100  
Min. Max.  
Symbol Parameter  
Test Conditions  
Unit  
ICC  
Vcc Dynamic  
Operating  
VCC = Max., CE = VIL  
IOUT = 0 mA, f = fMAX  
Com.  
Ind.  
45  
50  
40  
45  
35  
40  
mA  
Supply Current  
ICC1  
ISB1  
OperatingSupply  
Current  
V
CC = Max.,  
Com.  
Ind.  
5
5
5
5
5
5
mA  
I
OUT = 0 mA, f = 0  
TTL Standby  
Current  
VCC = Max.,  
VIN = VIH or VIL,  
Com.  
Ind.  
0.4  
1.0  
0.4  
1.0  
0.4  
1.0  
mA  
(TTL Inputs)  
CE1 VIH or CE2 VIL, f = 0  
ISB2  
CMOS Standby VCC = Max., f = 0  
Current CE1 VCC 0.2V,  
Com.  
Ind.  
15  
15  
15  
15  
15  
15  
µA  
(CMOS Inputs) CE2 0.2V,  
or VIN VCC 0.2V, VIN 0.2V  
Note:  
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.  
IS62LV5128LL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)  
-70  
Min. Max.  
-85  
Min. Max.  
-100  
Min. Max.  
Symbol Parameter  
Test Conditions  
Unit  
ICC  
Vcc Dynamic  
Operating  
VCC = Max., CE = VIL  
IOUT = 0 mA, f = fMAX  
Com.  
Ind.  
45  
50  
40  
45  
35  
40  
mA  
Supply Current  
ICC1  
ISB1  
OperatingSupply  
Current  
V
CC = Max.,  
Com.  
Ind.  
5
5
5
5
5
5
mA  
I
OUT = 0 mA, f = 0  
TTL Standby  
Current  
VCC = Max.,  
VIN = VIH or VIL,  
Com.  
Ind.  
0.4  
1.0  
0.4  
1.0  
0.4  
1.0  
mA  
(TTL Inputs)  
CE1 VIH or CE2 VIL, f = 0  
ISB2  
CMOS Standby VCC = Max., f = 0  
Current CE1 VCC 0.2V,  
Com.  
Ind.  
5
5
5
5
5
5
µA  
(CMOS Inputs) CE2 0.2V,  
or VIN VCC 0.2V, VIN 0.2V  
Note:  
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.  
4
Integrated Silicon Solution, Inc. 1-800-379-4774  
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)  
-70  
Min.  
-85  
Min.  
-100  
Min.  
Symbol  
tRC  
Parameter  
Max.  
Max.  
Max.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Read Cycle Time  
Address Access Time  
Output Hold Time  
CE Access Time  
OE Access Time  
OE to High-Z Output  
OE to Low-Z Output  
CE to Low-Z Output  
CE to High-Z Output  
70  
10  
5
85  
15  
5
100  
15  
5
100  
tAA  
70  
85  
tOHA  
tACE  
tDOE  
70  
35  
25  
85  
40  
25  
100  
50  
(2)  
tHZOE  
30  
(2)  
tLZOE  
(2)  
tLZCE  
10  
0
10  
0
10  
0
(2)  
tHZCE  
25  
25  
30  
Notes:  
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V and  
outputloadingspecifiedinFigure1.  
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.  
AC TEST CONDITIONS  
Parameter  
Input Pulse Level  
Input Rise and Fall Times  
Unit  
0.4V to 2.2V  
5 ns  
Input and Output Timing  
and Reference Level  
1.5V  
Output Load  
See Figures 1 and 2  
AC TEST LOADS  
3070  
3070 Ω  
2.8V  
2.8V  
OUTPUT  
OUTPUT  
3150 Ω  
3150 Ω  
30 pF  
Including  
jig and  
5 pF  
Including  
jig and  
scope  
scope  
Figure 1  
Figure 2  
Integrated Silicon Solution, Inc. 1-800-379-4774  
5
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
AC WAVEFORMS  
READ CYCLE NO. 1(1,2)  
t
RC  
ADDRESS  
DOUT  
t
AA  
t
OHA  
t
OHA  
DATA VALID  
READ CYCLE NO. 2(1,3)  
tRC  
ADDRESS  
OE  
tAA  
tOHA  
tHZOE  
tDOE  
tLZOE  
CE  
t
ACE  
LZCE  
HIGH-Z  
t
HZCE  
t
DOUT  
DATA VALID  
Notes:  
1. WE is HIGH for a Read Cycle.  
2. The device is continuously selected. OE, CE = VIL.  
3. Address is valid prior to or coincident with CE LOW transitions.  
6
Integrated Silicon Solution, Inc. 1-800-379-4774  
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range, Standard and Low Power)  
-70  
-85  
-100  
Symbol  
tWC  
Parameter  
Min. Max.  
Min. Max.  
Min. Max.  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Write Cycle Time  
70  
65  
65  
0
33  
85  
70  
70  
0
35  
100  
80  
80  
0
40  
tSCE  
tAW  
CE to Write End  
Address Setup Time to Write End  
Address Hold from Write End  
Address Setup Time  
tHA  
tSA  
0
0
0
(4)  
tPWE  
WE Pulse Width  
60  
30  
0
60  
35  
0
80  
40  
0
tSD  
tHD  
Data Setup to Write End  
Data Hold from Write End  
WE LOW to High-Z Output  
WE HIGH to Low-Z Output  
(2)  
tHZWE  
5
5
5
(2)  
tLZWE  
Notes:  
1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof1.3V,inputpulselevelsof0.4Vto2.2VandoutputloadingspecifiedinFigure1.  
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.  
3. TheinternalwritetimeisdefinedbytheoverlapofCELOWandWE LOW. AllsignalsmustbeinvalidstatestoinitiateaWrite,butanyonecangoinactivetoterminatethe  
Write. TheDataInputSetupandHoldtimingarereferencedtotherisingorfallingedgeofthesignalthatterminatestheWrite.  
4. Tested with OE HIGH.  
AC WAVEFORMS  
WRITE CYCLE NO. 1 (CE Controlled, OE = HIGH or LOW)  
t
WC  
ADDRESS  
t
HA  
t
SCE  
CE  
tAW  
(4)  
t
PWE  
WE  
DOUT  
DIN  
t
SA  
tHZWE  
t
LZWE  
HIGH-Z  
DATA UNDEFINED  
tSD  
t
HD  
DATA-IN VALID  
Integrated Silicon Solution, Inc. 1-800-379-4774  
7
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)  
t
WC  
ADDRESS  
OE  
t
HA  
tSCE  
CE  
tAW  
t
PWE1, 2  
WE  
t
SA  
tHZWE  
t
LZWE  
HIGH-Z  
SD  
DOUT  
DIN  
DATA UNDEFINED  
t
tHD  
DATA-IN VALID  
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)  
t
WC  
ADDRESS  
OE  
t
HA  
tSCE  
CE  
tAW  
t
PWE1, 2  
WE  
t
SA  
tHZWE  
t
LZWE  
HIGH-Z  
SD  
DOUT  
DIN  
DATA UNDEFINED  
t
tHD  
DATA-IN VALID  
8
Integrated Silicon Solution, Inc. 1-800-379-4774  
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
DATA RETENTION SWITCHING CHARACTERISTICS  
Symbol Parameter  
Test Condition  
Min. Max.  
Unit  
VDR  
Vcc for Data Retention  
Data Retention Current  
See Data Retention Waveform  
Vcc = 2.0V, CE Vcc 0.2V  
2.0  
3.6  
V
IDR  
Com.  
Ind.  
2
5
µA  
µA  
tSDR  
tRDR  
Data Retention Setup Time See Data Retention Waveform  
Recovery Time See Data Retention Waveform  
0
ns  
ns  
tRC  
DATA RETENTION WAVEFORM (CE Controlled)  
t
Data Retention Mode  
t
RDR  
SDR  
V
CC  
DR  
3.0V  
2.2V  
V
CE V  
CC  
- 0.2V  
CE  
GND  
Integrated Silicon Solution, Inc. 1-800-379-4774  
9
Rev. A  
06/01/00  
IS62LV5128L  
®
IS62LV5128LL  
ISSI  
ORDERING INFORMATION  
IS62LV5128L  
Commercial Range: 0°C to +70°C  
IS62LV5128LL  
Commercial Range: 0°C to +70°C  
Speed (ns) Order Part No.  
Package  
Speed (ns) Order Part No.  
Package  
70  
85  
IS62LV5128L-70B  
IS62LV5128L-85B  
IS62LV5128L-10B  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
70  
85  
IS62LV5128LL-70B  
IS62LV5128LL-85B  
IS62LV5128LL-10B  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
100  
100  
Industrial Range: 40°C to +85°C  
Industrial Range: 40°C to +85°C  
Speed (ns) Order Part No.  
Package  
Speed (ns) Order Part No.  
Package  
70  
85  
IS62LV5128L-70BI  
IS62LV5128L-85BI  
IS62LV5128L-10BI  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
70  
85  
IS62LV5128LL-70BI  
IS62LV5128LL-85BI  
IS62LV5128LL-10BI  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
mini BGA (6mm x 8mm)  
100  
100  
®
ISSI  
IntegratedSiliconSolution, Inc.  
2231 Lawson Lane  
Santa Clara, CA 95054  
Tel: 1-800-379-4774  
Fax: (408) 588-0806  
E-mail: sales@issi.com  
www.issi.com  
10  
Integrated Silicon Solution, Inc. 1-800-379-4774  
Rev. A  
06/01/00  

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