MCDP2900 [ETC]
DisplayPort 1.4 to HDMI 2.0a protocol converter;
| 型号： | MCDP2900 |
| 厂家： | 
ETC |
| 描述： | DisplayPort 1.4 to HDMI 2.0a protocol converter |
| 文件： | 总7页 (文件大小：138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCDP2900
DisplayPort 1.4 to HDMI 2.0a protocol converter
with HDCP 2.2 repeater
Rev 5
Deep color up to 16 bits per color
Features
High Dynamic Range support (Static and
Dynamic HDR)
DisplayPort® (DP) ver. 1.4 receiver
Up to 5.4Gbps Link rate supporting
HBR2/HBR/RBR modes
3D video timings
CEC support – snooping, tunneling
HPD_IN handling
1, 2, or 4 lanes configuration
Programmable receiver equalization
Single Stream
SCDC read request handling
Polling enabled for HDMI sinks not
AUX CH 1 Mbps
supporting read requests
3.3V HPD_OUT
Video Input Processing (up to 6Gbps)
Link Training (LT) enhancements as in
DP1.4 specification
Color space conversion
10 bits per color input width
12 bits per color output width
16 bits per color pass through
Programmable coefficient 3x3 matrix
Programmable input offset
Supports eDP ASSR scrambler operation
Video Stream Handling
Up to 600MHz dual pixel path and
16bpc
RGB/ YCbCr 444/422/420 pixel
format
Programmable output offset
Programmable output clipping levels
Horizontal expansion of VESA CVT to
CEA timings as per DP1.4
specification
Chroma Down Sampling
5-tap H & V FIR filters with programmable
coefficients
DPCD and CEC
Supports DPCD data structure
revision 1.4 as per DP1.4
specification
12 bits per color input width
12 bits per color output width
Supports CEC tunneling over AUX
YCbCr444 to YCbCr420 conversion
YCbCr444 to YCbCr422 conversion
YCbCr422 to YCbCr420 conversion
DP to HDMI Stereoscopic 3D Transport
Frame Sequential to Stacked Top-
Bottom Conversion
Bypass chroma down-sampling for
YCbCr420 input over DP Link
Pass-through of other 3D formats
Audio Stream handling
Max video resolution and color depth on
HDMI TX output
LPCM and Compressed Audio
encoding formats
4Kp60Hz, RGB/YCbCr444, 8 bpc
4Kp60Hz, YCbCr422 up to 12 bpc
4Kp60Hz, YCbCr420, up to 16 bpc
4Kp30Hz, RGB/YCbCr444, up to 16 bpc
Max Audio sample rate of 192KHz x8
Channel or 768KHz x2 Channel
HDMI ver. 2.0a transmitter
600 MHz maximum TMDS character
clock
Audio stream forwarding from DP RX to
HDMI TX
DC-coupled outputs with source
termination
Up to 8-ch, 192 kHz, 24 bps LPCM audio,
AC3, DTS, Dolby-HD
TMDS character-clock divide_by_4 Mode
Scrambling over HDMI2.0a
2-ch, 768 kHz 24 bps HBR audio
Programmable edge rate control
Programmable pre-emphasis control
HDCP support
HDCP1.3 to HDCP1.4 Repeater function
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MCDP2900
HDCP2.2 to HDCP1.4 Repeater function
HDCP2.2 to HDCP2.2 Repeater function
Read-protected embedded HDCP keys
EMI reduction support
Spread spectrum for DP input
Scrambler for DP input and HDMI2.0a
output
Enhanced security
Low power operation
Encrypted on-chip key storage
Security signed application firmware
Secure boot-up procedure
570 mW in protocol converter operation
11 mW sleep mode operation
Debug ports disabled in production
ESD specification
ESD: +/-2 KV HBM, 500 V CDM
Metadata handling
ESD: +/-6.5 KV HBM connector facing
pins
HDMI TX DVI/HDMI mode setting (DPCD
register)
YCbCr444-420 conversion (DPCD
register)
Package
64 LFBGA (7 x 7 mm)
IEC60958 BYTE3 Channel Status
overwrite
Power supply voltages
3.3 V I/O; 1.2 V core
CEA861F INFOFRAME generation
CEA861.3 HDR and Mastering InfoFrame
as per DP1.4 specification
Applications
Device configuration options
Notebook, Tablet Accessories (USB Type-C
dongles, docking stations)
8Mbit SPI flash for firmware binary image
storage
AUX CH, I2C host interface
TV, Signage, Game consoles, STB
Internal video pattern generator
Configurable through DPCD registers
Figure 1.
MCDP2900 block diagram
SPI_DI
Clock
Generation
XTAL
TCLK
3.3V To l
EXT_RESETN
SPI_DO
SPI_CLK
SPI_CS
SPI
Reset
Generation
SPI_WPN
UART_RX
UART_TX
UART
OCM
V186
I2C_SDA
I2C_SCL
GPIO1_33
GPIO2_33
I2C Slave
I2C Slave
GPIO
HDMITX_DDC_SDA
HDMITX_DDC_SCA
DPRX_HPD_OUT
HPD_OUT
AUX
HPD_IN
CEC
HDMITX_HPD_IN
HDMITX_CEC
DPRX_AUX_P/_N
DPRX_L0_P/_N
DPRX_L1_P/_N
DPRX_L2_P/_N
DP to HDMI AV
Format Converter
HDCP Repeater
HDMITX_CH2_P /_N
HDMITX_CH1_P /_N
HDMITX_CH0_P /_N
HDMITX_CLK_P /_N
HDMI2.0
Transmitter
DP1.2
Receiver
DPRX_L3_P/_N
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MCDP2900
1. Description
The MCDP2900 is a power-optimized DisplayPort1.4-to-HDMI2.0a converter, targeted for enabling USB
Type-C DP Alt mode on TVs, Game consoles and other consumer equipment as well as for mobile PC and
tablet accessory applications. This device functions as an active protocol converter with HDCP1.x/ HDCP2.2
repeater supporting HDR video quality for deep color media content playback.
MCDP2900 behaves as a DP branch device with a DP-to-HDMI transport protocol converter function and
allows a DP or USB Type-C source to drive an HDMI2.0a sink device. The maximum TMDS character clock
frequency supported is 600 Mchar/s (per HDMI2.0a specification).
The MCDP2900 operates with two power supply voltages: 1.2 V and 3.3 V. It consumes:
570 mW in protocol converter operation
11 mW sleep mode operation
The MCDP2900 has a DP1.4 receiver and an HDMI2.0a transmitter. The DP receiver supports up to
5.4Gbps/lane over 4 lanes. It supports DP SST transport format on its main link and Manchester-coded AUX
signaling as the side band channel. The downstream HDMI TX port is HDMI2.0a specification compliant.
The MCDP2900 is capable of supporting Ultra High-Definition video formats with resolutions as high as 4096
x 2160 progressive @ 60 Hz (4K2Kp60Hz). It supports RGB/YCbCr video color formats with a color depth of
16 bpc (bits per component or 48 bits per pixel) as long as it fits within the DP and HDMI link bandwidth. This
device also supports pixel encoding conversion from RGB or YCbCr444 to YCbCr420 and a YcbCr420 pass-
through function. In addition, High Dynamic Range (HDR) with deep color up to 12bpc at 4Kp60Hz is
supported through the conversion of RGB/YCbCr444 over DP link to YCbCr420 on the HDMI output with a
horizontal expansion to CEA timings.
This device offers secure reception and transmission of high bandwidth digital audio and video content with
HDCP1.3 and HDCP2.2 content protection for the upstream DP interface. It also has a repeater function for
HDCP1.4 and HDCP2.2 for the downstream HDMI interface.
The MCDP2900 uses an external crystal of 27 MHz as a reference clock for its operation. An internal Power
On Reset (POR) circuit senses the voltage on the reset input and provides the chip reset during system
power-up. The device has an internal microcontroller with SPI, UART (debug only), and I2C system interface
signals. It uses an external 8Mbit SPI flash memory for storing a secure signed firmware image with fail-safe
recovery. Firmware update to the SPI flash is done securely through the DP AUX_CH or the I2C host
interface. The secure programming (In-System-Programming), secure boot, and application FW signing
process uses RSA 2048-bit root and leaf public or private key pairs.
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MCDP2900
2. Application overview
The target applications of MCDP2900 are the notebook, tablet accessories i.e., adaptors (dongles), docking
stations and other AV accessories. MCDP2900 is also intended for enabling USB Type-C DP alternative
mode for inside-the-box applications such as TVs, game consoles and other consumer equipment.
2.1. Adaptor application
In a dongle topology the MCDP2900 is part of the source side adaptor that plugs into a DP source device via
a DisplayPort connector (e.g. full-size DP or mini-DP receptacle or USB-Type-C Alt-Mode receptacle on the
upstream facing port). In the conventional DP-to-HDMI dongle application, MCDP2900 functions as a system
master and operates as a protocol converter, an HDCP1.x repeater or an HDCP2.2 repeater. In a Type-C
dongle design, a PD controller functions as the system master. The upstream source typically powers the
dongle.
Figure 2.
MCDP2900 adaptor (dongle) use case
Dongle
HDMI Cable
Source SoC
MCDP2900
HDMI Sink
2.2. Docking station application
In a docking station topology, the MCDP2900 is part of a larger system into which a DP source device plugs
in via a custom connector or USB-Type-C Alt-Mode receptacle on the upstream facing port. In a docking
station design the MCDP2900 typically co-exists with other system components such as the system host or
PD controller, AV switch, and USB hub. In this application, the MCDP2900 functions as a protocol converter,
an HDCP1.x repeater, or an HDCP2.2 repeater.
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MCDP2900
2.3. TV Application
A TV system featuring the USB Type-C connector supporting the DP Alt-mode requires a DP-to-HDMI
protocol converter. The MCDP2900 is an ideal fit for such applications; it supports video resolution up to
4K60Hz with HDR video quality for deep color media playback, end-to-end HDCP2.2 content protection, and
CEC tunneling over DP for single-point remote-control access for all connected devices.
USB
USB Type-C cable
CPU /
TV SoC
Source SoC
HDMI
DP
MCDP2900
I2C
3. Ordering information
Table 1. Order codes
Description
Part number
MCDP2900A2
64 LFBGA (7x7x1.4 mm) in Tray
MCDP2900A2T
MCDP2900A4
MCDP2900A4T
64 LFBGA (7x7x1.4 mm) in Tape & Reel
64 LFBGA (7x7x1.4 mm) in Tray
64 LFBGA (7x7x1.4 mm) in Tape & Reel
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MCDP2900
4. Revision history
Table 2. Document revision history
Date
08-Jun-2015
27-Nov-2015
16-May-2016
03-Aug-2017
18-May-2018
Revision
Changes
Initial release.
1
2
3
4
5
Updated Features and Descriptions.
Updated with changes throughout the data brief.
Updated Features, Descriptions, and Ordering Information.
Removed reference to VDD12_ON signal.
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MCDP2900
Notice
Semiconductor products may possibly experience breakdown or malfunction. Adequate care should be taken with respect to the safety design of equipment in order
to prevent the occurrence of human injury, fire or social loss in the event of breakdown or malfunction of semiconductor products
The overview of operations and illustration of applications described in this document indicate the conceptual method of use of the semiconductor product and do not
guarantee operability in equipment in which the product is actually used.
The names of companies and trademarks stated in this document are registered trademarks of the relevant companies.
MegaChips Co. provides no guarantees nor grants any implementation rights with respect to industrial property rights, intellectual property rights and other such rights
belonging to third parties or/and MegaChips Co. in the use of products and of technical information including information on the overview of operations and the circuit
diagrams that are described in this document.
The product described in this document may possibly be considered goods or technology regulated by the Foreign Currency and Foreign Trade Control Law. In the
event such law applies, export license will be required under said law when exporting the product. This regulation shall be valid in Japan domestic.
In the event the intention is to use the product described in this document in applications that require an extremely high standard of reliability such as nuclear
systems, aerospace equipment or medical equipment for life support, please contact the sales department of MegaChips Co. in advance.
All information contained in this document is subject to change without notice.
Copyright © 2016 MegaChips Corporation All rights reserved
Contact
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TEL: +886-2-2547-1297
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C2900-PBR-01
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