MK2302S-01 [ETC]
Multiplier and Zero Delay Buffer; 乘法器和零延迟缓冲器型号: | MK2302S-01 |
厂家: | ETC |
描述: | Multiplier and Zero Delay Buffer |
文件: | 总6页 (文件大小:151K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MK2302S-01
Multiplier and Zero Delay Buffer
Description
Features
The MK2302S-01is a high performance Zero Delay
Buffer (ZDB) which integrates ICS’ proprietary
• 8 pin SOIC package
• Low input to output skew of 250ps max
• Absolute jitter ± 500ps
analog/digital Phase Locked Loop (PLL) techniques.
The chip is part of ICS’ ClockBlocksTM family and was
designed as a performance upgrade to meet today’s
higher speed and lower voltage requirements. The zero
delay feature means that the rising edge of the input
clock aligns with the rising edges of both output clocks,
giving the appearance of no delay through the device.
There are two outputs on the chip, one being a
low-skew divide by two of the other output.
• Propagation Delay ± 350ps
• Ability to choose between different multipliers from
0.5X to 16X
• Output clock frequency up to 133 MHz at 3.3V
• Can recover degraded input clock duty cycle
• Output clock duty cycle of 45/55
• Full CMOS clock swings with 25mA drive capability
at TTL levels
The MK2302S-01 is ideal for synchronizing outputs in a
large variety of systems, from personal computers to
data communications to graphics/video. By allowing
off-chip feedback paths, the device can eliminate the
delay through other devices.
• Advanced, low power CMOS process
• Operating voltage of 3.3V or 5V
• Industrial temperature version available
Block Diagram
ICLK
S1:0
Phase
Detector,
Charge
Pum p,
and Loop
Filter
VCO
CLK1
CLK2
/2
divide
by N
FBIN
External feedback can com e from CLK1 or CLK2 (see table on page 2)
MDS 2302S-01 B
1
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK2302S-01
Multiplier and Zero Delay Buffer
Pin Assignment
FBIN
ICLK
GND
S0
8
7
6
5
1
2
3
4
CLK2
VDD
CLK1
S1
8 pin (150 mil) SOIC
Clock Multiplier Decoding Table 1
(Multiplies Input clock by shown amount)
FBIN
S1
S0
CLK1
CLK2
CLK1
CLK1
CLK1
CLK1
CLK2
CLK2
CLK2
CLK2
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
2 X ICLK
4 X ICLK
ICLK
ICLK
2 X ICLK
ICLK/2
8 X ICLK
4 X ICLK
8 X ICLK
2 X ICLK
16 X ICLK
4 X ICLK
2 X ICLK
4 X ICLK
ICLK
8 XICLK
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
2
3
4
5
6
7
8
FBIN
ICLK
GND
S0
Input
Input
Power
Input
Input
Feedback clock input.
Reference clock input.
Connect to ground.
Select 0 for output clock per decoding table above. Pull-up.
Select 1 for output clock per decoding table above. Pull up.
S1
CLK1
VDD
CLK2
Output Clock output per table above.
Power Connect to +3.3V or +5.0V.
Output Clock output per table above. Low skew divide by two of pin 6 clock.
MDS 2302S-01 B
2
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK2302S-01
Multiplier and Zero Delay Buffer
External Components
The MK2302S-01 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must
be connected close to the part to minimize lead inductance. No external power supply filtering is required
for this device. A 33ꢀ series terminating resistor can be used next to each output pin.
Using CLK1 as the feedback will always result in synchronized rising edges between ICLK and CLK1.
However, the CLK2 could be a falling edge compared with ICLK. ICS recommends using CLK2 feedback
whenever possible. This will synchronize the rising edges of all three clocks.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK2302S-01. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7V
-0.5V to VDD+0.5V
-55 to 125LC
-65 to +150LC
175LC
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Power Dissipation
0.5W
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
LC
Ambient Operating Temperature, Commercial
Ambient Operating Temperature, Industrial
Power Supply Voltage (measured in respect to GND)
Power Supply Voltage (measured in respect to GND)
0
-40
+85
LC
+4.5
+3.15
+5.0
+3.3
+5.5
+3.45
V
V
MDS 2302S-01 B
3
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK2302S-01
Multiplier and Zero Delay Buffer
DC Electrical Characteristics
VDD = 3.3V ±5%, Ambient Temperature 0 to +70LC or -40LC to 85LC
Parameter
Operating Voltage
Operating Current
Input High Voltage
Input Low Voltage
Input High Voltage
Symbol Conditions
Min.
Typ.
Max.
Units
VDD
IDD
3.15
3.45
V
ma
V
20
VIH
VIL
VIH
VIM
ICLK, FBIN
ICLK, FBIN
S0, S1
2
0.8
0.5
0.4
V
VDD-0.5
V
Input Low Voltage
(mid-level)
S0, S1
VDD/2
V
Input Low Voltage
VIL
S0, S1
V
V
Output High Voltage
(CMOS High)
VOH
IOH = -4 mA
VDD-0.4
2.4
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance
VOH
VOL
IOS
IOH = -12 mA
IOL = 12mA
Each output
S0, S1
V
V
±70
5
mA
pF
CIN
VDD = 5V ±10%, Ambient Temperature 0 to +70LC or -40LC to 85LC
Parameter
Operating Voltage
Operating Current
Input High Voltage
Input Low Voltage
Input High Voltage
Symbol Conditions
Min.
Typ.
Max.
Units
VDD
IDD
VIH
VIL
5V
4.5
5.5
V
ma
V
30
ICLK, FBIN
ICLK, FBIN
S0, S1
2
0.8
0.5
0.4
V
VIH
VIM
VDD-0.5
V
Input Low Voltage
(mid-level)
S0, S1
VDD/2
V
Input Low Voltage
VIL
S0, S1
V
V
Output High Voltage (CMOS
High)
VOH
IOH = -4 mA
VDD-0.4
2.4
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance
VOH
VOL
IOS
IOH = -12 mA
IOL = 12mA
Each output
S0, S1
V
V
±100
5
mA
pF
CIN
MDS 2302S-01 B
4
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK2302S-01
Multiplier and Zero Delay Buffer
AC Electrical Characteristics
VDD = 3.3V or 5V ±5%, Ambient Temperature 0 to +70L C or -40LC to 85LC
Parameter
Input Frequency, ICLK
Output Clock Frequency
Output to Output Skew
Input to Output Jitter
Input Skew,
Symbol
Conditions
FBIN from CLK/2
CLK1
Min.
Typ.
Max. Units
See table on page 2
168
10
MHz
ps
100
175
200
300
40 - 150 MHz
ps
ICLK to FBIN,
CLK>30MHz, Note 1
-300
-600
ps
ICLK to FBIN,
600
ps
CLK<30MHz, Note 1
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
0.8 to 2.0V, Note 2
2.0 to 0.8V, Note 2
at VDD/2
0.8
0.8
1
1
ns
ns
ꢁ
40
49 - 51
60
Note 1: Assumes clocks with same rise time, measured from rising edges at VDD/2
Note 2: Measured with 27ꢀ terminating resistor and 15pF loads
Thermal Characteristics
Parameter
Symbol
Conditions
Still air
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
ꢂ
ꢂ
ꢂ
150
140
120
40
LC/W
LC/W
LC/W
LC/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
ꢂ
MDS 2302S-01 B
5
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
MK2302S-01
Multiplier and Zero Delay Buffer
Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters
Inches
Min
Symbol
Min
1.35
0.10
0.33
0.19
4.80
3.80
Max
1.75
0.25
0.51
0.25
5.00
4.00
Max
.0688
.0098
.020
A
A1
B
C
D
E
e
.0532
.0040
.013
E
H
INDEX
AREA
.0075
.1890
.1497
.0098
.1968
.1574
1
2
1.27 BASIC
0.050 BASIC
H
h
5.80
0.25
0.40
0L
6.20
0.50
1.27
8L
.2284
.010
.016
0L
.2440
.020
.050
8L
D
L
ꢀ
A
h x 45
A1
C
- C -
e
SEATING
PLANE
α
B
L
.10 (.004)
C
Ordering Information
Part / Order Number Marking (for both)
Shipping Pkg
Tubes
Tape and Reel
Tubes
Package
Temperature
MK2302S-01
MK2302S-01T
MK2302S-01I
MK2302S-01IT
MK2302S-01
MK2302S-01
MK2302S-01I
MK2302S-01I
8 pin SOIC
8 pin SOIC
8 pin SOIC
8 pin SOIC
0 to +70L C
0 to +70L C
-40 to 85L C
-40 to 85L C
Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit
Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of
third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended
temperature range, high reliability, or other extraordinary environmental requirements are not recommended
without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice.
ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 2302S-01 B
6
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
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