MT6223 [ETC]
手机基带芯片;
| 型号： | MT6223 |
| 厂家： | 
ETC |
| 描述： | 手机基带芯片 手机 |
| 文件： | 总22页 (文件大小：1004K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MT6223(P) Phone Design Notice
2007/07/03
WCP/SA/RP1
MediaTek Confidential
Subject to Change without Notice
MT6223 Package
Package
Substrate
Thk.
Body Size Ball Count Ball Pitch
Ball Dia.
Stand Off
Thk.
A (Max.)
1.2
D
E
N
e
b
A1
C
9.0
9.0
224
0.5
0.275
0.21
0.36
MediaTek Confidential
Subject to Change without Notice
MT6223 vs MT6205
MT6205B
MT6223
Parallel I/F
LCM I/F
X
V
8/9-bit
Serial I/F
V
Input
X
Stereo
FM
Radio
Recording
Channel
X
Mono
X
2
Audio
DAC
Resolution
X
AC
I2C
I2S
X
V
X
V
DAI/PCM
I2S
Voice Link
Audio Link
X
BT
X
EINT
X
4
Keypad
5x5
5x6
2
3
UART
ADC
(115.2kbps)
(921.6kps)
5
3(ext)+4(int)
MT6223P
only
MeSWCard
X
Subject t
Keypad
VDD
(5x6 + one pow er-key) key m atrix
D edicated for P ow er-key
C O L 0 C O L 1 C O L 2 C O L 3 C O L 4 C O L 5 C O L 6
R209
NC
D3
C2
E4
D2
B1
PWRKEY
PWRKEY
RESET
VMSEL
RSTCAP
VREF
R O W 4
R O W 3
R O W 2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
/SYSRST
S16
KSW
1
1
1
1
C231
100n
C249
100n
C229
100n
[PWR/End]
G10
G9
H8
LED_B
LED_G
R O W 1
R O W 0
•MT6223 is 5x6 matrix
•COL6 is dedicated for POWER_KEY
B aseband
P M IC
(internal connection).
P M IC integrated B B chip
MediaTek Confidential
Subject to Change without Notice
ADC
ADC channel
Function
Pin out
AUXADC_0
AUXADC_1
External ADC channel
External ADC channel
M2
M3
AUXADC_2
AUXADC_3
AUXADC_4
AUXADC_5
AUXADC_6
AUXADC_7
External ADC channel
N2
x
Internal reference voltage
ADC for Charger voltage detection
ADC for charging current sense
ADC for Battery Voltage detection
Auxiliary ADC channel 0 data register for TDMA event 0
x
x
x
x
MediaTek Confidential
Subject to Change without Notice
MT6223 Speech & Audio
Features
MT6205 MT6223
Audio Amp-L
DSP
1
2
Audio
LCH-DAC
AU_MOUTL
Speed
52MHz 104MHz
Audio
Signal
Stereo-
to-Mono
AU_MOUTR
FR
V
V
V
X
X
X
X
X
V
V
V
V
V
V
V
V
Audio
RCH-DAC
Audio Amp-R
HR
AU_FMINL
Speech
FM/AM radio
Stereo-
to-Mono
EFR
chip
Codec
AU_FMINR
AMR FR
Voice Amp-0
AU_OUT0_P
Voice
Signal
AMR HR
Voice DAC
AU_OUT0_N
CTM
UL
DL
Noise
Reduction
AU_VIN0_P
PGA
Noise
Suppression
Voice
Signal
X
V
V
AU_VIN0_N
AU_VIN1_N
Voice ADC
Echo Cancellation
X
V
X
X
X
AU_VIN1_P
Echo Suppression
V
V
V
V
VR
MP3
MediaTek Co
WT 64Tones
Subject to Change
LCD & Memory Card I/F
LCD IO
D8
D7
D6
D5
D4
D3
D2
D1
D0
Parallel IF
PD8
PD7
Pd6
PD5
PD4
PD3
PD2
PD1
PD0
Serial IF
SCLK
SDA
SA0
MCDA MCDA MCDA MCDA
1
MSDC IF
MCCM
3
2
0
VDD
VDD
Push-To-Push
T-Flash Card
•LCD I/F can control 2 LCMs and 1
memory card at the same time.
R811
47K
R813
47K
R809
47K
R812
47K
R810
47K
J802
1
•Memory Card I/F is MT6223P only.
LCD2
LCD3
LCD4
DAT2
CD/DAT3
CMD
VDD
CLK
VSS
DAT0
DAT1
2
3
4
5
6
7
8
9
VSS
VSS
VSS
10
11
12
•For SW memory card, if EINT is
exhausted, it could uses MFIQ for
Card detection. Anyway MFIQ acts
when 26MHz system clock on.
MCCK
Detect
LCD0
LCD1
200 R814
TFRPN-00815-TP00
C805
4.7uF
VR803 VR801 VR805 VR804 VR806
VR807 VR802
MFIQ_CradIn
High : Card push out
Low : Card push in
MediaTek Confidential
Subject to Change without Notice
PMU of MT6223
MT6305B
MT6318
AC
MT6223
CHRIN
1.1 Charger Schematics
1
2
3
4
5
CHRIN
GATEDRV
ISENSE
GDRVAC
ISNENSE
VBAT
GATEDRV
ISENSE
BATSNS
BATDET
BATSENSE
BATDET
BAT_ON
X (Through
SPI)
X (Internal)
X (Internal)
6
7
CHRCNTL
CHRDET
INT
BATUSE
(Li-ion and NiMH)
X (Only Li-ion)
8
X (Only Li-ion)
USB
X (Share with
CHRIN)
X (Share with
CHRIN)
9
X (Share with
CHRIN)
X (Share with
CHRIN)
10
11
12
GDRVUSB
VB_OUT
X (External
Resistor)
X (Internal)
ISENSE
_OUT
X (External
Resistor)
X (Internal)
Me
Subject t
Total
8
10
5
PMU of MT6223
1.2 Charger Current
MT6305B
0.4 Ohm
25
MT6318
MT6223
0.2 Ohm
62.5
62.5
90
Sense Resistor
0.2 Ohm
62.5
62.5
90
Pre-Charge
0
1
2
150
150
3
225
225
CC
400
4
300
300
5
450
450
6
650
650
7
800
800
For Layout:
Connect ISENSE and BATSNS directly to the two terminal of sense resistor
to get a precise charge current. Don’t connect BATSNS to other VBAT trace
near IC, which could cause charge current mismatch for over hundreds mA.
MediaTek Confidential
Subject to Change without Notice
PMU of MT6223
1.3 Charger Protection
MT6305B MT6318 MT6223 OVP/OCP
Max. Charger Input
Charger OVP Point
15V
9V
15V
9V
9V
7V
30V
6.8V
Ext_OVP/OCP:
R201
0
U202
IN
TO CHRIN
F201
VCHG
1
8
CHRIN
OUT
FUSE(1A 0603)
C235
2
3
4
7
6
5
C205
1uF
VSS
NC
ILIM
VBAT
/CE
25K
/fault
BQ24316
VBAT
R202
220K
MediaTek Confidential
Subject to Change without Notice
PMU of MT6223
2. LDO
LDO Current
MT6305B (mA)
200
MT6318 (mA)
200
MT6223 (mA)
VCORE
VA
200
125
100
75
20
20
250
V
150
100
150
20
20
X
150
100
150
20
VIO
VM
VTCXO
VSIM
20
VRF
X
VRTC
BAT_BACKUP
VUSB
VMC
V
V
X
V
V
X
20
X
X
250
50
X
VSW_A
VIBR
X
X
X
200
X
MediaTek Confidential
Subject to Change without Notice
PMU of MT6223
LDO-Capacitor Selection
BAT_
_BACKUP
LDO
VA
4.7 uF 4.7 uF
X5R X5R
VRF
VTCXO VCORE
VIO
VM
VSIM
VRTC
1 uF
X5R
2.2 uF
X5R
1 uF
X5R
1 uF
X5R
1 uF
X5R
0.1uF
X5R
0.1 uF
X5R
Output
Capacitor
VRF_SENSE layout notice
The VRF_SENSE pin should
connect to MT6139’s power in
pin directly to reduce the
voltage drop. And the
VRF_SENSE trace should be
protected by GND in layout.
MediaTek Confidential
Subject to Change without Notice
PMU of MT6223
3. SIM
MT6305B
MT6318
SIO
MT6223
SIO
1
SIO
SRST
C6
D6
B5
A5
2
SRST
SRST
SIMRST
SIMCLK
SIMIO
VSIM
3
SCLK
SCLK
SCLK
J219
1
2
4
6
CLK
I/O
VPP
GND
4
SIMIO
SIMRST
SIMCLK
SIMVCC
SIMSEL
8
SIMIO
X (Internal)
X (Internal)
X (Internal)
X (Internal)
X (Internal)
3
3
VSIM
RST
5
C241
nc
VCC
C236
nc
C243
nc
C246
2.2u/6.3V (X5R)
5
SIMRST
SIMCLK
SIMVCC
X (Through SPI)
7
ID1A-6S-2.54SF
6
7
The equivalent capacitor on SIM
I/F must be under 100pF to
insure operation normally.
8
Total
MediaTek Confidential
Subject to Change without Notice
PMU of MT6223
4. LED & Vibrator Driver
Driver
Current Capability
LED_R
LED_G
LED_B
LED
25 mA
25 mA
25 mA
150 mA
VIBRATOR
250 mA
•LED with PWM2 control duty cycle
•Vibrator/LED_X without PWM
MediaTek Confidential
Subject to Change without Notice
VRF Design Note
● Place a 4.7uF X5R capacitor close to PMU to keep stabilization and
performance
● Place a 4.7uF X5R capacitor close to RF transceiver to keep stabilization
and performance
● Keep VRF trace > 15mil
● Connect sense pin, VRF_SENSE, to RF’s power to reduce the voltage drop
due to layout and package.
● Protect VRF_SENSE with GND vias and planes.
MediaTek Confidential
Subject to Change without Notice
VTCXO Design Note
● Place a 1.0uF X5R bypass cap. and reserve a series 0402 0Ohm near PMU
● Place 1uF X5R//10pF bypass cap. and reserve a series 0402 0Ohm close to
TRx pin16 VCCSYN
● Protect VTCXO with GND vias and planes. If RF is on top layer, suggest to
put VTCXO routing on layer5 with good GND planes layer4 and layer6
● Do not place any power, analog, digital, and signal traces and vias parallel
or close to VTCXO routing.
● Keep VTCXO trace > 15mil
● Do not place VTCXO trace across layers under RF transceiver /Crystal
● Placement of PMU and RF transceiver as close as possible
MediaTek Confidential
Subject to Change without Notice
MT6223 Memory Support Plan
GPRS
NOR
RAM
Phone
Module
Intel Crystal (burst, deMux)
ST M36W0R6040U3 (64+16 AD MUX, Intel pinout)
16
Intel Crystal (burst, deMux)
64
Spansion PLJ (70/30/16)
ST M36W0R6050T1 (64+32 deMux)
ST M36W0R6050U0 (64+32 AD MUX)
Toshiba TV00560002DDGB (70/30/16)
32
Samsung K5N3208ATM (32+16, ADMUX, Spansion pinout)
8
Intel Crystal (burst, deMux)
32
Spansion NSJ (burst)
16
ST M36W0R5040U3 (32+16 AD MUX, Intel pinout)
Remark: Spansion VSK, ES at Aug/07, 2008 Q1 MP
MediaTek Confidential
Subject to Change without Notice
AD_Mux MCP
For AD_Mux MCP:
1.EA0~15 are share with ED0~15.
2.Baseband’s EA17 connect to AD_Mux
MCP EA16
R-CRE: control register enable;
for cellularRAM only
U500
ED[0..15]
ED0
ED1
ED2
ED3
ED4
ED5
ED6
ED7
ED8
J14
J13
H11
H10
J9
J8
H7
K10
ECRE
A/DQ0
A/DQ1
A/DQ2
A/DQ3
A/DQ4
A/DQ5
A/DQ6
A/DQ7
A/DQ8
A/DQ9
A/DQ10
A/DQ11
A/DQ12
A/DQ13
A/DQ14
A/DQ15
A16
A17
A18
A19
A20
A21
A22
A23
R-CRE
F11
F9
VMEM
F-ACC
Vcc
VccQ
VccQ
G5
J12
H6
H13
H12
J11
J10
H9
H8
J6
ED9
ED10
ED11
ED12
ED13
ED14
K9
CE_PS1#
/ECS1
E10
E9
R-UB#
R-LB#
/EUB
/ELB
ED15
EA17
EA18
EA19
EA20
EA21
EA22
J5
G6
F13
G12
F12
G7
F6
F14
G9
EA[17..22]
F5
F8
G8
F10
H14
EWAIT
ECLK
/EADV
/EWR
/ERD
RY_BY#f/RDY
CLK
R510
0ohm
AVD#
WE#
OE#
R511
0ohm
EA23
R512 0ohm(NC)
EA24
G11
G10
G13
VMEM_EMI
/WATCHDOG
/ECS0
/ECS2
WP#/ACC
RESET#
CE_F1#
Burst mode MCP must
check EWAIT, ECLK, and
/EADV
MediaTek Confidential
Subject to Change without Notice
Tools for MT6223
● Flash Tool/ MutilPortDownLoad : Ver_3.1.05
● META : Ver_5.3.8
● ATE : Ver_5.3.8
MediaTek Confidential
Subject to Change without Notice
PCB note_4Layer-I
•MT6223 0.5mm Pitch，top layer
的trace在ball與ball之間必需要使
用到3mil/3mil (線寬/線距)，當走出
chip時,就要用4mil/4mil (線寬/線
距)；雷射孔4/12 mil
(Drill/Diameter)。
•內圈ball：優先使用1-4層貫孔，走
內層，因內圈大多是GND pin，建
議要配合1-2層雷射孔一起使用。
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PCB note_4Layer-II
第4 圈ball：第一優先使用1-4層貫孔，
走內層。第二是使用1-2層雷射孔走L2
層。
第3圈ball：第一優先使用1-2層雷射
孔走L2層。第二是，若內圈有空
間，可使用1-4層貫孔，走內層。若
TOP走線有穿過ball，線寬與線距就
要3mil。
MediaTek Confidential
Subject to Change without Notice
PCB note_4Layer-III
第2圈ball：第一優先使用3mil
線寬的TOP走線，第二才是使
用1-2層的雷射孔，走L2層。若
TOP走線有穿過ball，線寬與
線距就要3mil。
第1圈ball：第一優先使用4mil
線寬的TOP走線，第二才是使
用1-2層的雷射孔，走L2層。若
TOP走線有穿過ball，線寬與
線距就要3mil。
6-layer
每圈ball的走線方式，大致與 4-layer相
同，因6-layer會多埋孔，所以不同在於第
4圈及內圈會以1-2層雷射孔加2-5層埋孔
Media為主。
Subject to Change without Notice
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