MTD492 [ETC]

Coaxial Transceiver Interface; 同轴电缆收发器接口
MTD492
型号: MTD492
厂家: ETC    ETC
描述:

Coaxial Transceiver Interface
同轴电缆收发器接口

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中文:  中文翻译
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MYSON  
TECHNOLOGY  
MTD492  
Coaxial Transceiver Interface  
FEATURES  
Compatible with IEEE 802.3 10Base5 (Ethernet) and 10Base2 (Cheapernet).  
Internal AUI squelch circuitry for noise rejection.  
Transmission IDL detection at end of packet and dribble bit rejection window.  
Reception dribble bit rejection window.  
Reception and transmission mode collision detection.  
Extended collision detection to turn off receiving path.  
CD heartbeat externally controllable.  
Advanced low-power, high-performance CMOS technology.  
ESD protection greater than 2000 Volts.  
16-pin PDIP and 28-pin PLCC packages.  
GENERAL DESCRIPTION  
The MTD492 transceiver integrates the coaxial cable interface functions of the Medium Attachment Unit  
(MAU) in Ethernet or Cheapernet LAN applications. In an Ethernet 10Base5 network, MTD492 is mounted  
on the thick Ethernet coaxial cable and connects to a station through an AUI cable. For Cheapernet  
applications, MTD492 is connected to the Cheapernet coaxial cable through a BNC connector and is  
usually mounted on the LAN adapter in a station.  
BLOCK DIAGRAM  
COAX  
RX+  
RX-  
AUI  
DRIVER  
HIGH PASS  
EQUALIZATION  
C O M  
LOW PASS  
FILTER  
FXI  
CD+  
CD-  
AUI  
DRIVER  
-
+
CARRIER  
SENSE  
GND  
LOW PASS  
FILTER  
TX+  
TX-  
125  
10K  
XMT  
COLLISION  
-
+
V E E  
CDS  
LOW PASS  
FILTER  
RECV  
TXO  
+
-
WAVEFORM  
SHAPING  
DC/AC  
SQUELCH  
CLK  
10MHz  
OSC  
WATCH DOG  
TIMER 26ms  
JABBER RESET  
TIMER 0.4sec  
XMTSQ  
VEE  
RR+  
REFERENCE  
CIRCUIT  
1K  
RECEIVE  
STATE  
MACHINE  
TRANSMIT  
STATE  
MACHINE  
RR-  
HBE  
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice. No  
liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.  
MTD492 Revision 3.5 01/07/1997  
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MYSON  
TECHNOLOGY  
MTD492  
1.0 CONNECTION DIAGRAM  
VEE  
VEE  
VEE(NC)  
VEE  
CD+  
CD-  
RX+  
VEE  
VEE  
RX-  
TX+  
TX-  
CDS  
TX0  
RXI  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
VEE  
VEE  
VEE  
RR-  
RR+  
GND  
HBE  
MTD492V  
28 PIN PLCC  
MTD492N  
16 PIN PDIP  
VEE  
VEE  
VEE(NC)  
VEE(NC)  
VEE(NC)  
VEE  
VEE(NC)  
RR-  
2.0 PIN DESCRIPTIONS  
Name I/O PDIP PLCC  
Description  
Pin#  
Pin#  
TX+,TX-  
HBE  
I
I
7,8  
13,14  
Transmission Data Input. A balanced differential line receiver which  
receives inputs from the off-chip Manchester Code Converter(MCC) to  
the Transmitter. The common mode voltage on TX+ is set internally .  
Heartbeat Enabler. The CD heartbeat test is enabled when HBE is  
connected to Ground and disabled when HBE is connected to VEE.  
This pin is internally biased at 0.5 VEE. Test mode is enabled if this  
pin is left floating or biased in the range of -3.5V to -5.5V. Jabber is  
disabled in test mode. Exiting the jabber disable mode requires at  
least jabber reset time.  
9
15  
RR+,RR-  
RXI  
I
I
I
11,12 18,19  
External Resistor. A 1k/1% resistor should be connected across  
these pins to correctly set internal operating currents. RR+ is  
internally shorted to GND.  
14  
16  
26  
1
Network Receiving Input. Should be connected to the COAX center  
conductor. Signals meeting receiver squelch limits are recovered and  
output on RX+. RXI also detects the collision voltage level.  
Collision Detection Sense. Connects directly to the COAX  
shield, providing a reference for the collision detection voltage  
level for reception-mode detection. An external bias network can be  
used to shift the detection threshold for transmission-detection mode.  
Collision Output. A balanced differential line driver drives this  
output pair from the collision detection circuitry. A 10MHz signal from  
the internal oscillator is transferred to these outputs in the event of  
collision, excessive transmission (jabber), or during heartbeat  
condition. These outputs are open sources, and pull-down resistors of  
510to VEE are required. To minimize power dissipation, both open  
source outputs are disabled during idle condition, allowing the  
common mode on the pull-down resistors to be pulled to VEE.  
CDS  
CD+,CD-  
O
1,2  
2,3  
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TECHNOLOGY  
MTD492  
RX+,RX-  
O
O
3,6  
4,12  
Reception Data Output. A balanced differential output drives the  
data  
recovered from the network to the MCC. These outputs are also open  
sources, and pull-down resistors of 510to VEE are required. These  
pins are biased at -2V during idle time. When an extended period of  
collision condition happens, the receiving path is disabled. Any  
interruption of collision will re-enable the receiving path.  
Transmission Output. Should be connected to the coaxial cable via  
either one (Cheapernet) or 2 serial isolation diodes (Ethernet).  
Positive Supply Pin(Ground). Should be connected to the COAX  
shield.  
TXO  
GND  
VEE  
15  
10  
28  
17  
4,5, 5, 6, 7,  
13 8, 9, 10,  
11, 20,  
Negative Power Supply. -9 Volts. A 0.1µF decoupling capacitor  
must be connected across GND and VEE as close to the device as  
possible.  
21, 22,  
23, 24,  
25  
3.0 FUNCTIONAL DESCRIPTIONS  
3.1. Transmission Path  
The transmission data is input from TX+/- pins differentially. In general, this differential signal is coupled  
through an AUI isolation transformer. In the MAU design, it is preferable that an equivalent 78 Ohm load be  
placed across these 2 pins for proper loading for the signal source. Improper load termination may cause  
excess undershoot at the end of the packet, which causes the dribble bit to be transmitted erroneously.  
The transmission signal is first checked against the on-chip DC/AC squelch condition. If the signal is  
greater than the squelch threshold (-175 to -300 mV) and the width is wider than 17 nsec, the squelch is  
turned off. The squelch remains off until the DC squelch condition is not met or an end-of-packet IDL is  
detected (at the end of the packet, data remains at 1 for longer than 175 nsec). Once IDL is detected,  
MTD492 provides a 0.8 usec rejection window that prevents dribble bit transmission at the AUI interface.  
When the squelch is off, the transmission path is enabled and data is fed into a waveform shaping circuit  
followed by the transmission output buffer. The waveform shaping function controls the output rise/fall time  
between 20nsec and 30 nsec, and minimizes the mismatch between the rise/fall time. MTD492 provides a  
current source output that should be connected to the coaxial cable through at least one isolation diode.  
When data is high, the output current is virtually zero (there is approximately less than 1mA output in this  
state to maintain the linearity of the output buffer); when data is low, the output current peaks at around 80  
mA. This provides an approximate 2V peak to peak swing on a 25 Ohm load. Due to the nature of  
Manchester code, the average output DC current is half of the peak - 40 mA, i.e. 1V DC average on the  
cable 25 Ohm load.  
3.2. Reception Path  
The signal on the coaxial cable is first buffered. The DC average of the signal is extracted by a low pass  
filter. When the DC average exceeds the carrier sense threshold (Vcs), the reception data path is turned  
on. The signal goes through a high pass filter for equalization of high frequency loss on the cable and then  
is compared with its center value. The comparator output is amplified by the AUI driver to provide adequate  
driving for the RX+/- output.  
The end of the packet is determined by 2 conditions. If the received data is high longer than 175nsec or the  
DC average does not meet the carrier sense threshold, the reception data path is turned off. MTD492 then  
appends the IDL pulse to the end of the packet. A rejection window of 1 usec that blocks the data reception  
path is also turned on.  
MTD492 Revision 3.5 01/07/1997  
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TECHNOLOGY  
MTD492  
The RX+/- output pin is driven by a source follower. Therefore, an external pull-down load is required for  
these 2 pins. During idle state, RX+/- is biased at around -1.5V.  
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TECHNOLOGY  
MTD492  
3.3. Collision Detection Path  
In 10Base2 and 10Base5, a collision condition is determined by the DC level on the cable. The DC average  
is extracted by a low pass filter. The output of the filter is compared with an internally set threshold (Vcd) to  
determine the collision condition. The internal threshold is set for the reception-collision mode. By  
definition, MTD492 will detect collision conditions caused by more than 2 stations simultaneously  
transmitting.  
The collision detection threshold can be shifted by applying a voltage to the CDS pin. This is typically done  
by a resistor divider network between GND and VEE to implement the transmission-collision mode  
detection. Transmission-collision differs from reception-collision in that transmission-collision will only  
detect a 2-station collision if it is transmitting.  
Once a collision is detected, MTD492 turns on the CD+/- pins. These 2 pins are also driven by source  
followers, thus requiring external pull-down resistors. However, the followers are disabled during idle time,  
and CD+/- will be pulled down to VEE and no current will flow through the external resistors.  
Because Vcd is always larger than Vcs, when a collision occurs the reception path will also be turned on.  
MTD492 implements an internal timer of 250 msec to detect the extended collision period. When a collision  
condition period extends beyond this timer, the reception path is turned off. Any interruption of the collision  
will reset the timer.  
3.4. Reference and Control  
The internal reference of MTD492 is generated by an on-chip bandgap circuit. An external resistor  
connected between RR+ and RR- pins is used to set the reference current level. Typically, a precision 1K  
Ohm resistor should be used. RR+ is internally shorted to GND, while RR- is biased at around -1.25V.  
The heartbeat and jabber functions of MTD492 are implemented in the transmission state machine. The  
heartbeat function is controlled by the HBE pin. MTD492 also provides a test mode that disables the jabber  
function also controlled by the HBE pin. HBE has a 3-level input. It is biased internally at around -4.5V  
(0.5Vee). When HBE is pulled high by a low value resistor (<4.7K), the heartbeat function is enabled; when  
it is pulled low, the heartbeat is disabled. If it is driven to the mid-level or left floating, the jabber is disabled.  
The exit of the jabber disable state takes about 0.5 sec (jabber reset time).  
4.0 ABSOLUTE MAXIMUM RATINGS  
DC Supply Voltage(VEE)  
Input Voltage  
Storage Temperature  
Ambient Operating Temperature  
ESD Protection except for Pin14  
-12V  
GND+0.3 to VEE-0.3V  
o
o
-65 to 150 C  
o
o
0 to 70 C  
2000V  
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TECHNOLOGY  
MTD492  
5.0 ELECTRICAL CHARACTERISTICS (under operating conditions) (Note 1)  
OPERATING CONDITIONS  
DC Supply Voltage (VEE)  
Operating Temperature  
8.55-9.45V  
o o  
0 to 70 C  
Parameter  
Recommended Supply Voltage  
Symbol  
VEE  
IEEidle  
IEExmt  
Irxi  
Min  
-8.55  
-
Typ  
-9.0  
-25  
-70  
-
Max  
Unit  
V
-9.45  
-35  
Supply Current (all VEE pins) Non-transmission  
Transmission  
mA  
mA  
µA  
mA  
mA  
V
-
-80  
Receiver Input Bias Current (RXI)  
-2  
+25  
45  
Transmission Output DC Current (TXO)  
Transmission Output AC Current (TXO)  
Collision Threshold (Reception Mode)  
Carrier Sense Threshold (RXI)  
Itdc  
37  
41  
Itac  
+28  
-1.45  
-0.38  
+500  
-1.0  
VEE  
-
-
Itdc  
-1.62  
-0.52  
+1500  
-3.0  
VEE  
+40  
-300  
-
Vcd  
-1.53  
-0.45  
-
Vcs  
V
Differential Output Voltage (RX+,CD+)  
DC Common Mode Output Voltage (RX+)  
DC Common Mode Output Voltage (CD+) (Note 2)  
Idle State Differential Offset Voltage(RX+,CD+)  
Transmission Squelch Threshold(TX+) (Note 3)  
Input Capacitance (RXI)  
Vod  
mV  
V
Vocrx  
Voccd  
Vob  
-2.0  
VEE  
0
V
mV  
mV  
pF  
kΩ  
kΩ  
Vts  
-175  
-
-225  
1.5  
-
Cx  
Shunt Resistance - Non-transmission  
Shunt Resistance - Transmission  
Rrxi  
100  
10  
-
Rtxo  
-
-
Notes: 1. Testing is done under the testing load defined in Figure 6.  
2. During an idle condition, Voc is pulled down to VEE to minimize the power dissipation across the  
load resistors connected to CD+pins.  
3. Tested under continuous 5MHz waveform that represents the preamble.  
6.0 SWITCHING CHARACTERISTICS (under operating conditions) (Note 1)  
Parameter  
Reception Start-up Delay (RXI to RX+)  
Reception Propagation Delay (RXI to RX+)  
Differential Output Rise Time (RX+,CD+)  
Differential Output Fall Time (RX+,CD+)  
Receiver and Cable Total Jitter  
Symbol  
Tron  
Trd  
Trr  
Trf  
Trj  
Ttst  
Ttd  
Ttr  
Ttf  
Ttm  
Tts  
Tton  
Ttoff  
Ttidl  
Tcon  
Tcoff  
Min  
-
-
-
-
-
-
Typ  
2.5  
35  
4
4
+2  
1
25  
25  
25  
+0.5  
+0.5  
20  
200  
170  
7
Max  
5
50  
7
7
-
Unit  
bits  
ns  
ns  
ns  
ns  
bits  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
bits  
bits  
Transmission Start-up Delay  
2
Transmission Propagation Delay  
Transmission Rise Time (10%-90%) (TXO)  
Transmission Fall Time (10%-90%) (TXO)  
Ttr and Trf Mismatch  
Transmission Skew(TXO)  
Transmission Turn-on Pulse Width at Vts(TX+) (Note 4)  
Transmission Turn-off Delay  
Transmission IDL Detection Time (Note 5)  
Collision Turn-on Delay  
Collision Turn-off Delay  
-
50  
30  
30  
+3.0  
+2  
40  
260  
200  
13  
20  
20  
20  
-
-
10  
130  
130  
-
-
-
MTD492 Revision 3.5 01/07/1997  
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MYSON  
TECHNOLOGY  
MTD492  
Collision Frequency (CD+)  
Collision Pulse Width (CD+)  
Fcp  
Tcp  
Tcxd  
Thon  
Thw  
Tja  
8.5  
40  
100  
0.6  
0.5  
20  
10  
50  
200  
1.1  
1.0  
26  
12.5  
60  
300  
1.6  
1.5  
32  
MHz  
ns  
ms  
µs  
µs  
ms  
ms  
Extended Collision Detection Time (Note 6)  
CD Heartbeat Delay (TX+ to CD+)  
CD Heartbeat Duration(CD+)  
Jabber Activation Delay(TX+ to CD+)  
Jabber Reset Time-out (TX+ to TXO and CD+)  
Tjr  
300  
420  
550  
Notes: 4. For a minimum pulse amplitude of > -300 mV.  
5. IDL detection precedes the transmission turn-off by transmission propagation delay.  
6. Time needed to detect an extended period of collision in order to turn off the reception path.  
7.0 TIMING DIAGRAM  
INPUT  
TO RXI  
50%  
Troff  
Tron  
Trd  
Trf  
90%  
10%  
RX+  
RX-  
50%  
Trr  
Figure 1. Reception Timing  
TX+  
TX-  
50%  
Ttidl  
Ttoff  
Vts  
Tton  
Ttst  
Ttd  
90%  
10%  
TXO  
OUTPUT  
50%  
Ttf  
Ttr  
Figure 2. Transmission Timing  
TX+  
TX-  
Thon  
Thw  
CD+  
CD-  
Figure 3. Heartbeat Timing  
0V  
-1.75V  
-1.2V  
INPUT  
to RXI  
Vcd (max)  
Tcon  
Vcd (min)  
-6.8V  
Tcoff  
1/Fcp  
Tcp  
CD+  
CD-  
Figure 4. Collision Timing  
MTD492 Revision 3.5 01/07/1997  
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MYSON  
TECHNOLOGY  
MTD492  
TX+  
TX-  
Tja  
TXO  
Tjr  
CD+  
CD-  
Figure 5. Jabber Timing  
39  
Receiver (RX+-  
)
TXO  
Transmitter  
Output  
50 H*  
µ
39  
Collision(CD+-  
Outputs  
)
25  
510  
510  
VEE  
*: 50µH inductor is used for testing purposes. Pulse transformers with higher primary inductance are  
recommended.  
Figure 6. Test Loads  
8.0 PACKAGE DIMENSION  
312+/-12  
100+/-20  
350+/-20  
R40  
250+/-4  
55+/-20  
75+/-20  
90+/-20  
60+/-4  
10  
60+/-4  
310Max  
750+/-10  
7Typ  
15Max  
35+/-5  
15Max  
115Min  
15Min.  
100Typ  
18+/-2Typ  
60+/-5Typ  
MTD492 Revision 3.5 01/07/1997  
8/8  

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