P4C17015JM [ETC]

ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS; 超高速4K ×4的静态CMOS RAMS
P4C17015JM
型号: P4C17015JM
厂家: ETC    ETC
描述:

ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS
超高速4K ×4的静态CMOS RAMS

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P4C168, P4C169, P4C170  
ULTRA HIGH SPEED 4K x 4  
STATIC CMOS RAMS  
FEATURES  
Full CMOS, 6T Cell  
Fully TTL Compatible, Common I/O Ports  
Three Options  
High Speed (Equal Access and Cycle Times)  
– 12/15/20/25ns (Commercial)  
– 20/25/35ns (P4C168 Military)  
– P4C168 Low Power Standby Mode  
– P4C169 Fast Chip Select Control  
– P4C170 Fast Chip Select, Output Enable  
Controls  
Low Power Operation (Commercial)  
– 715 mW Active  
– 193 mW Standby (TTL Input) P4C168  
– 83 mW Standby (CMOS Input) P4C168  
Standard Pinout (JEDEC Approved)  
– P4C168: 20-pin DIP, SOJ and SOIC  
– P4C169: 20-pin DIP and SOIC  
– P4C170: 22-pin DIP  
Single 5V±10% Power Supply  
DESCRIPTION  
Access times as fast as 12 nanoseconds are available,  
permitting greatly enhanced system operating speeds.  
CMOS is used to reduce power consumption to a low 715  
mW active, 193 mW standby.  
TheP4C168, P4C169andP4C170areafamilyof16,384-  
bit ultra high-speed static RAMs organized as 4K x 4. All  
three devices have common input/output ports.The  
P4C168 enters the standby mode when the chip enable  
(CE) control goes high; with CMOS input levels, power  
consumptionisonly83mWinthismode. BoththeP4C169  
and the P4C170 offer a fast chip select access time that is  
only 67% of the address access time. In addition, the  
P4C170 includes an output enable (OE) control to elimi-  
natedatabuscontention.TheRAMsoperatefromasingle  
5V ± 10% tolerance power supply.  
TheP4C168andP4C169areavailablein20-pin(P4C170  
in 22-pin) 300 mil DIP packages providing excellent board  
leveldensities. TheP4C168isalsoavailablein20-pin300  
mil SOIC and SOJ packages.  
The P4C169 is also available in a 20-pin 300 mil SOIC  
package. TheP4C170isalsoavailableina22-pin300mil  
SOJ package.  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATIONS  
A
16,384-BIT  
ROW  
(7)  
MEMORY  
ARRAY  
SELECT  
A
A
A
A
A
A
A
A
1
2
3
4
20  
19  
18  
17  
V
A
A
A
A
A
A
A
A
A
A
A
A
1
2
3
4
22  
21  
20  
19  
V
A
A
A
A
0
1
CC  
11  
0
1
CC  
11  
A
2
3
4
5
10  
9
2
3
4
5
10  
9
I/O1  
I/O2  
I/O3  
I/O4  
INPUT  
DATA  
COLUMN I/O  
5
6
7
8
16  
15  
14  
13  
5
6
7
8
18  
17  
16  
15  
8
8
CONTROL  
I/O  
NC  
I/O  
4
I/O  
6
7
3
6
7
4
I/O  
I/O  
3
POWER  
DOWN  
2
COLUMN  
SELECT  
9
12  
11  
I/O  
9
14  
13  
12  
I/O  
2
CE, CS  
CS  
OE  
1
GND  
10  
10  
11  
I/O  
1
WE  
GND  
WE  
or  
CE  
CS  
P4C168  
DIP (P2, D2) DIP (P2)  
SOIC (S2)  
SOJ (J2)  
P4C169  
P4C170  
DIP (P3)  
TOP VIEW  
A
A
P4C168  
ONLY  
WE  
OE  
(5)  
SOIC (S2)  
NOTES: CE USED ON P4C168 ALSO FOR POWER DOWN FUNCTIONS  
CE USED ON P4C169 FAST CHIP SELECT  
TOP VIEW  
OE OUTPUT ENABLE FUNCTION ON P4C170 ONLY  
Means Quality, Service and Speed  
1Q97  
33  
P4C168, P4C169, P4C170  
MAXIMUM RATINGS(1)  
Symbol  
Parameter  
Value  
Unit  
Symbol  
Parameter  
Value  
Unit  
TBIAS  
Temperature Under  
Bias  
55 to +125 °C  
VCC  
Power Supply Pin with  
Respect to GND  
0.5 to +7  
V
TSTG  
PT  
Storage Temperature  
Power Dissipation  
DC Output Current  
65 to +150 °C  
Terminal Voltage with  
Respect to GND  
(up to 7.0V)  
0.5 to  
VCC +0.5  
VTERM  
TA  
V
1.0  
50  
W
IOUT  
mA  
Operating Temperature –55 to +125 °C  
CAPACITANCES(4)  
RECOMMENDED OPERATING CONDITIONS  
(VCC = 5.0V, TA = 25°C, f = 1.0MHz)  
Grade(2)  
Ambient Temp  
0°C to 70°C  
Gnd  
VCC  
Symbol  
CIN  
Parameter  
Conditions Typ. Unit  
0V 5.0V ± 10%  
0V 5.0V ± 10%  
Commercial  
Input Capacitance VIN = 0V  
Output Capacitance VOUT= 0V  
5
7
pF  
pF  
–55°C to +125°C  
Military  
COUT  
DC ELECTRICAL CHARACTERISTICS  
P4C168/169/170  
Symbol  
Parameter  
Unit  
Test Conditions  
Min  
2.2  
Max  
VCC +0.5  
0.8  
VIH  
Input High Voltage  
V
V
V
V
V
V
VIL  
Input Low Voltage  
–0.5(3)  
VHC  
VLC  
VCD  
VOL  
CMOS Input High Voltage  
CMOS Input Low Voltage  
Input Clamp Diode Voltage  
V
CC –0.2  
VCC +0.5  
–0.5(3)  
0.2  
–1.2  
0.4  
VCC = Min., IIN = –18 mA  
Output Low Voltage  
(TTL Load)  
IOL = +8 mA, VCC = Min.  
IOLC = +100 µA, VCC = Min.  
IOH = –4 mA, VCC = Min.  
IOHC = –100 µA, VCC = Min.  
VOLC  
VOH  
Output Low Voltage  
(CMOS Load)  
0.2  
V
V
V
2.4  
Output High Voltage  
(TTL Load)  
VOHC  
Output High Voltage  
(CMOS Load)  
V
CC –0.2  
–10  
–5  
+10  
+5  
Mil.  
Comm’l  
Input Leakage Current  
VCC = Max., VIN = GND to VCC  
µA  
ILI  
Mil.  
Comm’l  
–10  
–5  
+10  
+5  
VCC = Max., CS = VIH,  
VOUT = GND to VCC  
ILO  
Output Leakage Current  
µA  
mA  
mA  
___  
Dynamic Operating  
Current  
VCC = Max., f = Max., Outputs Open  
130  
35  
ICC  
ISB  
___  
Standby Power Supply  
Current (TTL Input Levels)  
P4C168 only  
CE VIH, VCC = Max., f = Max.,  
Outputs Open  
___  
ISB1  
CE VHC, VCC = Max., f = 0,  
Outputs Open  
VIN VLC or VIN VHC  
15  
Standby Power  
Supply Current  
(CMOS Input Levels)  
P4C168 only  
mA  
34  
P4C168, P4C169, P4C170  
AC CHARACTERISTICS—READ CYCLE  
(VCC = 5V ± 10%, All Temperature Ranges)(2)  
–12  
–15  
–25  
–35  
–20  
Sym.  
Parameter  
Read Cycle Time  
Unit  
Min Max Min Max Min Max Min Max Min Max  
tRC  
tAA  
12  
15  
20  
25  
35  
ns  
ns  
20  
20  
12  
Address Access Time  
12  
12  
8
15  
15  
9
25  
25  
15  
35  
35  
20  
§
tAC  
ns  
ns  
ns  
Chip Enable Access Time  
tAC  
Chip Select Access Time  
Output Hold from Address Change  
2
2
2
2
2
2
tOH  
2
2
2
2
tLZ  
Chip Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Enable to Data Valid  
ns  
ns  
ns  
ns  
tHZ  
6
8
7
9
10  
15  
15  
15  
tOE  
10  
12  
tOLZ  
0
Output Enable to Output in Low Z  
Output Disable to Output in High Z  
Read Command Setup Time  
Read Command Hold Time  
0
0
0
0
tOHZ  
6
7
9
11  
15  
ns  
ns  
ns  
ns  
ns  
tRCS  
tRCH  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
§
tPU  
Chip Enable to Power Up Time  
Chip Disable to Power Down Time  
§
tPD  
12  
15  
25  
35  
20  
§ P4C168 only  
† P4C170 only  
‡ Chip Select/Deselect for P4C169 and P4C170  
TIMING WAVEFORM OF READ CYCLE NO. 1 (ADDRESS CONTROLLED)(5,6)  
(9)  
t
RC  
ADDRESS  
t
AA  
t
OH  
PREVIOUS DATA VALID  
DATA VALID  
DATA OUT  
Notes:  
5. WE is HIGH for READ cycle.  
6. CE/CS and OE are LOW for READ cycle.  
35  
P4C168, P4C169, P4C170  
TIMING WAVEFORM OF READ CYCLE NO. 2 (CE/CS CONTROLLED)(5,7)  
t
RC  
CE/CS  
(7)  
t
HZ  
t
AC  
(7)  
(7)  
LZ  
t
DATAVALID  
DATA OUT  
HIGH IMPEDANCE  
(7)  
t
t
OLZ  
OHZ  
t
OE  
OE  
(P4C170)  
t
t
RCS  
RCH  
WE  
t
t
PD  
PU  
I
I
CC  
SB  
V
SUPPLY  
CC  
CURRENT  
(P4C168 ONLY)  
TIMING WAVEFORM OF READ CYCLE NO. 3—P4C170 ONLY (OE CONTROLLED)(5)  
(9)  
t
RC  
ADDRESS  
t
AA  
OE  
CS  
t
t
t
OH  
OE  
(8)  
OLZ  
t
(8)  
OHZ  
(8)  
HZ  
t
AC  
(8)  
t
t
LZ  
DATA OUT  
Notes:  
1521 05  
7. ADDRESS must be valid prior to, or coincident with CE/CS transition  
low. For Fast CS, tAA must still be met.  
9. Read Cycle Time is measured from the lavalid address to the first  
transitioning address.  
8. Transition is measured ±200mV from steady state voltage prior to  
change, with loading as specified in Figure 1.  
36  
P4C168, P4C169, P4C170  
AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE  
(VCC = 5V ± 10%, All Temperature Ranges)(2)  
–20  
Min Max  
18  
–12  
Min  
–15  
–35  
–25  
Min Max  
20  
Unit  
Sym.  
Parameter  
Max Min  
Min  
Max  
Max  
tWC  
tCW  
12  
12  
15  
15  
35  
30  
ns  
ns  
Write Cycle Time  
18  
20  
Chip Enable Time to  
End of Write  
tAW  
12  
15  
18  
20  
30  
ns  
Address Valid to  
End of Write  
tAS  
Address Set-up Time  
Write Pulse Width  
Address Hold Time  
0
0
0
18  
0
0
20  
0
0
30  
0
ns  
ns  
ns  
ns  
tWP  
tAH  
tDW  
12  
15  
0
7
0
8
Data Valid to End  
of Write  
10  
10  
15  
tDH  
tWZ  
Data Hold Time  
0
0
0
0
0
ns  
ns  
0
4
5
7
7
Write Enable to  
Output in High Z  
13  
tOW  
Output Active from  
End of Write  
0
0
0
0
ns  
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(10)  
(12)  
t
WC  
ADDRESS  
t
CW  
CE/CS  
t
t
AW  
AH  
t
WP  
WE  
t
t
t
AS  
DW  
DATA VALID  
DH  
DATA IN  
(8,11)  
OW  
(8)  
WZ  
t
t
DATA OUT  
DATA UNDEFINED  
HIGH IMPEDANCE  
Notes:  
10. CE/CS and WE must be LOW for WRITE cycle.  
11. If CE/CS goes HIGH simultaneously with WE HIGH, the output  
12. Write Cycle Time is measured from the last valid address to the first  
transitioning address.  
remains in a high impedance state.  
37  
P4C168, P4C169, P4C170  
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE/CS CONTROLLED)(10)  
(12)  
t
WC  
ADDRESS  
t
AS  
t
CW  
CE/CS  
t
AH  
t
WR  
t
AW  
t
WP  
WE  
t
t
DH  
DW  
DATA IN  
DATA VALID  
DATA OUT  
HIGH IMPEDANCE  
TRUTH TABLES  
P4C168 (P4C169)  
P4C170  
Mode  
CE  
H
L
WE  
X
OE  
X
Output  
High Z  
DOUT  
Mode  
Standby (Deselect)  
Read  
CE (CS)  
WE  
X
Output  
High Z  
DOUT  
Deselect  
Read  
H
L
L
H
L
H
Output Inhibit  
Write  
L
H
H
High Z  
High Z  
Write  
L
High Z  
L
L
X
AC TEST CONDITIONS  
Input Pulse Levels  
GND to 3.0V  
3ns  
Input Rise and Fall Times  
Input Timing Reference Level  
Output Timing Reference Level  
Output Load  
1.5V  
1.5V  
See Figures 1 and 2  
+5  
R
= 166.5  
TH  
480  
D
VTH = 1.73 V  
OUT  
D
OUT  
30pF(5pF* for t , t , t  
,
HZ LZ OHZ  
255Ω  
300pF(5pF* for t , t , t  
HZ LZ OHZ  
,
t
, t and t  
OLZ WZ OW  
t
, t  
and t )  
OLZ WZ  
OW  
Figure 2. Thevenin Equivalent  
Figure 1. Output Load  
* including scope and test fixture.  
Note:  
high frequency capacitor is also required between VCC and ground. To  
avoid signal reflections, proper termination must be used; for example,  
a 50test environment should be terminated into a 50load with 1.73V  
(TheveninVoltage)atthecomparatorinput, anda116resistormustbe  
used in series with DOUT to match 166(Thevenin Resistance).  
Because of the ultra-high speed of the P4C168, P4C169 AND P4C170  
caremustbetakenwhentestingthesedevices;aninadequatesetupcan  
cause a normal functioning part to be rejected as faulty. Long high-  
inductance leads that cause supply bounce must be avoided by bringing  
the VCC and ground planes directly up to the contactor fingers. A 0.01 µF  
38  
P4C168, P4C169, P4C170  
TEMPERATURE RANGE SUFFIX  
PACKAGE SUFFIX  
Temperature  
Range Suffix  
Package  
Description  
Suffix  
Description  
C
Commercial Temperature Range,  
0°C – +70°C.  
Military Temperature Range,  
–55°C – +125°C.  
P
S
J
Plastic DIP, 300 mil wide standard  
Plastic SOIC, 300 mil wide standard  
Plastic SOJ, 300 mil wide standard  
CERDIP, 300 mil wide standard  
M
D
MB  
Mil. Temp. with MIL-STD-883D  
Class B compliance  
ORDERING INFORMATION  
168  
169  
170  
ss  
p
t
P4C  
Temperature Range  
Package Code  
Speed (Access/Cycle Time)  
Device Number  
Static RAM Prefix  
ss = Speed (access/cycle time in ns), e.g., 15, 20  
p = Package code, i.e., P, S,D, J.  
t = Temperature range, i.e., C, M, MB.  
The P4C168 is also available per SMD #5962-86705  
SELECTION GUIDE  
The P4C168, P4C169 and P4C170 are available in the following temperature, speed and package options.  
Temperature  
Range  
Speed (ns)  
12  
15  
20  
25  
35  
Package  
Plastic DIP  
Plastic SOIC†  
Plastic SOJ††  
-12PC  
-12SC  
-12JC  
-15PC  
-15SC  
-15JC  
-20PC  
-20SC  
-20JC  
-25PC  
-25SC  
-25JC  
N/A  
N/A  
N/A  
Commercial  
CERDIP  
N/A  
-20DM  
-25DM  
-35DM  
N/A  
Military Temp.  
(P4C168 only)  
CERDIP  
Military  
N/A  
N/A  
-20DMB -25DMB -35DMB  
Processed*  
(P4C168 only)  
† P4C168 and P4C169 only.  
†† P4C168  
* Military temperature range with MIL-STD-883, Class B processing.  
N/A = Not available  
39  
40  

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