PC-414NT [ETC]

Last Time Buy Notice ? Board Products; 最后一次购买注意事项?电路板产品
PC-414NT
型号: PC-414NT
厂家: ETC    ETC
描述:

Last Time Buy Notice ? Board Products
最后一次购买注意事项?电路板产品

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Last Time Buy Notice – Board Products  
November 7, 2003  
Effective immediately, DATEL, Inc. will be phasing out its line of board-level data acquisition  
products. We will accept last time buy orders until February 28, 2004. Final shipments must  
be accepted by June 31, 2004. In addition, all repairs and technical support must be concluded  
by September 30, 2004. Please contact DATEL Sales as soon as practical to schedule your  
order.  
If this Notice is received by Purchasing, Materiel or Procurement personnel, we strongly  
encourage you to forward this to your Engineering, Administrative and Program colleagues as  
soon as practical.  
Models to be Discontinued - Essentially all DATEL board-level data acquisition products, all  
board-level accessories and all board software are covered in this Notice. This includes:  
All ST-xxx model numbers (Multibus I boards, example ST-711)  
All PC-xxx model numbers (ISA bus boards, example PC-414)  
All DVME-xxx model numbers (VME bus boards, example DVME-628)  
All CPCI-xxx model numbers (Compact PCI bus boards, example CPCI-511)  
All PCI-xxx model numbers (PCI bus boards, example PCI-416)  
Please note that many older ST-xxx, DVME-xxx and PC-xxx boards are already on very  
limited availability due to component obsolescence and other manufacturing issues.  
Last Time Orders - Customers should contact the DATEL Sales Dept. (Mansfield, MA, USA)  
directly to place orders and negotiate delivery schedules. Some products may require minimum  
order quantities and/or extended delivery. This varies over time so it is difficult to give an exact  
list of such products.  
To assure supply, we encourage customers to accept deliveries as soon as practical. As  
time passes, customers risk non-availability of an increasing number of products. After the  
customer accepts final order acknowledgement, all orders placed will be firm and non-  
cancellable.  
Warranty - DATEL’s standard warranty terms apply except the warranty period. As the date  
of last shipments approach, warranty support and repairs will terminate on September 30,  
2004. Customers must immediately perform a functional inspection on any shipments near this  
date. DATEL will have no technical or repair facilities after this date.  
Technical Support - Since some DATEL engineering resources have already been reallocated,  
support and repairs are currently limited and more will be withdrawn over time. We encourage  
users to get all support issues settled as soon as practical.  
Replacement Products - DATEL is not aware of any competitive manufactured products which  
are exact replacements for these products. However, there are numerous items with similar  
functions. These will require re-integration with your application.  
Manufacturing Rights - DATEL is not offering manufacturing rights on these products. The  
difficulty here is the complexity of technical support to fully transfer all comprehensive details of  
manufacturing (including test fixturing, component specifications and device programming). Most  
of these products would require considerable re-engineering by the user to resume production  
outside DATEL. Nor will we retain spare parts after September 30, 2004. Volume users  
should contact DATEL to discuss their needs.  
*******  
As very large volume component users ourselves who are subject to frequent component  
obsolescence issues, DATEL sincerely regrets any inconvenience this Notice may cause our  
customers.  
11 Cabot Blvd, Mansfield, MA, 02048 USA, website: www.datel.com  
Phone: 508-339-3000 FAX: 508-339-6356 E-mail: SALES@DATEL.COM  
®
®
P C-4 1 4  
High-Speed Analog Input Board  
for ISA Computers  
FEATURES  
NEW  
Now with  
LabVIEW® VI's  
Up to 10 MHz A/D sample rate  
Very low harmonic distortion  
Analog input comparator trigger  
Choice of 12, 14, or 16-bit A/D resolution  
Optional 2 to 8-channel simultaneous sampling  
On-board FIFO memory up to 16,384 samples  
Ideal for FFT’s, DSP, or array processor “front ends”  
Non-bus burst parallel port for seamless recording  
Offering very high system speed, the PC-414 is a multi-channel  
analog input board for ISA compatible computers. Input  
bandwidth is available up to 5 MHz and may be sampled at up  
to 10 MHz. A common motherboard is used, with the analog  
section contained in a pluggable 2” by 4” module. This allows  
for a family of several different Sample/Hold - A/D Converter  
speed and resolution options by exchanging analog modules.  
A/D data passes to an on-board First-In, First-Out (FIFO) data  
memory and then to the host computer bus interface under  
software control. The FIFO acts to uncouple the precise  
timing of the A/D section from the block-oriented data  
transfers on the bus. The design can continuously collect  
analog data with non-stop converter triggering while data is  
simultaneously read from the FIFO. This allows the collection  
of “seamless” wide-bandwidth signals of millions of samples or  
greater. Functions such as FFT sampling cannot tolerate lost  
samples without increases in “arithmetic” noise during  
computation processing.  
The analog input ranges of the A/D converter are selectable  
as unipolar 0 to +10 V, or bipolar ±5 V, or ±10 V depending on  
the model. Model PC-414E offers 16 single-ended or 8  
differential high speed channels.  
Models PC-414F, G, J, K, L, M, and P include a simultaneous  
sampling section. This function acquires signals on parallel  
channels at the same time. This prevents phase errors and  
skewing of multichannel correlated signals. Applications  
include high speed cross-channel computation, beam-former  
coherency for sonar or acoustics, telemetry, multiple carrier  
demodulation, and highly concurrent system testing.  
Data can be transferred to mass storage peripherals such as  
disk or magnetic tape. Applications include long-baseline  
studies in astrophysics, component life testing, and  
anomalous pattern search.  
SSH Control  
A/D  
Reset  
M
U
X
C
T
L
Analog  
Inputs  
FIFO  
Memory  
Parallel Outport or  
DSP COMM Port  
A/D  
Pluggable Analog Section  
Ready Output  
Half  
Empty  
Full  
A/D Start Clock  
Acknowledge Input  
Channel Address Sequencer  
EOC  
External Enable Input  
FIFO Flags  
D/A Converter  
Trigger  
Trigger In  
D/A Out  
Comparator  
D/A Output  
Analog Trigger  
8 out,  
8 in  
Digital  
I/O  
Trigger Control  
ACQ  
External  
Trigger  
Base Address  
Select  
Registers  
Half  
Full  
82C54 Programmable  
Interval Timer  
Interrupt  
Request  
DMA  
Request  
I/O Bus  
Interface  
DC/DC  
Power Converter  
DMA  
T/C  
+5V  
8MHz  
ISA BUS  
Figure 1. Functional Block Diagram  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com  
Internet: www.datel.com  
79  
®
®
P C-4 1 4  
The FIFO data output may also be routed under host software  
control to an on-board parallel data port instead of being sent to  
the computer bus. This parallel burst channel data may be read  
by an external processor at very high speeds and avoids  
possible speed restrictions of the computer bus. The outport  
uses a very simple ready/acknowledge transfer handshake which  
is adaptable to any remote parallel port including DT Connect®.  
See model PC-414COM using a DSP COMM port interface.  
Software  
The PC-414 can be controlled via optional DOS or Windows  
NT or 95/98 Control panels, third party software such as  
LabVIEW, or user written code in languages such as Visual  
C++, Borland C Builder, Visual Basic, etc.  
PC-414SET  
An MS-DOS based menu driven acquisition  
program. Includes setup and configuration  
functions, data acquisition via interrupt and DMA,  
D/A and counter timer control. Software also  
includes A/D and D/A calibration procedures.  
The analog section of the PC-414 is optimized for high signal  
quality and very low dynamic noise. The PC-414 is ideal as  
an FFT “front-end” or DSP quantizer for array processors.  
• Automatically configures to the display  
adapter, CPU, and mouse  
• Sets the I/O base address  
• Initializes the interrupt and DMA systems  
and D/A output  
• Allocates base or extended memory  
• Performs self-test and A/D-D/A calibration  
• Configures A/D sample rate, frame rate,  
and sample counter  
• Selects trigger mode and DMA or I/O block  
transfer  
The A/D conversion timing section is designed for accurate multi-  
scan data acquisition. Software programmable timers control the  
interval between each conversion and each multichannel scan.  
A programmable sample counter allows sample blocks of  
specified length independent of FIFO length. The timer/counter  
section uses a precision on-board crystal clock. Timeout and  
sample count activities may be monitored using I/O status  
registers and/or programmable interrupts. The interrupt method  
may be fully synchronized with software programmable DMA  
transfers directly to host computer memory.  
S/H - A/D triggering can originate from several sources under  
software control. The internal timebase is the normal trigger  
source although single conversions or scans may be directly  
commanded by host I/O register writes. An external trigger  
clock may also be used to precisely synchronize sampling with  
external events. This external trigger may start a single  
multichannel scan or “N” multiple scans separated by  
programmable delays.  
• Selects disk file output format to integer  
binary, float binary, or ASCII float  
• Saves data to base memory, extended  
memory, or disk  
• Full source code in “C” and assembly is  
available  
• MS-DOS or WINDOWS version (visual  
“C” interface)  
Analog sampling can also be level-triggered using an on-board  
analog comparator and an external level input. The reference  
trigger level to the comparator is derived from an on-board 12-  
bit D/A converter. If preferred, the D/A converter may also be  
used as a general purpose analog output channel.  
PC-414SRC  
Source code for PC-414SET, written in C.  
PC-414WIN  
PC-414NT  
A Windows 95/98 or NT GUI control panel  
incorporates all the functions of the PC-414.  
Functions include configuration and setup,  
analog input to file or disk, analog output, analog  
and digital triggering, digital I/O, and calibration.  
The PC-414B, D, F, G, H, K, M, N, and P versions contain five  
SMA coaxial signal connectors. Four connectors are for the  
sampled analog channels. The fifth connector is used for  
external timebase clock input, external analog trigger signal,  
or for the analog output. The PC-414E, J, and L versions  
contain 25-pin “D” connectors (DB-25S). The burst channel  
parallel port uses an internal dual row header.  
PC-414WINS Source code for PC-414WIN written in  
Borland C Builder.  
PC-414LV  
Bridge driver software to LabVIEW 4.0 and 3.1.  
PC-414LVS  
Source code for PC-414LV allows users to  
reduce high level VI’s to lower level VI’s.  
The computer interface conforms to the PC-AT bus structure.  
All data transfers (control, status, and A/D data) use 16-bit  
transfers. Interrupt level selection is done via software.  
Interrupt servicing is generated for a variety of reasons such  
as A/D data read, DMA terminal count, sample count  
reached, FIFO half-full, or FIFO full.  
Remote receiver  
e.g. DSP board,  
memory board, etc.  
Display  
Parallel  
Port  
Disk  
A/D output data coding is right-justified two’s complement with  
sign extension, if desired, straight binary coding can also be  
selected making it directly compatible with high level computer  
languages such as “C”, Visual C++, Borland C Builder, Visual  
Basic, and others.  
Analog  
Inputs  
PC-414  
Host  
Memory  
Start &  
Exit Mode  
Graphics  
Display  
User written  
program  
PC-414SET  
D/A  
Converter  
Window-driven user interface  
Configure hardware  
Start acquisition  
Send data over parallel port  
Store data to memory and /or  
disk file  
View data  
Access digital I/O port  
A/D and D/A calibration  
Update D/A  
Figure 2. PC-414SET Software Operation  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
80  
®
®
P C-4 1 4  
FUNCTIONAL SPECIFICATIONS  
(Typical at +25 °C, dynamic conditions, gain = 1, unless noted)  
PC-414B  
PC-414D  
PC-414E  
PC-414F  
ANALOG INPUTS  
4
1
16SE/8D [Note 8]  
(single A/D)  
2 Simultaneous  
(two A/D’s)  
Number of Channels  
(single A/D)  
(single A/D)  
Input Configuration  
(non-isolated) [Note 19]  
Full Scale Input Ranges  
(user-selectable) (gain = 1)  
[Notes 1 & 16]  
Single Ended  
0 to +10 V  
±10 V  
Differential  
±5 V  
SE or Diff.  
0 to +10 V  
±10 V  
Single Ended  
0 to +10 V  
±5 V  
±5 V  
±5 V  
Input Overvoltage  
±15 V  
2 µs  
±15 V  
2 µs  
±15 V  
2 µs  
±15 V  
2 µs  
(no damage, power on)  
Overvoltage Recovery  
Time, maximum  
Common Mode Voltage  
Range, maximum  
Input Impedance [Notes 6 &10]  
10 MΩ  
±1 V  
2 kΩ  
±10 V  
100 MΩ  
1 kΩ  
SAMPLE/HOLD  
Acquisition Time  
(FSR step to 0.01% of FSR, max.)  
Aperture Delay  
750 ns  
20 ns  
±100 ps  
50 ns  
10 ns  
±7 ps  
750 ns  
20 ns  
±40 ps  
165 ns  
20 ns  
±40 ps  
Aperture Delay Uncertainty  
A/D CONVERTER  
14 bits  
1.6 µs  
12 bits  
200 ns  
12 bits  
500 ns  
12 bits  
400 ns  
Resolution  
Conversion Period  
SYSTEM DC CHARACTERISTICS [Note 7]  
Integral Non-linearity  
(LSB of FSR)  
Differential Non-linearity  
(LSB of FSR)  
Full Scale Temperature  
Coefficient (LSB per °C)  
Zero or Offset  
±1.5  
±1  
±2  
±1  
±1  
±1  
±1  
±0.75  
±0.1  
±0.3  
±0.1  
±0.1  
Temperature Coefficient  
(LSB per °C)  
±0.3  
±0.3  
±0.1  
±0.1  
SYSTEM DYNAMIC PERFORMANCE [Note 2]  
Throughput to FIFO  
500 kHz  
5 MHz [Note 9]  
2 MHz  
2 MHz  
(single channel, gain = 1)  
Throughput to FIFO  
(sequential channels,  
gain = 1)  
Total Harmonic Distortion  
[Note 3]  
500 kHz  
[Note 4]  
2 MHz/chan.  
(2 chans.)  
330 kHz  
–75 dB  
–68 dB  
–72 dB  
–70 dB  
The PC-414J in short-cycled addressing is recommended in place of the PC-414A. Model PC-414E can substitute for the PC-414C.  
ANALOG INPUTS  
A/D CONVERTER  
Output Coding  
Programmable Gains  
Common Mode Rejection  
(DC - 60 Hz)  
See Note 1  
Positive-true, right justified,  
straight bin. (unipolar) or right-  
justified 2’s complement  
(bipolar) with sign extension  
thru bit 15  
1. Local Pacer frame clock  
2. External TTL frame clock  
3. Analog threshold comp.  
1. Internal programmable  
82C54 timer  
-80 dB (g = 100) (414E)  
1. Single channel  
Addressing Modes  
2. Simultaneous sampling  
3. Sequential with  
autosequenced addressing  
4. Random addressing by host  
software  
Trigger Sources  
(Software selectable)  
A/D Sample Clock  
(software selectable)  
Please read all notes carefully.  
2. Ext. TTL input, active low  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
81  
®
®
P C-4 1 4  
FUNCTIONAL SPECIFICATIONS  
(Typical at +25°C, dynamic conditions, gain = 1, unless noted)  
ANALOG INPUTS  
PC-414G  
PC-414H  
PC-414J  
PC-414K  
Number of Channels  
2 Simultaneous  
(two A/D’s)  
1
8 Simultaneous A/D’s  
[Note 8]  
2 Simultaneous  
(two A/D’s)  
(single A/D)  
Input Configuration  
(non-isolated) [Note 19]  
Full Scale Input Ranges  
(user-selectable) (gain = 1)  
[Notes 1 & 16]  
Single Ended  
±5 V or  
0 to +10 V  
Differential  
±5 V  
(other ranges  
special order)  
Single Ended  
±5 V, ±10 V  
[Note 13]  
Limited Differential  
0 to +10 V, ±5 V  
(separate models)  
(separate models)  
Input Overvoltage  
(no damage, power on)  
Overvoltage Recovery  
Time, maximum  
±15 V  
2 µs  
±15 V  
1 µs  
±15 V  
3 µs  
±15 V  
Common Mode Voltage  
Range, maximum  
±1 V  
±1 V  
Input Impedance [Notes 6 &10]  
1 MΩ  
2 kΩ  
8 k(bipolar)  
1 kΩ  
SAMPLE/HOLD  
Acquisition Time  
(FSR step to 0.01% of FSR, max.)  
Aperture Delay  
Aperture Delay Uncertainty  
350 ns [Note 11]  
20 ns  
35 ns  
±10 ns  
3 ps rms  
400 ns  
50 ns  
10 ns  
±7 ps  
±70 ps  
A/D CONVERTER  
Resolution  
Conversion Period  
14 bits  
500 ns  
12 bits  
100 ns  
12 bits  
2 µs [Note 12]  
12 bits  
200 ns  
SYSTEM DC CHARACTERISTICS [Note 7]  
Integral Non-linearity  
(LSB of FSR)  
Differential Non-linearity  
(LSB of FSR)  
±1.5  
±1.5  
±1  
±1  
±1  
±2  
±1  
±1  
Full Scale Temperature  
Coefficient (LSB per °C)  
Zero or Offset  
±0.3  
±1  
[Footnote 10]  
±0.1  
Temperature Coefficient  
(LSB per °C)  
±0.3  
±1  
[Footnote 10]  
400 kHz  
±0.3  
SYSTEM DYNAMIC PERFORMANCE [Note 2]  
Throughput to FIFO  
(single channel, gain = 1)  
Throughput to FIFO  
(sequential channels,  
gain = 1)  
Total Harmonic Distortion  
[Note 3]  
1 MHz  
10 MHz  
5 MHz  
1 MHz/chan.  
(2 chans.)  
250kHz/chan.**  
–75 dB  
5 MHz/ch.  
–68 dB  
–80 dB  
–65 dB  
**A 380 KHz per channel option is available on special order.  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
82  
®
®
P C-4 1 4  
FUNCTIONAL SPECIFICATIONS  
(Typical at +25°C, dynamic conditions, gain = 1, unless noted)  
ANALOG INPUTS  
PC-414L  
PC-414M  
PC-414N  
PC-414P  
Number of Channels  
16 Simultaneous  
A/D’s  
4 Simultaneous  
A/D’s  
2 Simultaneous  
A/D’s  
4 Simultaneous  
A/D’s  
Input Configuration  
(non-isolated) [Note 19]  
Full Scale Input Ranges  
(user-selectable) (gain = 1)  
[Notes 1 & 16]  
Single Ended  
±5 V, ±10 V,  
(user selectable)  
[Note 13]  
Single Ended  
±10 V  
Single Ended  
±2.5 V  
Single Ended  
±2.5 V or  
0 to +5 V  
(user selectable)  
Input Overvoltage  
(no damage, power on)  
Overvoltage Recovery  
Time, maximum  
±15 V  
±12 V  
±15V  
±7 V  
Common Mode Voltage  
Range, maximum  
Input Impedance [Notes 6 &10]  
8 kΩ  
10 MΩ  
10 Mor 50 Ω  
1000 Ω  
SAMPLE/HOLD  
Acquisition Time  
(FSR step to 0.01% of FSR, max.)  
Aperture Delay  
Aperture Delay Uncertainty  
400 ns  
35 ns  
±10 ns  
5 ps  
A/D CONVERTER  
Resolution  
12 bits  
16 bits  
14 bits  
14 bits  
Conversion Period  
2 µs [Note 12]  
5 µs [Note 12]  
200 ns [Note 12]  
400 ns [Note 12]  
SYSTEM DC CHARACTERISTICS [Note 7]  
Integral Non-linearity  
(LSB of FSR)  
Differential Non-linearity  
(LSB of FSR)  
Full Scale Temperature  
Coefficient (LSB per °C)  
Zero or Offset  
±2  
±1  
±4  
±3  
±1  
±1  
±1  
±3  
±1.5  
±0.5  
[Note 10]  
±0.5  
Temperature Coefficient  
(LSB per °C)  
[Note 10]  
±1  
±0.5  
±0.5  
SYSTEM DYNAMIC PERFORMANCE [Note 2]  
Throughput to FIFO  
(single channel, gain = 1)  
Throughput to FIFO  
(sequential channels,  
gain = 1)  
Total Harmonic Distortion  
[Note 3]  
400 kHz  
200 kHz  
5 MHz  
3 MHz* min.  
190 kHz/chan.  
-75 dB  
200 kHz/chan.  
-83 dB  
5 MHz/chan.  
-75 dB  
2.5 MHz/chan.  
-75 dB  
* The sample rate to published specifications is 3 MHz. The A/D is functional to 5 MHz. Valid data output per channel is delayed  
by 4 samples after the start of the sample clock. Please make note of this for products such as the PC-414P, PC-430P, and  
DVME-614P which use non-continuous A/D sampling. Data output is pipelined meaning that the first four samples per channel  
should be discarded. For all 4 channels, discard 16 samples. The design is intended for semi-continuous sampling of wideband  
signals and is less suitable for low speed data acquisition. Approximately 5 dB SFDR improvement can be achieved by directly  
connecting an external A/D sample clock. Contact DATEL for details.  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
83  
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P C-4 1 4  
SPECIFICATIONS, CONTINUED  
(Typical @ +25°C, dynamic conditions, unless noted)  
Number of Interrupts  
(software selectable)  
1 interrupt, software  
selectable on level 7, 9 thru  
11, or 15.  
Scan acquire flag (sample  
count), FIFO full or half full,  
A/D MEMORY  
Bus Interrupt Sources  
Architecture  
Memory Capacity  
First-In, First-Out (FIFO)  
1024, 4096, or 16,384 A/D  
samples. 64 K on request.  
DMA terminal count from bus.  
PARALLEL DATA PORT  
Outport Type  
TRIGGER CONTROL  
16 data output lines, TTL  
levels from A/D FIFO.  
Programmable Interval  
Timer Type  
82C54  
Includes handshake signals  
and FIFO flags. The outport  
does not provide addressing.  
Asynchoronous master to  
external slave receiver. 4  
modes are included, offering  
internal/external clocking (to  
10 MHz), synchronous/  
asynchronous handshaking.  
Sequencing is compatible  
with DT Connect®.  
24 mA out, 1.6 mA in. The  
data outputs may be tri-stated  
for shared bus connection.  
2-row 26-pin header type  
mounted on board interior.  
0.100” pin spacing suitable  
for flat cable. Pinout is  
Functions  
1. A/D sample count reached  
2. A/D start rate (16 bit divisor)  
3. SSH sample counter (414A)  
3 to 65,536 samples. Drives  
the Acquire flag/interrupt  
gate for A/D start pulses.  
Internal 8 MHz crystal clock  
125, 250, or 500 KHz  
Operating Modes  
Pacer Sample Counter  
82C54 Clock Source  
Scan Trigger Clock  
Analog Trigger Input Range  
[Note 5]  
Analog Trigger Response  
Analog Trigger Hysteresis  
±10 V (not avail. 414D)  
2 µs to set status flag  
40 mV  
Parallel Port Loading  
ANALOG OUTPUT  
Parallel Port Connector  
Number of Channels  
Function  
(user-selectable)  
[Note 5]  
One  
1. General purpose analog  
output  
2. Threshold comparator for  
A/D trigger  
compatible with DT Connect®  
and existing 414 format.  
4 MHz max. Data may be  
transferred up to 10 MHz  
with external clocking.  
Resolution  
12 bits  
Port Data Rate  
Output Voltage Range  
(user-selectable)  
Linearity  
0 to +10 V, ±5 V and ±10 V  
at 5 mA max.  
±0.05% of FSR  
DIGITAL I/O PORT  
Connector  
Settling Time  
(10 V step)  
Input Coding  
(user-selectable)  
5 microseconds to 0.05%  
Same as A/D section  
Dual row, 26-pin header  
mounted on board interior.  
Uses 0.100” pin spacing  
suitable for flat cable.  
Includes +5 Vdc and digital  
ground connections.  
8 digital outputs, 8 digital  
inputs (unlatched)  
Buffered, TTL levels.  
ISA BUS INTERFACE  
Architecture  
I/O mapped, pluggable to  
IBM-PC/AT, and compatibles.  
Decodes eight 16-bit I/O  
registers.  
Configuration  
Levels  
I/O Mapping  
Data Transfer  
Decodes I/O address lines  
A9 - A0  
I/O transfer or host DMA,  
software selectable  
10 output loads.  
50 ns max. after write operation  
Outport Settling Time  
MISCELLANEOUS  
Data Bus  
Direct Memory Access  
16 bits  
Analog Section Modularity  
The MUX-S/H-A/D module is  
socketed for function  
interchange.  
1 channel, selectable on  
channels 5, 6, or 7, set by  
software  
FIFO full, half full, not empty,  
scan acquire flag (sample  
count reached)  
Analog Section Adjustments Offset and gain per channel  
for SSH on PC-414F, G, H,  
K, M, N, and P. A single  
DMA Request Conditions  
(software selectable)  
offset and gain pot is  
Control/Status Functions  
Board reset, FIFO flags,  
interrupt select and status,  
DMA select and status, trigger  
source, timer control and  
period, sample count load,  
parallel outport enable, A/D  
enable, MUX auto-sequence  
provided on PC-414B, D,  
and E. Recommended  
recalibration interval is 90  
days in stable conditions.  
Four SMA miniature coaxial,  
mounted on rear slot. [Note 8]  
Analog Input Connectors  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
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9. 5 MHz sampling on PC-414D requires an external clock.  
Maximum on-board sampling is 4 MHz.  
Multipurpose Connector  
[Note 8]  
5th SMA user-selectable for:  
1. Pacer trigger input  
2. Analog threshold  
comparator input  
0 to +60°C, forced cooling  
recommended.  
-25 to +85°C  
10% to 90%,  
non-condensing.  
10. Input impedance is shown with power on. Impedance  
with power off is 1.5 kor less.  
Operating Temp. Range  
11. PC-414G acquisition time is 350 ns to ±0.01% of FSR.  
12. All channels in simultaneous sampling.  
Storage Temp. Range  
Humidity  
Altitude  
Power Required  
0 to 10,000 feet.  
+5V @ 3.5A max. from  
ISA bus  
4.5 x 10.5 x 0.625 inches,  
compatible to PC/ISA bus  
13. PC-414J and L bipolar input is user-selectable ±5 V or  
±10 V per channel (default). Total full scale error over  
temperature range is ±4 LSB maximum. Total zero/offset  
error over temperature range is ±2 LSB maximum.  
Monotonicity: no missing codes over temperature range.  
Outline Dimensions  
NOTES  
14. Avoid mixing external triggers which are a close submultiple  
of the internal A/D start clock to prevent lost samples.  
1. Resistor-programmed gain from x1 to x100 is available  
on PC-414E with increased settling delay at higher gain.  
15. Models PC-414D, H, K, and M use a single channel  
12-bit A/D converter with ±5 V inputs. An external A/D  
clock is required above 4 MHz and the 82C54 timer must  
be bypassed. 10 MHz sampling may continue until the  
FIFO memory is full.  
2. Total throughput includes MUX settling time after  
changing the channel address, S/H acquisition time to  
rated specifications, A/D conversion, and FIFO transfer.  
Total throughput is not delayed by host software  
whenever the FIFO is not full.  
16. Input polarity. Some models are fixed as bipolar only  
whereas others are user-selectable unipolar or bipolar.  
Still others require separate model numbers.  
3. THD test conditions are:  
A. Input freq. 500 kHz (414F)  
200 kHz (414B,E,G)  
50 kHz (414J,L,M) 1 MHz (414D,K,N,P)  
2 MHz (414H)  
B. Generator/filter THD is -90 dB minimum.  
17. Models F, G, J, K, L, M, N, and P use one A/D converter  
per channel.  
C. THD computed by FFT to 5th harmonic.  
18. The customer must use shielded cables to insure EMC  
compliance.  
( V22 + V32 + V42 + V52 )0.5  
(
log10  
)
THD = 20  
Vin  
D. Inputs are half full scale less 0.5 dB. No channel  
advance.  
19. A/D-per-channel boards (models F, G, J, K, L, M, N, P)  
may be operated in “software differential” mode. Two  
A/D’s are applied to the high and low legs of a single  
differential input channel. The two data values are then  
algebraically subtracted, either on the fly in real time or  
after all samples have been stored. Channel capacity in  
“software differential” is one-half the number of single-  
ended channels.  
E. A/D sample rate = 500 kHz (414B,E,G), 4 MHz (414D,K),  
2 MHz (414F), 10 MHz (414H), 250 kHz (414J),  
190 kHz (414L,M), 2.5 MHz (414P)  
4. The rates shown for sequential sampling are the  
maximum A/D converter start rates and include MUX  
sequencing and settling. For example, if four channels  
of the PCI-414E were scanned, the maximum sample  
rate on any one channel would be 2 µs x 4 channels =  
8 µs (125 kHz per channel).  
This technique offers excellent bandwidth, high common  
mode rejection and optional mix of single-ended and  
differential channels.  
5. For fastest response on the analog comparator trigger,  
keep the reference voltage near the trip input voltage. To  
avoid overload recovery delays, do not let the trip input  
(or any other analog input) exceed ±10V.  
6. The input impedance of 10 Mminimum avoids attenuation  
errors from external input source resistance. For many  
applications, an in-line coaxial 50 shunt, inserted  
adjacent to the front connectors, is recommended to  
reduce reflections and standing wave errors.  
7. Allow 20 minutes warmup time to rated specifications for  
models PC-414B,G,M,N.  
8. A 25-pin DB-25S connector is used for the PC-414E, J,  
and L.  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
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I/O Register Mapping  
FIFO Data Format  
The base address may be selected anywhere up to 3F0h on  
16-byte boundaries.  
A/D data is delivered as a stream from the FIFO memory. For  
multichannel inputs, this means that data is multiplexed. For  
example, for 4-channel inputs, the output channel sequence is  
0, 1, 2, 3, 0, 1, . . . Some applications may need this data de-  
multiplexed by software so that each channel’s data is placed  
in its own separate buffer.  
I/O Address  
(hex)  
Direction  
Write  
Read  
Write  
Description  
Base + 0  
Base + 0  
Base + 2  
Command Register  
Status Register  
Channel Address/Digital  
Output [Note 12]  
Base + 2  
Read  
Digital Input Register  
[Note 12]  
Binary A/D Data  
See model PC-414COM  
using a DSP COMM  
port interface.  
Analog  
Inputs  
Base + 4  
Base + 6  
Base + 6  
Base +8  
Base + 0Ah  
Base + 0Ch  
Base + 0Eh  
Write  
Write  
Read  
Read/Write  
Read/Write  
Read/Write  
Read/Write  
D/A Data Register  
FIFO Reset Register  
FIFO A/D Data Register  
Counter #0 (82C54)  
Counter #1 (82C54)  
Counter #2 (82C54)  
Control Register (82C54)  
Parallel  
Port  
MUX  
Array  
Processor  
Board  
FIFO  
MEM  
A/D  
PC-414  
Transfer Speeds  
ISA bus transfer rates are host-dependent and should be  
determined by testing. For example, a Compaq computer  
achieved 800 nanoseconds instantaneous sample-to-sample  
timing to base memory using the REP INSW instruction. A  
faster CPU will not increase the ISA bus speed. To optimize  
throughput, disable all possible interrupts. For higher speed  
continuous (non-stop) A/D sampling, consider using a parallel  
port.  
DSP Arrays  
PC/AT Bus  
CPU  
Disk  
Mass Storage  
Controller  
Display  
Graphics  
Display  
Controller  
Figure 3. Array Preprocessing  
Internal or external trigger rate  
TRIGGER  
Internal or external start rate  
A/D  
START  
CONVERT  
0
1
2
3
Fixed or sequential channel addressing up to  
64k samples per trigger  
END OF  
SCAN*  
(Internal  
(Signal)  
ACQUIRE  
FLAG  
HOLD  
SSH (Internal)  
[BASE + 0 bit 2 = 1]  
(414A only)  
SAMPLE  
Maskable Interrupt  
and Status  
Figure 4. PC-414Timing DIagram  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
86  
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Figure 5. PC-414VB-CONSOLE  
PC-414VB CONSOLE  
This example application was written in Visual Basic 5.0, using the PC-414LVS as the callable DLL. Created by  
Eiichi Itagaki, Software Engineer of DATEL KK Technical and Jeffrey Greenberg, Marketing Applications Engineer  
DATEL, Inc. USA.  
For users preferring to create applications in Visual Basic, the DLL and source code found in the PC-414LVS offers the Visual  
Basic programmer a wealth of information and tools in creating applications quickly and easily. The PC-414VB-CONSOLE is a  
sample program showing how to implement most of the functions of the PC-414 Series. Included is the source code for all the  
forms and the code modules.  
To receive your FREE copy of PC-414VB-CONSOLE, purchase PC-414LVS with any PC-414 Series board and contact DATEL at  
1-800-233-2765.  
Example Declarations:  
Declare Sub SetIOBase Lib “P414LV32.DLL(ByVal io_base_address As Integer)  
Declare Sub init_414 Lib “P414LV32.DLL(ByVal fsize As Integer, ByVal port As Integer, ByVal trigger_src As Integer,  
ByVal trigger_pol As Integer, ByVal clock_src As Integer, ByVal md As Integer)  
Declare Sub set_mode Lib “P414LV32.DLL(ByVal samples_trigger As Integer, ByVal scan_enable As Integer, ByVal scan_count  
As Integer, ByVal auto_incr As Integer, ByVal cahnnel As Integer, ByVal sample_rate As Long,  
ByVal trigger_rate As Long)  
Declare Sub StartAD Lib “P414LV32.DLL()  
Declare Sub StopAD Lib “P414LV32.DLL()  
Declare Function read_status_reg Lib “P414LV32.DLL() As Integer  
Declare Sub get_status_flags Lib “P414LV32.DLL(half_full_f As Long, full_f As Long, empty_f As Long, acquire_f As Long)  
Declare Sub reset_fifo_reg Lib “P414LV32.DLL()  
Declare Sub read_FIFO Lib “P414LV32.DLL(ByVal count As Integer, buffer As Integer)  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
87  
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The PC-414 LabVIEW package from DATEL consists of a set  
of inexpensive VI’s for low level control of the board. These  
integrate into the LabVIEW package which the user must  
purchase from National Instruments. Once installed, these  
VI’s appear as icons on the LabVIEW menues. DATELs VI’s  
are offered in two versions. Model PC-414LV is the  
executable binary-only configuration which can be fully  
integrated into the user-written block diagram. Model  
PC-414LVS is the full source to model PC-414LV and also  
includes all binaries. The source code should be considered  
by a programmer who wishes to extend or modify the existing  
VI’s or just wants to more fully understand their operation.  
PC-414LV FEATURES  
Supports DATEL’s PC-414 family of high-speed analog  
input boards  
Runs under Microsoft Windows®, uses Dynamic Data  
Exchange (DDE)  
Adaptable to all LabVIEW applications  
Easy-to-use visual programming eliminates low level  
software  
Interactive, customizable front panel controls  
Integrates data acquisition, processing, display, and  
storage  
A/D sampling rates to 10 MHz  
Optional multi-channel simultaneous sampling  
LabVIEW’s feature-rich program development system  
combined with DATELs library of VI functions for the PC-414  
provide the essential building blocks to create any conceivable  
LabVIEW applications.  
PC-414LV GENERAL DESCRIPTION  
National Instruments’ LabVIEW transforms the PC-414 family  
of high speed analog input boards into easy-to-use virtual  
instruments (VI’s) that acquire, analyze, display, and store  
analog signals in real time. Low level software development is  
replaced by an intuitive visual programming system that  
harnesses all the power of Microsoft Windows - graphic user  
interface (GUI), access to more host memory (16  
megabytes), multi-tasking, and inter-process communications  
using DDE. Applications include highly concurrent system  
testing, process monitoring and control, telemetry, radar,  
sonar, acoustics, DSP front end quantizer, education, and  
research.  
Graphical programming works like a flowchart - when the  
flowchart is accurate and complete, the program is done.  
PC-414LV off-loads as much programming as possible into  
the LabVIEW environment so the user has maximum control.  
It creates a library of fast, simple, highly modular VI functions  
for the PC-414 that do not sacrifice board performance. The  
user builds VI’s to configure the data acquisition hardware,  
process the data, and ultimately display and store that data  
without writing programs. Similar VI’s can be created to  
update the analog output and to read and write the digital I/O  
port.  
A/D data to  
remote receivers  
Windows  
LabVIEW  
Input Signal  
LabVIEW  
Analog  
and  
Parallel Port  
Digital  
I/O  
Initialize  
PC-414  
Start  
A/D  
Read  
FIFO  
PC-414  
High speed analog  
input board  
(includes D/A and digital I/O)  
Amplitude  
Timebase  
Real Time  
Processing  
and Display  
OFF  
ON  
10101010  
Input Channel  
Single Multi SS&H  
Digital Out  
On/  
Off  
1024  
Analog Out  
Loop  
Host Computer  
Front Panel Controls  
Visual Programming Diagram  
Figure 6. PC-414LV LabVIEW System Diagram  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
88  
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P C-4 1 4  
All VI’s are assembled graphically using a mouse and can be  
edited at any time to modify functionality or appearance. Non-  
stop, seamless data acquisition continues on the PC-414  
while LabVIEW simultaneously maintains the GUI and  
handles the A/D data stream in real time. Easily customized,  
interactive user interfaces can be created from the vast library  
of front panel controls and displays offered by LabVIEW.  
blocks can then be further processed as screen displays,  
indicators, graphs, sent to printers or plotters, or simply  
archived to disk file for later analysis. The A/D continues  
running and no data will be lost as long as LabVIEW uploads  
the A/D data faster than the data is being acquired.  
Virtual Instrument Library  
In summary, PC-414LV includes the following VI functions:  
The PC-414LV includes extensive Dynamic Linked Library  
(DLL) functions that perform the PC-414 low level hardware  
control and monitor operations transparently. The software  
provides VI functions that poll PC-414 status flags  
independent of, and simultaneous with, data acquisition and  
data transfer. Control is retained by the user as long as  
LabVIEW continues to execute correctly. The multi-window,  
visual programming environment facilitates building and  
accessing hierarchical VI programs. Multi-tasking allows  
context switches to other concurrent Windows applications  
without disrupting PC-414 operation or control.  
PC-414 Initialize  
Initialize the PC-414 hardware - board  
model, I/O base address, etc.  
Operating Mode  
Specify A/D trigger rate, A/D sample  
rate, and analog input channel.  
Clear FIFO  
Reset the FIFO memory  
Start/Stop A/D  
Read Status  
Enable and disable the A/D.  
Read hardware status flags - FIFO  
flags, acquisition done, oversampling.  
Read FIFO  
Read blocks of A/D data from the  
FIFO on the PC-414 and fill a  
LabVIEW buffer on the host.  
The PC-414/LabVIEW system optimizes two concurrent  
processes - the PC-414 acquiring data while LabVIEW further  
processes or stores the uploaded data stream. The entire  
PC-414/LabVIEW combination uses only a few VI functions  
that are easy to understand and incorporate into a “block  
diagram” program. The basic concept is to initialize the  
PC-414 hardware, reset the FIFO memory, start data  
acquisition, and upload blocks of data from the FIFO to  
LabVIEW memory buffers on the host - or to remote receivers  
over the DT Connect I compatible output port. These data  
Write DAC  
Update the analog output channel.  
Read/write the 8-bit digital I/O port.  
Inport/Outport  
PC-414 Demo  
Complete data acquisition  
demonstration VI, includes real time  
signal display.  
Demultiplex Buffers Unravel a multi-channel data buffer  
and extract data from one channel  
only.  
Figure 7. PC-414LVVisual Program  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com Internet: www.datel.com  
89  
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ORDERING INFORMATION  
Hardware:  
PC-414  
FIFO Memory Size  
Input Polarity  
Input Channels, A/D Resolution  
1 = 1,024 A/D samples  
2 = 4,096 A/D samples  
3 = 16,384 A/D samples  
A = Bipolar or selectable  
B = Unipolar  
B = 4SE chans., 14 bits  
D = 1D chan., 12 bits  
E = 16SE/8D chans., 12 bits  
F = 2SE simul. chans., 12 bits  
G = 2SE simul. chans., 14 bits N = 2SE simul. chans., 14 bits  
H = 1D chan., 12 bits P = 4SE simul. chans., 14 bits  
J = 8SE simul. chans., 12 bits  
K = 2SE simul. chans., 12 bits  
L = 16SE simul. chans., 12 bits  
M = 4SE simul. chans., 16 bits  
For models with user-  
selectable polarity use the  
“A” designator. CAUTION:  
Read the input range  
specifications carefully.  
Example: PC-414F3 Two simultaneous A/D’s, 2 MHz, 12-bit resolution, 16,384 FIFO samples.  
61-7342340  
PC-490B  
SMA male to BNC male coaxial cable, 1 meter length. One cable required per channel.  
DB-25 screw termination adapter (cable not included). Not recommended for high-frequency signals.  
PC-414xCOMx PC-414 with DSP COMM port interface. See PC-414COM data sheet.  
Each board is power-cycle burned-in, tested and calibrated. All models include a user’s manual. An example program disk is  
available on request at no charge.  
Software:  
PC-414SET  
PC-414SRC  
Setup/configuration data-collection program for MS-DOS. Executables only.  
Source code for setup and configuration program on MS-DOS disks. Includes “C” and assembly source  
code and window driver library. Documentation is on disk.  
PC-414WIN  
PC-414WINS  
PC-414LV  
PC-414LVS  
PC-414NT  
PC-414NTS  
Call DATEL  
Call DATEL  
Setup/configuration program for Microsoft Windows 3.1. Executables only.  
Source code for PC-414WIN, written with Borland Delphi.  
Bridge driver software to National Instruments’ LabVIEW®. See PC-414LV data sheet.  
Source code for PC-414LV  
Setup/configuration program for Microsoft Windows NT. Executables only.  
Source code for PC-414NT, written with Borland Delphi.  
Free example programs for the PC-414, written in Visual Basic 5. Contact Systems Application Dept.  
Free example programs for the PC-414, written in Microsoft QuickBASIC. Contact System Application  
Dept.  
Pentium is an Intel trademark  
Windows and MS-DOS are Microsoft trademarks  
LabVIEW is a National Instruments trademark  
DT Connect is a Data Translation trademark  
DATEL, Inc., Mansfield, MA 02048 (USA)  
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356  
Email: sales@datel.com  
Internet: www.datel.com  
90  

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