PI29FCT52ATQ [ETC]
Single 8-bit Bus Transceiver ; 一个8位总线收发器\n型号: | PI29FCT52ATQ |
厂家: | ETC |
描述: | Single 8-bit Bus Transceiver
|
文件: | 总6页 (文件大小:232K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PI29FCT52T
PI29FCT53T
Fast CMOS
Registered Transceivers
ProductFeatures
PI29FCT52/53TispincompatiblewithbipolarFAST
Series at a higher speed and lower power consumption
TTL input and output levels
ProductDescription
Pericom Semiconductors PI29FCT series of logic circuits are pro-
duced in the Companys advanced 0.8 micron CMOS technology,
achieving industry leading speed grades.
ThePI29FCT52TandthePI29FCT53Tare8-bitregisteredtransceivers
designedwithtwo8-bitback-to-backregisterstostoredataflowing
in both directions between two bidirectional buses. Separate clock
enable and 3-state output enable signals are provided for each
register. The PI29FCT52T is a non-inverting option of the
PI29FCT53T.
Extremelylowstaticpower
Hysteresis on all inputs
Industrial operating temperature range: 40°C to +85°C
Packagesavailable:
24-pin300milwideplasticDIP(P)
24-pin150milwideplasticQSOP(Q)
24-pin150milwideplasticTQSOP(R)
24-pin300milwideplasticSOIC(S)
PI29FCT52T and PI29FCT53T Logic Block Diagram
CPA
CEA
OEB
CE CP
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
D
D
D
D
D
D
D
D
0
1
2
3
4
5
6
7
Q
Q
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
6
7
B
B
B
B
B
B
B
B
0
1
2
3
4
5
6
7
A
REG
Q
Q
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
6
7
D
D
D
D
D
D
D
D
0
1
2
3
4
5
6
7
B
REG
CE CP
OEA
CPB
CEB
NOTE: PI29FCT52T function is shown.
PS2001A 03/08/96
1
PI29FCT52/53T
Registered Transceivers
PI29FCT52/53T Product Pin Configuration
Product Pin Description
Pin Name
A0-A7
B0-B7
CPA
Description
B7
B6
1
24
23
22
VCC
A7
A Register Inputs or B Register Outputs
B Register Inputs or A Register Outputs
Clock for A Register
2
B5
3
A6
B4
24-PIN
P24
Q24
R24
4
21 A5
B3
CPB
Clock for B Register
A4
5
20
19
18
17
16
15
14
13
B2
A3
6
OEA
Output Enable for B Register
Output Enable for A Register
Clock Enable for A Register
Clock Enable for B Register
Ground
B1
A2
7
OEB
S24
B0
A1
8
CEA
OEB
CPA
CEA
GND
A0
9
CEB
OEA
CPB
CEB
10
11
12
GND
VCC
Power
PI29FCT52/53T Register Truth Table(1)
(Applies to A or B Register)
PI29FCT52/53T Output Control Table(1)
Inputs
Internal
Internal
Y-Outputs
Function
Hold Data
Load Data
DN CP CE
QN
NC
L
Function
OE
QN
52
53
X
L
X
↑
H
L
L
Disable Outputs
Enable Outputs
H
X
Z
Z
L
L
L
H
L
H
H
L
H
↑
H
1. H = High Voltage Level
L = Low Voltage Level
X = Don't Care
Z = High Impedance
NC = No Change
↑
= LOW-to-HIGHtransition
PS2001A 03/08/96
2
PI29FCT52/53T
Registered Transceivers
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... 65°Cto+150°C
Ambient Temperature with Power Applied .....................................-40°Cto+85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. 0.5Vto+7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... 0.5Vto+7.0V
DC Input Voltage ............................................................................0.5Vto+7.0V
DC Output Current ..................................................................................... 120mA
Power Dissipation ..........................................................................................0.5W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 5V ± 5%)
Parameters Description
TestConditions(1) Min. Typ(2) Max. Units
Output HIGH Voltage VCC = Min., VIN = VIH or VIL
VOH
VOL
VIH
VIL
IIH
IOH = 15.0 mA
IOL = 64 mA
2.4
3.0
0.3
V
V
Output LOW Current
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
VCC = Min., VIN = VIH or VIL
0.55
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
VCC = Max.
2.0
V
0.8
1
V
VIN =VCC
µA
µA
IIL
VCC = Max.
VIN =GND
1
IOZH
IOZL
High Impedance
Output Current
VCC = Max.
VOUT =2.7V
VOUT =0.5V
1
µA
µA
1
VIK
IOS
Clamp Diode Voltage VCC = Min., IIN = 18 mA
0.7
120
1.2
100
V
Short Circuit Current
Power Down Disable
Input Hysteresis
VCC =Max.(3),VOUT =GND
60
mA
µA
mV
IOFF
VH
VCC =GND,VOUT =4.5V
200
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4)
Description
TestConditions
VIN =0V
Typ
Max.
Units
pF
CIN
Input Capacitance
Output Capacitance
6
8
10
12
COUT
VOUT =0V
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
PS2001A 03/08/96
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PI29FCT52/53T
Registered Transceivers
Power Supply Characteristics
Parameters Description
TestConditions(1)
Min. Typ(2) Max. Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VCC = Max.
VCC = Max.,
VIN=GND
orVCC
0.1
500
µA
∆ICC
ICCD
Supply Current per
Input @ TTL HIGH
VIN =3.4V(3)
0.5
2.0
mA
Supply Current per
Input per MHz(4)
VIN =VCC
VIN =GND
0.15
0.25
mA/
MHz
Outputs Open
OEAorOEB=GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply
Current(6)
VCC = Max.,
Outputs Open
fCP = 10 MHZ
50% Duty Cycle
OEA or OEB = GND
fI = 5 MHZ
VIN = VCC
VIN = GND
1.5
2.0
3.5(5)
5.5(5)
mA
VIN = 3.4V
VIN = GND
One Bit Toggling
VCC = Max.,
Outputs Open
fCP = 10 MHZ
50% Duty Cycle
OEA or OEB = GND
Eight Bits Toggling
fI = 2.5 MHZ
VIN = VCC
VIN = GND
3.8
6.0
7.3(5)
VIN = 3.4V
VIN = GND
16.3(5)
50% Duty Cycle
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC=IQUIESCENT+IINPUTS+IDYNAMIC
IC =ICC +∆ICC DHNT +ICCD (fCP/2+fINI)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
PS2001A 03/08/96
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PI29FCT52/53T
Registered Transceivers
PI29FCT52TSwitchingCharacteristicsoverOperatingRange
29FCT52AT
Com.
29FCT52BT
Com.
29FCT52CT
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
t
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
SU
PropagationDelay
C
R
L
L
= 50 pF
=500Ω
2.0
10.0
2.0
7.5
2.0
6.3
ns
CPA,CPB,toA
OutputEnableTime
OEA,OEB,toA ,B
N,B
N
1.5
1.5
2.5
10.5
10.0
1.5
1.5
2.5
8.0
7.5
1.5
1.5
2.5
7.0
6.5
ns
ns
ns
N
N
OutputDisableTime(3)
OEA,OEB,toA ,B
Set-upTimeHIGHor
LOW,A ,B to
CPA,CPB
HoldTimeHIGHor
LOW,A ,B to
CPA,CPB
N
N
N
N
t
t
t
t
H
2.0
3.0
2.0
3.0
1.5
3.0
2.0
3.0
1.5
3.0
2.0
3.0
ns
ns
ns
ns
N
N
SU
H
Set-upTimeHIGHor
LOW,CEA,CEBto
CPA,CPB
HoldTimeHIGHor
LOW,CEA,CEBto
CPA,CPB
W
PulseWidthHIGH(3)or
LOW,CPAorCPB
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
PS2001A 03/08/96
5
PI29FCT52/53T
Registered Transceivers
PI29FCT53TSwitchingCharacteristicsoverOperatingRange
29FCT53AT
Com.
29FCT53BT
Com.
29FCT53CT
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
t
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
SU
PropagationDelay
C
R
L
L
= 50 pF
=500Ω
2.0
10.0
2.0
7.5
2.0
6.3
ns
CPA,CPB,toA
OutputEnableTime
OEA,OEB,toA ,B
N,B
N
1.5
1.5
2.5
10.5
10.0
1.5
1.5
2.5
8.0
7.5
1.5
1.5
2.5
7.0
6.5
ns
ns
ns
N
N
OutputDisableTime(3)
OEA,OEB,toA ,B
Set-upTimeHIGHor
LOW,A ,B to
CPA,CPB
HoldTimeHIGHor
LOW,A ,B to
CPA,CPB
N
N
N
N
t
t
t
t
H
2.0
3.0
2.0
3.0
1.5
3.0
2.0
3.0
1.5
3.0
2.0
3.0
ns
ns
ns
ns
N
N
SU
H
Set-upTimeHIGHor
LOW,CEA,CEBto
CPA,CPB
HoldTimeHIGHor
LOW,CEA,CEBto
CPA,CPB
W
PulseWidthHIGH(3)or
LOW,CPAorCPB
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS2001A 03/08/96
6
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