PI74FCT162Q374DTV [ETC]

16-Bit D-Type Flip-Flop ; 16位D型触发器\n
PI74FCT162Q374DTV
型号: PI74FCT162Q374DTV
厂家: ETC    ETC
描述:

16-Bit D-Type Flip-Flop
16位D型触发器\n

触发器 逻辑集成电路 光电二极管 驱动
文件: 总6页 (文件大小:210K)
中文:  中文翻译
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PI74FCT162Q374T  
Fast Low Noise CMOS 16-Bit  
Registers (3-State)  
ProductFeatures  
• VCC =5V±10%  
ProductDescription  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• Balanced output drivers:  
±12mA  
• Output impedance:  
The PI74FCT162Q374Tisa16-bitoctalregisterdesignedwith16D-  
type flip-flops with a buffered common clock and 3-state outputs.  
TheOutputEnable(xOE)andclock(xCLK) controlsareorganized  
to operate as two 8-bit registers or one 16-bit register. When OE is  
HIGH, the outputs are in the high impedance state. Input data  
meeting the setup and hold time requirements of the D inputs is  
transferredtothexOxoutputsontheLOW-to-HIGHtransitionofthe  
clock input.  
35(typical)  
• Typical VOLP (Output Ground Bounce) < 0.5V  
atVCC =5V,TA=25°C  
• Bus Hold retains last active bus state during tri-state  
• Hysteresis on all inputs  
• Packagesavailable:  
–48-pin240milwideplasticTSSOP(A)  
–48-pin300milwideplasticSSOP(V)  
–48-pin150milwideplasticBQSOP(B)  
• Device models available on request  
ThePI74FCT162Q374Tisdesignedwithcurrentlimitingresistorsat  
its outputs to control the output edge rate resulting in lower ground  
bounce and undershoot. This device features a typical output  
impedance of 35eliminating the need for external terminating  
resistorsformostbusinterfaceapplications.Thisnoisesuppression  
benefit is designated by the letter "Q" (for quiet) in the part number.  
ThePI74FCT162Q374Thas"BusHold"whichretainstheinput'slast  
state whenever the input goes to high-impedance preventing  
"floating"inputsandeliminatingtheneedforpull-up/downresistors.  
Logic Block Diagram  
1OE  
2OE  
1CLK  
2CLK  
1D0  
2D0  
D
D
1O  
0
2O0  
C
C
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
PS2082D  
06/08/98  
1
PI74FCT162Q374T  
LOW NOISE 16-BIT REGISTERS (3-STATE)  
Truth Table(1)  
Product Pin Description  
Inputs  
Outputs  
Pin Name  
xOE  
Description  
Function  
XDX  
X
XCLK  
XOE  
H
XOX  
Z
3-State Output Enable Inputs (Active LOW)  
High-Z  
L
H
xCLK  
xDx  
Clock Inputs  
Inputs(1)  
X
H
Z
Load Register  
L
L
L
xOx  
3-State Outputs  
Ground  
H
L
H
Z
GND  
VCC  
L
H
Power  
H
H
Z
Note: 1. For the PI74FCT162Q374T, these pins have "Bus  
Hold". All other pins are standard, outputs, or I/Os.  
Note:  
1. H = High Voltage Level  
L = Low Voltage Level  
X = Don't Care  
Z = High Impedance  
= LOW-to-HIGH transition  
Product Pin Configuration  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1O0  
1O1  
GND  
1O2  
1O3  
VCC  
1O4  
1O5  
GND  
1O6  
1O7  
2O0  
2O1  
GND  
2O2  
2O3  
VCC  
1CLK  
1D0  
1D1  
GND  
1D2  
1D3  
VCC  
1D4  
1D5  
GND  
1D6  
1D7  
2D0  
2D1  
GND  
2D2  
2D3  
VCC  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
48-PIN  
V48  
A48  
B48  
2O4  
2O5  
2D4  
2D5  
GND  
GND  
2O6  
2O7  
2OE  
2D6  
2D7  
2CLK  
PS2082D  
06/08/98  
2
PI74FCT162Q374T  
LOW NOISE 16-BIT REGISTERS (3-STATE)  
Maximum Ratings  
(Above which the useful life may be impaired. For user guidelines, not tested.)  
Storage Temperature ................................................................. –65°C to +150°C  
Ambient Temperature with Power Applied ................................. –40°C to +85°C  
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V  
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V  
DC Input Voltage ......................................................................... –0.5V to +7.0V  
DC Output Current ................................................................................... 120 mA  
Power Dissipation ......................................................................................... 1.0W  
Note:  
Stresses greater than those listed under  
MAXIMUM RATINGS may cause permanent  
damage to the device. This is a stress rating  
only and functional operation of the device at  
these or any other conditions above those  
indicated in the operational sections of this  
specification is not implied. Exposure to  
absolute maximum rating conditions for  
extended periods may affect reliability.  
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)  
Parameters Description  
Test Conditions(1)  
Min. Typ(2) Max. Units  
VIH  
VIL  
IIH  
IIH  
IIL  
Input HIGH Voltage  
Guaranteed Logic HIGH Level  
Guaranteed Logic LOW Level  
Standard Input(4), VCC = Max.  
Bus Hold Input(5), VCC = Max.  
Standard Input(4), VCC = Min.  
Bus Hold Input(5), VCC = Min.  
Bus Hold Input(5), VCC = Min.  
2.0  
V
V
Input LOW Voltage  
Input HIGH Current  
Input HIGH Current  
Input LOW Current  
Input LOW Current  
Bus Hold  
Sustain Current  
High Impedance  
Output Current  
0.8  
1
±100  
–1  
VIN = VCC  
VIN = VCC  
µA  
µA  
µA  
µA  
µA  
VIN = GND  
VIN = GND  
VIN = 2.0V  
VIN = 0.8V  
VOUT = 2.7V  
VOUT = 0.5V  
IIL  
±100  
IBHH  
IBHL  
IOZH  
IOZL  
VIK  
IO  
–50  
+50  
VCC = Max.  
VCC = Max.  
VCC = Min., IIN = –18 mA  
VCC = Max.(3), VOUT = 2.5V  
1
–1  
–1.2  
–180  
µA  
µA  
V
mA  
mV  
Clamp Diode Voltage  
Output Drive Current  
Input Hysteresis  
–0.7  
100  
–50  
VH  
Notes:  
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.  
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.  
4. The test limit for this parameter is ± 5 µA at TA = –55°C.  
5. Pins with Bus Hold are identified in the pin description.  
6. This specification does not apply to bi-directional functionalities with Bus Hold.  
PS2082D  
06/08/98  
3
PI74FCT162Q374T  
LOW NOISE 16-BIT REGISTERS (3-STATE)  
Output Drive Characteristics (Over the Operating Range)  
Parameters Description  
Test Conditions(1)  
Min. Typ(2) Max. Units  
IODL  
IODH  
Output LOW Current  
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3)  
36  
–100  
—
–166  
—
–200  
mA  
mA  
Output HIGH Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3)  
Output Drive Characteristics (Over the Operating Range)  
Parameters Description  
Test Conditions(1)  
Min. Typ(2) Max. Units  
VOH  
VOL  
Output HIGH Voltage VCC = Min., VIN = VIH or VIL  
IOH = –12.0 mA  
IOL = 12 mA  
2.4  
—
3.3  
0.3  
—
0.55  
V
V
Output LOW Voltage  
VCC = Min., VIN = VIH or VIL  
Capacitance (TA = 25°C, f = 1 MHz)  
Parameters(4)  
Description  
Test Conditions  
Typ  
Max.  
Units  
CIN  
Input Capacitance  
Output Capacitance  
VIN = 0V  
4.5  
5.5  
6
8
pF  
pF  
COUT  
VOUT = 0V  
Notes:  
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.  
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.  
4. This parameter is determined by device characterization but is not production tested.  
PS2082D  
06/08/98  
4
PI74FCT162Q374T  
LOW NOISE 16-BIT REGISTERS (3-STATE)  
Power Supply Characteristics  
Parameters Description  
Test Conditions(1)  
Min. Typ(2) Max. Units  
ICC  
Quiescent Power  
Supply Current  
VCC = Max.  
VIN = GND or VCC  
0.1  
0.5  
60  
500  
µA  
ICC  
ICCD  
Supply Current per  
Input @ TTL HIGH  
VCC = Max.  
VIN = 3.4V(3)  
1.5  
mA  
Supply Current per  
Input per MHz(4)  
VCC = Max.,  
Outputs Open  
XOE = GND  
VIN = VCC  
VIN = GND  
100  
µA/  
MHz  
One Bit Toggling  
50% Duty Cycle  
IC  
Total Power Supply  
Current(6)  
VCC = Max.,  
VIN = VCC  
VIN = GND  
0.6  
1.1  
1.5(5)  
3.0(5)  
mA  
Outputs Open  
fCP = 10 MHZ  
50% Duty Cycle  
XOE = GND  
VIN = 3.4V  
VIN = GND  
fI = 5 MHZ  
50% Duty Cycle  
One Bit Toggling  
VCC = Max.,  
VIN = Vcc  
VIN = GND  
3.0  
7.5  
5.5(5)  
Outputs Open  
fcp = 10 MHz  
50% Duty Cycle  
XOE = GND  
VIN = 3.4V  
VIN = GND  
19.0(5)  
16 Bits Toggling  
fi = 2.5 MHz  
50% Duty Cycle  
Notes:  
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.  
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC  
IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI)  
ICC = Quiescent Current  
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)  
DH = Duty Cycle for TTL Inputs High  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)  
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)  
fI = Input Frequency  
NI = Number of Inputs at fI  
All currents are in milliamps and all frequencies are in megahertz.  
PS2082D  
06/08/98  
5
PI74FCT162Q374T  
LOW NOISE 16-BIT REGISTERS (3-STATE)  
Switching Characteristics over Operating Range  
162Q374T  
Com.  
Min Max Min Max Min Max Min Max Min Max  
162Q374AT 162Q374CT 162Q374DT 162Q374ET  
Com.  
Com.  
Com.  
Com.  
Unit  
Parameters  
Description  
Conditions  
t
PLH  
Propagation Delay  
xCLK to xOx  
2.0  
1.5  
1.5  
2.0  
1.5  
7.0  
-
10  
12.5  
8.0  
-
2.0  
1.5  
1.5  
2.0  
1.5  
5.0  
-
6.5  
6.5  
5.5  
-
2.0  
1.5  
1.5  
2.0  
1.5  
5.0  
-
5.2  
5.5  
5.0  
-
2.0  
1.5  
1.5  
2.0  
1.0  
3.0  
-
4.2  
4.8  
4.0  
-
1.5  
1.5  
1.5  
1.5  
0.0  
3.0  
-
3.7  
4.4  
4.0  
-
tPHL  
tPZH  
Output Enable Time  
xOE to xOx  
t
PZL  
tPHZ  
Output Disable Time  
xOE to xOx  
t
PLZ  
C
L
= 50  
P
F
Setup time HIGH or  
LOW, xDx to xCLK  
ns  
t
SU  
R1 = 500  
Hold time HIGH or  
LOW, xDx to xCLK  
tH  
-
-
-
-
-
CLK Pulse Width  
HIGH(3)  
tW  
-
-
-
-
-
t
SK  
(O  
)
Outout Skew(4)  
0.5  
0.5  
0.5  
0.5  
0.5  
Notes:  
1. See test circuit and wave forms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. This parameter is guaranteed but not production tested.  
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.  
Pericom Semiconductor Corporation  
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com  
PS2082D  
06/08/98  
6

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